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llvm/trunk/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp
| Show First 20 Lines • Show All 959 Lines • ▼ Show 20 Lines | case 0x66: | ||||
| if (insn->mode != MODE_16BIT) | if (insn->mode != MODE_16BIT) | ||||
| attrMask |= ATTR_OPSIZE; | attrMask |= ATTR_OPSIZE; | ||||
| break; | break; | ||||
| case 0x67: | case 0x67: | ||||
| attrMask |= ATTR_ADSIZE; | attrMask |= ATTR_ADSIZE; | ||||
| break; | break; | ||||
| } | } | ||||
| if (insn->hasAdSize) | |||||
| attrMask |= ATTR_ADSIZE; | |||||
| } | } | ||||
| if (insn->rexPrefix & 0x08) { | if (insn->rexPrefix & 0x08) { | ||||
| attrMask |= ATTR_REXW; | attrMask |= ATTR_REXW; | ||||
| attrMask &= ~ATTR_ADSIZE; | attrMask &= ~ATTR_ADSIZE; | ||||
| } | } | ||||
| /* | /* | ||||
| ▲ Show 20 Lines • Show All 76 Lines • ▼ Show 20 Lines | if ((insn->vectorExtensionType == TYPE_EVEX && | ||||
| insn->instructionID = instructionIDWithREXW; | insn->instructionID = instructionIDWithREXW; | ||||
| insn->spec = specifierForUID(instructionIDWithREXW); | insn->spec = specifierForUID(instructionIDWithREXW); | ||||
| return 0; | return 0; | ||||
| } | } | ||||
| } | } | ||||
| } | } | ||||
| /* | /* | ||||
| * Absolute moves need special handling. | * Absolute moves and umonitor need special handling. | ||||
| * -For 16-bit mode because the meaning of the AdSize and OpSize prefixes are | * -For 16-bit mode because the meaning of the AdSize and OpSize prefixes are | ||||
| * inverted w.r.t. | * inverted w.r.t. | ||||
| * -For 32-bit mode we need to ensure the ADSIZE prefix is observed in | * -For 32-bit mode we need to ensure the ADSIZE prefix is observed in | ||||
| * any position. | * any position. | ||||
| */ | */ | ||||
| if (insn->opcodeType == ONEBYTE && ((insn->opcode & 0xFC) == 0xA0)) { | if ((insn->opcodeType == ONEBYTE && ((insn->opcode & 0xFC) == 0xA0)) || | ||||
| (insn->opcodeType == TWOBYTE && (insn->opcode == 0xAE))) { | |||||
| /* Make sure we observed the prefixes in any position. */ | /* Make sure we observed the prefixes in any position. */ | ||||
| if (insn->hasAdSize) | if (insn->hasAdSize) | ||||
| attrMask |= ATTR_ADSIZE; | attrMask |= ATTR_ADSIZE; | ||||
| if (insn->hasOpSize) | if (insn->hasOpSize) | ||||
| attrMask |= ATTR_OPSIZE; | attrMask |= ATTR_OPSIZE; | ||||
| /* In 16-bit, invert the attributes. */ | /* In 16-bit, invert the attributes. */ | ||||
| if (insn->mode == MODE_16BIT) | if (insn->mode == MODE_16BIT) { | ||||
| attrMask ^= ATTR_ADSIZE | ATTR_OPSIZE; | attrMask ^= ATTR_ADSIZE; | ||||
| /* The OpSize attribute is only valid with the absolute moves. */ | |||||
| if (insn->opcodeType == ONEBYTE && ((insn->opcode & 0xFC) == 0xA0)) | |||||
| attrMask ^= ATTR_OPSIZE; | |||||
| } | |||||
| if (getIDWithAttrMask(&instructionID, insn, attrMask)) | if (getIDWithAttrMask(&instructionID, insn, attrMask)) | ||||
| return -1; | return -1; | ||||
| insn->instructionID = instructionID; | insn->instructionID = instructionID; | ||||
| insn->spec = specifierForUID(instructionID); | insn->spec = specifierForUID(instructionID); | ||||
| return 0; | return 0; | ||||
| } | } | ||||
| ▲ Show 20 Lines • Show All 847 Lines • Show Last 20 Lines | |||||