Index: llvm/lib/Target/ARM/ARMISelLowering.cpp =================================================================== --- llvm/lib/Target/ARM/ARMISelLowering.cpp +++ llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -12821,6 +12821,27 @@ return PerformADDCombineWithOperands(N, N1, N0, DCI, Subtarget); } +// Combine sub 0, csinc X, Y, CC -> csinv -X, Y, CC +// providing -X is as cheap as X (currently, just a constant). +static SDValue PerformSubCSINCCombine(SDNode *N, + TargetLowering::DAGCombinerInfo &DCI) { + if (N->getValueType(0) != MVT::i32 || !isNullConstant(N->getOperand(0))) + return SDValue(); + SDValue CSINC = N->getOperand(1); + if (CSINC.getOpcode() != ARMISD::CSINC) + return SDValue(); + + ConstantSDNode *X = dyn_cast(CSINC.getOperand(0)); + if (!X) + return SDValue(); + + return DCI.DAG.getNode(ARMISD::CSINV, SDLoc(N), MVT::i32, + DCI.DAG.getNode(ISD::SUB, SDLoc(N), MVT::i32, + N->getOperand(0), CSINC.getOperand(0)), + CSINC.getOperand(1), CSINC.getOperand(2), + CSINC.getOperand(3)); +} + /// PerformSUBCombine - Target-specific dag combine xforms for ISD::SUB. /// static SDValue PerformSUBCombine(SDNode *N, @@ -12834,6 +12855,9 @@ if (SDValue Result = combineSelectAndUse(N, N1, N0, DCI)) return Result; + if (SDValue R = PerformSubCSINCCombine(N, DCI)) + return R; + if (!Subtarget->hasMVEIntegerOps() || !N->getValueType(0).isVector()) return SDValue(); Index: llvm/test/CodeGen/Thumb2/mve-masked-store.ll =================================================================== --- llvm/test/CodeGen/Thumb2/mve-masked-store.ll +++ llvm/test/CodeGen/Thumb2/mve-masked-store.ll @@ -1229,19 +1229,17 @@ ; CHECK-LE-NEXT: it gt ; CHECK-LE-NEXT: movgt r1, #1 ; CHECK-LE-NEXT: cmp r1, #0 -; CHECK-LE-NEXT: vcmp.f32 s1, #0 -; CHECK-LE-NEXT: cset r1, ne -; CHECK-LE-NEXT: vmrs APSR_nzcv, fpscr -; CHECK-LE-NEXT: rsb.w r3, r1, #0 ; CHECK-LE-NEXT: mov.w r1, #0 +; CHECK-LE-NEXT: csetm r3, ne +; CHECK-LE-NEXT: vcmp.f32 s1, #0 ; CHECK-LE-NEXT: bfi r1, r3, #0, #1 +; CHECK-LE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-LE-NEXT: mov.w r3, #0 +; CHECK-LE-NEXT: vcmp.f32 s2, #0 ; CHECK-LE-NEXT: it gt ; CHECK-LE-NEXT: movgt r3, #1 ; CHECK-LE-NEXT: cmp r3, #0 -; CHECK-LE-NEXT: cset r3, ne -; CHECK-LE-NEXT: vcmp.f32 s2, #0 -; CHECK-LE-NEXT: rsbs r3, r3, #0 +; CHECK-LE-NEXT: csetm r3, ne ; CHECK-LE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-LE-NEXT: bfi r1, r3, #1, #1 ; CHECK-LE-NEXT: mov.w r3, #0 @@ -1249,17 +1247,15 @@ ; CHECK-LE-NEXT: movgt r3, #1 ; CHECK-LE-NEXT: cmp r3, #0 ; CHECK-LE-NEXT: vcmp.f32 s3, #0 -; CHECK-LE-NEXT: cset r3, ne +; CHECK-LE-NEXT: csetm r3, ne ; CHECK-LE-NEXT: movs r2, #0 ; CHECK-LE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-LE-NEXT: it gt ; CHECK-LE-NEXT: movgt r2, #1 ; CHECK-LE-NEXT: cmp r2, #0 -; CHECK-LE-NEXT: cset r2, ne -; CHECK-LE-NEXT: rsbs r3, r3, #0 ; CHECK-LE-NEXT: vcvtb.f16.f32 s4, s0 ; CHECK-LE-NEXT: bfi r1, r3, #2, #1 -; CHECK-LE-NEXT: rsbs r2, r2, #0 +; CHECK-LE-NEXT: csetm r2, ne ; CHECK-LE-NEXT: vcvtt.f16.f32 s4, s1 ; CHECK-LE-NEXT: bfi r1, r2, #3, #1 ; CHECK-LE-NEXT: vcvtb.f16.f32 s5, s2 @@ -1309,19 +1305,17 @@ ; CHECK-BE-NEXT: it gt ; CHECK-BE-NEXT: movgt r1, #1 ; CHECK-BE-NEXT: cmp r1, #0 -; CHECK-BE-NEXT: vcmp.f32 s6, #0 -; CHECK-BE-NEXT: cset r1, ne -; CHECK-BE-NEXT: vmrs APSR_nzcv, fpscr -; CHECK-BE-NEXT: rsb.w r3, r1, #0 ; CHECK-BE-NEXT: mov.w r1, #0 +; CHECK-BE-NEXT: csetm r3, ne +; CHECK-BE-NEXT: vcmp.f32 s6, #0 ; CHECK-BE-NEXT: bfi r1, r3, #0, #1 +; CHECK-BE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-BE-NEXT: mov.w r3, #0 +; CHECK-BE-NEXT: vcmp.f32 s5, #0 ; CHECK-BE-NEXT: it gt ; CHECK-BE-NEXT: movgt r3, #1 ; CHECK-BE-NEXT: cmp r3, #0 -; CHECK-BE-NEXT: cset r3, ne -; CHECK-BE-NEXT: vcmp.f32 s5, #0 -; CHECK-BE-NEXT: rsbs r3, r3, #0 +; CHECK-BE-NEXT: csetm r3, ne ; CHECK-BE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-BE-NEXT: bfi r1, r3, #1, #1 ; CHECK-BE-NEXT: mov.w r3, #0 @@ -1329,16 +1323,14 @@ ; CHECK-BE-NEXT: movgt r3, #1 ; CHECK-BE-NEXT: cmp r3, #0 ; CHECK-BE-NEXT: vcmp.f32 s4, #0 -; CHECK-BE-NEXT: cset r3, ne +; CHECK-BE-NEXT: csetm r3, ne ; CHECK-BE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-BE-NEXT: it gt ; CHECK-BE-NEXT: movgt r2, #1 ; CHECK-BE-NEXT: cmp r2, #0 -; CHECK-BE-NEXT: rsb.w r3, r3, #0 -; CHECK-BE-NEXT: cset r2, ne ; CHECK-BE-NEXT: vcvtb.f16.f32 s0, s4 ; CHECK-BE-NEXT: bfi r1, r3, #2, #1 -; CHECK-BE-NEXT: rsbs r2, r2, #0 +; CHECK-BE-NEXT: csetm r2, ne ; CHECK-BE-NEXT: vcvtt.f16.f32 s0, s5 ; CHECK-BE-NEXT: bfi r1, r2, #3, #1 ; CHECK-BE-NEXT: vcvtb.f16.f32 s1, s6 @@ -1393,19 +1385,17 @@ ; CHECK-LE-NEXT: it gt ; CHECK-LE-NEXT: movgt r1, #1 ; CHECK-LE-NEXT: cmp r1, #0 -; CHECK-LE-NEXT: vcmp.f32 s1, #0 -; CHECK-LE-NEXT: cset r1, ne -; CHECK-LE-NEXT: vmrs APSR_nzcv, fpscr -; CHECK-LE-NEXT: rsb.w r3, r1, #0 ; CHECK-LE-NEXT: mov.w r1, #0 +; CHECK-LE-NEXT: csetm r3, ne +; CHECK-LE-NEXT: vcmp.f32 s1, #0 ; CHECK-LE-NEXT: bfi r1, r3, #0, #1 +; CHECK-LE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-LE-NEXT: mov.w r3, #0 +; CHECK-LE-NEXT: vcmp.f32 s2, #0 ; CHECK-LE-NEXT: it gt ; CHECK-LE-NEXT: movgt r3, #1 ; CHECK-LE-NEXT: cmp r3, #0 -; CHECK-LE-NEXT: cset r3, ne -; CHECK-LE-NEXT: vcmp.f32 s2, #0 -; CHECK-LE-NEXT: rsbs r3, r3, #0 +; CHECK-LE-NEXT: csetm r3, ne ; CHECK-LE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-LE-NEXT: bfi r1, r3, #1, #1 ; CHECK-LE-NEXT: mov.w r3, #0 @@ -1413,17 +1403,15 @@ ; CHECK-LE-NEXT: movgt r3, #1 ; CHECK-LE-NEXT: cmp r3, #0 ; CHECK-LE-NEXT: vcmp.f32 s3, #0 -; CHECK-LE-NEXT: cset r3, ne +; CHECK-LE-NEXT: csetm r3, ne ; CHECK-LE-NEXT: movs r2, #0 ; CHECK-LE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-LE-NEXT: it gt ; CHECK-LE-NEXT: movgt r2, #1 ; CHECK-LE-NEXT: cmp r2, #0 -; CHECK-LE-NEXT: cset r2, ne -; CHECK-LE-NEXT: rsbs r3, r3, #0 ; CHECK-LE-NEXT: vcvtb.f16.f32 s4, s0 ; CHECK-LE-NEXT: bfi r1, r3, #2, #1 -; CHECK-LE-NEXT: rsbs r2, r2, #0 +; CHECK-LE-NEXT: csetm r2, ne ; CHECK-LE-NEXT: vcvtt.f16.f32 s4, s1 ; CHECK-LE-NEXT: bfi r1, r2, #3, #1 ; CHECK-LE-NEXT: vcvtb.f16.f32 s5, s2 @@ -1473,19 +1461,17 @@ ; CHECK-BE-NEXT: it gt ; CHECK-BE-NEXT: movgt r1, #1 ; CHECK-BE-NEXT: cmp r1, #0 -; CHECK-BE-NEXT: vcmp.f32 s6, #0 -; CHECK-BE-NEXT: cset r1, ne -; CHECK-BE-NEXT: vmrs APSR_nzcv, fpscr -; CHECK-BE-NEXT: rsb.w r3, r1, #0 ; CHECK-BE-NEXT: mov.w r1, #0 +; CHECK-BE-NEXT: csetm r3, ne +; CHECK-BE-NEXT: vcmp.f32 s6, #0 ; CHECK-BE-NEXT: bfi r1, r3, #0, #1 +; CHECK-BE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-BE-NEXT: mov.w r3, #0 +; CHECK-BE-NEXT: vcmp.f32 s5, #0 ; CHECK-BE-NEXT: it gt ; CHECK-BE-NEXT: movgt r3, #1 ; CHECK-BE-NEXT: cmp r3, #0 -; CHECK-BE-NEXT: cset r3, ne -; CHECK-BE-NEXT: vcmp.f32 s5, #0 -; CHECK-BE-NEXT: rsbs r3, r3, #0 +; CHECK-BE-NEXT: csetm r3, ne ; CHECK-BE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-BE-NEXT: bfi r1, r3, #1, #1 ; CHECK-BE-NEXT: mov.w r3, #0 @@ -1493,16 +1479,14 @@ ; CHECK-BE-NEXT: movgt r3, #1 ; CHECK-BE-NEXT: cmp r3, #0 ; CHECK-BE-NEXT: vcmp.f32 s4, #0 -; CHECK-BE-NEXT: cset r3, ne +; CHECK-BE-NEXT: csetm r3, ne ; CHECK-BE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-BE-NEXT: it gt ; CHECK-BE-NEXT: movgt r2, #1 ; CHECK-BE-NEXT: cmp r2, #0 -; CHECK-BE-NEXT: rsb.w r3, r3, #0 -; CHECK-BE-NEXT: cset r2, ne ; CHECK-BE-NEXT: vcvtb.f16.f32 s0, s4 ; CHECK-BE-NEXT: bfi r1, r3, #2, #1 -; CHECK-BE-NEXT: rsbs r2, r2, #0 +; CHECK-BE-NEXT: csetm r2, ne ; CHECK-BE-NEXT: vcvtt.f16.f32 s0, s5 ; CHECK-BE-NEXT: bfi r1, r2, #3, #1 ; CHECK-BE-NEXT: vcvtb.f16.f32 s1, s6 @@ -1557,19 +1541,17 @@ ; CHECK-LE-NEXT: it gt ; CHECK-LE-NEXT: movgt r1, #1 ; CHECK-LE-NEXT: cmp r1, #0 -; CHECK-LE-NEXT: vcmp.f32 s1, #0 -; CHECK-LE-NEXT: cset r1, ne -; CHECK-LE-NEXT: vmrs APSR_nzcv, fpscr -; CHECK-LE-NEXT: rsb.w r3, r1, #0 ; CHECK-LE-NEXT: mov.w r1, #0 +; CHECK-LE-NEXT: csetm r3, ne +; CHECK-LE-NEXT: vcmp.f32 s1, #0 ; CHECK-LE-NEXT: bfi r1, r3, #0, #1 +; CHECK-LE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-LE-NEXT: mov.w r3, #0 +; CHECK-LE-NEXT: vcmp.f32 s2, #0 ; CHECK-LE-NEXT: it gt ; CHECK-LE-NEXT: movgt r3, #1 ; CHECK-LE-NEXT: cmp r3, #0 -; CHECK-LE-NEXT: cset r3, ne -; CHECK-LE-NEXT: vcmp.f32 s2, #0 -; CHECK-LE-NEXT: rsbs r3, r3, #0 +; CHECK-LE-NEXT: csetm r3, ne ; CHECK-LE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-LE-NEXT: bfi r1, r3, #1, #1 ; CHECK-LE-NEXT: mov.w r3, #0 @@ -1577,17 +1559,15 @@ ; CHECK-LE-NEXT: movgt r3, #1 ; CHECK-LE-NEXT: cmp r3, #0 ; CHECK-LE-NEXT: vcmp.f32 s3, #0 -; CHECK-LE-NEXT: cset r3, ne +; CHECK-LE-NEXT: csetm r3, ne ; CHECK-LE-NEXT: movs r2, #0 ; CHECK-LE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-LE-NEXT: it gt ; CHECK-LE-NEXT: movgt r2, #1 ; CHECK-LE-NEXT: cmp r2, #0 -; CHECK-LE-NEXT: cset r2, ne -; CHECK-LE-NEXT: rsbs r3, r3, #0 ; CHECK-LE-NEXT: vcvtb.f16.f32 s4, s0 ; CHECK-LE-NEXT: bfi r1, r3, #2, #1 -; CHECK-LE-NEXT: rsbs r2, r2, #0 +; CHECK-LE-NEXT: csetm r2, ne ; CHECK-LE-NEXT: vcvtt.f16.f32 s4, s1 ; CHECK-LE-NEXT: bfi r1, r2, #3, #1 ; CHECK-LE-NEXT: vcvtb.f16.f32 s5, s2 @@ -1645,19 +1625,17 @@ ; CHECK-BE-NEXT: it gt ; CHECK-BE-NEXT: movgt r1, #1 ; CHECK-BE-NEXT: cmp r1, #0 -; CHECK-BE-NEXT: vcmp.f32 s6, #0 -; CHECK-BE-NEXT: cset r1, ne -; CHECK-BE-NEXT: vmrs APSR_nzcv, fpscr -; CHECK-BE-NEXT: rsb.w r3, r1, #0 ; CHECK-BE-NEXT: mov.w r1, #0 +; CHECK-BE-NEXT: csetm r3, ne +; CHECK-BE-NEXT: vcmp.f32 s6, #0 ; CHECK-BE-NEXT: bfi r1, r3, #0, #1 +; CHECK-BE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-BE-NEXT: mov.w r3, #0 +; CHECK-BE-NEXT: vcmp.f32 s5, #0 ; CHECK-BE-NEXT: it gt ; CHECK-BE-NEXT: movgt r3, #1 ; CHECK-BE-NEXT: cmp r3, #0 -; CHECK-BE-NEXT: cset r3, ne -; CHECK-BE-NEXT: vcmp.f32 s5, #0 -; CHECK-BE-NEXT: rsbs r3, r3, #0 +; CHECK-BE-NEXT: csetm r3, ne ; CHECK-BE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-BE-NEXT: bfi r1, r3, #1, #1 ; CHECK-BE-NEXT: mov.w r3, #0 @@ -1665,16 +1643,14 @@ ; CHECK-BE-NEXT: movgt r3, #1 ; CHECK-BE-NEXT: cmp r3, #0 ; CHECK-BE-NEXT: vcmp.f32 s4, #0 -; CHECK-BE-NEXT: cset r3, ne +; CHECK-BE-NEXT: csetm r3, ne ; CHECK-BE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-BE-NEXT: it gt ; CHECK-BE-NEXT: movgt r2, #1 ; CHECK-BE-NEXT: cmp r2, #0 -; CHECK-BE-NEXT: rsb.w r3, r3, #0 -; CHECK-BE-NEXT: cset r2, ne ; CHECK-BE-NEXT: vcvtb.f16.f32 s0, s4 ; CHECK-BE-NEXT: bfi r1, r3, #2, #1 -; CHECK-BE-NEXT: rsbs r2, r2, #0 +; CHECK-BE-NEXT: csetm r2, ne ; CHECK-BE-NEXT: vcvtt.f16.f32 s0, s5 ; CHECK-BE-NEXT: bfi r1, r2, #3, #1 ; CHECK-BE-NEXT: vcvtb.f16.f32 s1, s6 Index: llvm/test/CodeGen/Thumb2/mve-pred-build-var.ll =================================================================== --- llvm/test/CodeGen/Thumb2/mve-pred-build-var.ll +++ llvm/test/CodeGen/Thumb2/mve-pred-build-var.ll @@ -7,8 +7,7 @@ ; CHECK: @ %bb.0: @ %entry ; CHECK-NEXT: cmp r0, r1 ; CHECK-NEXT: mov.w r1, #0 -; CHECK-NEXT: cset r0, lo -; CHECK-NEXT: rsbs r0, r0, #0 +; CHECK-NEXT: csetm r0, lo ; CHECK-NEXT: bfi r1, r0, #0, #4 ; CHECK-NEXT: vmsr p0, r1 ; CHECK-NEXT: vpsel q0, q0, q1 @@ -25,8 +24,7 @@ ; CHECK: @ %bb.0: @ %entry ; CHECK-NEXT: cmp r0, r1 ; CHECK-NEXT: mov.w r1, #0 -; CHECK-NEXT: cset r0, lo -; CHECK-NEXT: rsbs r0, r0, #0 +; CHECK-NEXT: csetm r0, lo ; CHECK-NEXT: bfi r1, r0, #12, #4 ; CHECK-NEXT: vmsr p0, r1 ; CHECK-NEXT: vpsel q0, q0, q1 @@ -42,8 +40,7 @@ ; CHECK-LABEL: build_varN_v4i1: ; CHECK: @ %bb.0: @ %entry ; CHECK-NEXT: cmp r0, r1 -; CHECK-NEXT: cset r0, lo -; CHECK-NEXT: rsbs r0, r0, #0 +; CHECK-NEXT: csetm r0, lo ; CHECK-NEXT: vmsr p0, r0 ; CHECK-NEXT: vpsel q0, q0, q1 ; CHECK-NEXT: bx lr @@ -61,8 +58,7 @@ ; CHECK: @ %bb.0: @ %entry ; CHECK-NEXT: cmp r0, r1 ; CHECK-NEXT: mov.w r1, #0 -; CHECK-NEXT: cset r0, lo -; CHECK-NEXT: rsbs r0, r0, #0 +; CHECK-NEXT: csetm r0, lo ; CHECK-NEXT: bfi r1, r0, #0, #2 ; CHECK-NEXT: vmsr p0, r1 ; CHECK-NEXT: vpsel q0, q0, q1 @@ -79,8 +75,7 @@ ; CHECK: @ %bb.0: @ %entry ; CHECK-NEXT: cmp r0, r1 ; CHECK-NEXT: mov.w r1, #0 -; CHECK-NEXT: cset r0, lo -; CHECK-NEXT: rsbs r0, r0, #0 +; CHECK-NEXT: csetm r0, lo ; CHECK-NEXT: bfi r1, r0, #6, #2 ; CHECK-NEXT: vmsr p0, r1 ; CHECK-NEXT: vpsel q0, q0, q1 @@ -96,8 +91,7 @@ ; CHECK-LABEL: build_varN_v8i1: ; CHECK: @ %bb.0: @ %entry ; CHECK-NEXT: cmp r0, r1 -; CHECK-NEXT: cset r0, lo -; CHECK-NEXT: rsbs r0, r0, #0 +; CHECK-NEXT: csetm r0, lo ; CHECK-NEXT: vmsr p0, r0 ; CHECK-NEXT: vpsel q0, q0, q1 ; CHECK-NEXT: bx lr @@ -115,8 +109,7 @@ ; CHECK: @ %bb.0: @ %entry ; CHECK-NEXT: cmp r0, r1 ; CHECK-NEXT: mov.w r1, #0 -; CHECK-NEXT: cset r0, lo -; CHECK-NEXT: rsbs r0, r0, #0 +; CHECK-NEXT: csetm r0, lo ; CHECK-NEXT: bfi r1, r0, #0, #1 ; CHECK-NEXT: vmsr p0, r1 ; CHECK-NEXT: vpsel q0, q0, q1 @@ -133,8 +126,7 @@ ; CHECK: @ %bb.0: @ %entry ; CHECK-NEXT: cmp r0, r1 ; CHECK-NEXT: mov.w r1, #0 -; CHECK-NEXT: cset r0, lo -; CHECK-NEXT: rsbs r0, r0, #0 +; CHECK-NEXT: csetm r0, lo ; CHECK-NEXT: bfi r1, r0, #3, #1 ; CHECK-NEXT: vmsr p0, r1 ; CHECK-NEXT: vpsel q0, q0, q1 @@ -150,8 +142,7 @@ ; CHECK-LABEL: build_varN_v16i1: ; CHECK: @ %bb.0: @ %entry ; CHECK-NEXT: cmp r0, r1 -; CHECK-NEXT: cset r0, lo -; CHECK-NEXT: rsbs r0, r0, #0 +; CHECK-NEXT: csetm r0, lo ; CHECK-NEXT: vmsr p0, r0 ; CHECK-NEXT: vpsel q0, q0, q1 ; CHECK-NEXT: bx lr @@ -168,8 +159,7 @@ ; CHECK-LABEL: build_var0_v2i1: ; CHECK: @ %bb.0: @ %entry ; CHECK-NEXT: cmp r0, r1 -; CHECK-NEXT: cset r0, lo -; CHECK-NEXT: rsbs r0, r0, #0 +; CHECK-NEXT: csetm r0, lo ; CHECK-NEXT: vmov s8, r0 ; CHECK-NEXT: vldr s10, .LCPI9_0 ; CHECK-NEXT: vmov.f32 s9, s8 @@ -193,8 +183,7 @@ ; CHECK-LABEL: build_var1_v2i1: ; CHECK: @ %bb.0: @ %entry ; CHECK-NEXT: cmp r0, r1 -; CHECK-NEXT: cset r0, lo -; CHECK-NEXT: rsbs r0, r0, #0 +; CHECK-NEXT: csetm r0, lo ; CHECK-NEXT: vmov s10, r0 ; CHECK-NEXT: vldr s8, .LCPI10_0 ; CHECK-NEXT: vmov.f32 s9, s8 @@ -218,8 +207,7 @@ ; CHECK-LABEL: build_varN_v2i1: ; CHECK: @ %bb.0: @ %entry ; CHECK-NEXT: cmp r0, r1 -; CHECK-NEXT: cset r0, lo -; CHECK-NEXT: rsbs r0, r0, #0 +; CHECK-NEXT: csetm r0, lo ; CHECK-NEXT: vdup.32 q2, r0 ; CHECK-NEXT: vbic q1, q1, q2 ; CHECK-NEXT: vand q0, q0, q2 Index: llvm/test/CodeGen/Thumb2/mve-vmovimm.ll =================================================================== --- llvm/test/CodeGen/Thumb2/mve-vmovimm.ll +++ llvm/test/CodeGen/Thumb2/mve-vmovimm.ll @@ -520,8 +520,7 @@ ; CHECKLE: @ %bb.0: @ %entry ; CHECKLE-NEXT: cmp r0, #0 ; CHECKLE-NEXT: mov.w r1, #15 -; CHECKLE-NEXT: cset r0, eq -; CHECKLE-NEXT: rsbs r0, r0, #0 +; CHECKLE-NEXT: csetm r0, eq ; CHECKLE-NEXT: ands r0, r1 ; CHECKLE-NEXT: vmsr p0, r0 ; CHECKLE-NEXT: vpsel q0, q0, q1 @@ -531,11 +530,10 @@ ; CHECKBE: @ %bb.0: @ %entry ; CHECKBE-NEXT: cmp r0, #0 ; CHECKBE-NEXT: mov.w r1, #15 -; CHECKBE-NEXT: cset r0, eq +; CHECKBE-NEXT: csetm r0, eq ; CHECKBE-NEXT: vrev64.32 q2, q1 -; CHECKBE-NEXT: rsbs r0, r0, #0 -; CHECKBE-NEXT: vrev64.32 q1, q0 ; CHECKBE-NEXT: ands r0, r1 +; CHECKBE-NEXT: vrev64.32 q1, q0 ; CHECKBE-NEXT: vmsr p0, r0 ; CHECKBE-NEXT: vpsel q1, q1, q2 ; CHECKBE-NEXT: vrev64.32 q0, q1 @@ -554,8 +552,7 @@ ; CHECKLE: @ %bb.0: @ %entry ; CHECKLE-NEXT: cmp r0, #0 ; CHECKLE-NEXT: mov.w r1, #15 -; CHECKLE-NEXT: cset r0, eq -; CHECKLE-NEXT: rsbs r0, r0, #0 +; CHECKLE-NEXT: csetm r0, eq ; CHECKLE-NEXT: orrs r0, r1 ; CHECKLE-NEXT: vmsr p0, r0 ; CHECKLE-NEXT: vpsel q0, q0, q1 @@ -565,11 +562,10 @@ ; CHECKBE: @ %bb.0: @ %entry ; CHECKBE-NEXT: cmp r0, #0 ; CHECKBE-NEXT: mov.w r1, #15 -; CHECKBE-NEXT: cset r0, eq +; CHECKBE-NEXT: csetm r0, eq ; CHECKBE-NEXT: vrev64.32 q2, q1 -; CHECKBE-NEXT: rsbs r0, r0, #0 -; CHECKBE-NEXT: vrev64.32 q1, q0 ; CHECKBE-NEXT: orrs r0, r1 +; CHECKBE-NEXT: vrev64.32 q1, q0 ; CHECKBE-NEXT: vmsr p0, r0 ; CHECKBE-NEXT: vpsel q1, q1, q2 ; CHECKBE-NEXT: vrev64.32 q0, q1