Index: lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
===================================================================
--- lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
+++ lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
@@ -533,10 +533,7 @@
 
   // Don't use LA for two-operand addition if either operand is only
   // used once.  The addition instructions are better in that case.
-  if (Base->hasOneUse())
-    return false;
-
-  return true;
+  return !Base->hasOneUse();
 }
 
 // Return true if Addr is suitable for AM, updating AM if so.
Index: lib/Target/SystemZ/SystemZISelLowering.cpp
===================================================================
--- lib/Target/SystemZ/SystemZISelLowering.cpp
+++ lib/Target/SystemZ/SystemZISelLowering.cpp
@@ -773,9 +773,7 @@
 }
 
 bool SystemZTargetLowering::mayBeEmittedAsTailCall(CallInst *CI) const {
-  if (!CI->isTailCall())
-    return false;
-  return true;
+  return CI->isTailCall();
 }
 
 // We do not yet support 128-bit single-element vector types.  If the user
@@ -1673,10 +1671,8 @@
       return false;
     // The signed memory-immediate instructions can handle 16-bit
     // signed integers.
-    if (C.ICmpType != SystemZICMP::UnsignedOnly &&
-        isInt<16>(ConstOp1->getSExtValue()))
-      return false;
-    return true;
+    return !(C.ICmpType != SystemZICMP::UnsignedOnly &&
+             isInt<16>(ConstOp1->getSExtValue()));
   }
 
   // Try to promote the use of CGFR and CLGFR.
@@ -1685,13 +1681,10 @@
     return true;
   if (C.ICmpType != SystemZICMP::SignedOnly && Opcode0 == ISD::ZERO_EXTEND)
     return true;
-  if (C.ICmpType != SystemZICMP::SignedOnly &&
-      Opcode0 == ISD::AND &&
-      C.Op0.getOperand(1).getOpcode() == ISD::Constant &&
-      cast<ConstantSDNode>(C.Op0.getOperand(1))->getZExtValue() == 0xffffffff)
-    return true;
-
-  return false;
+  return C.ICmpType != SystemZICMP::SignedOnly && Opcode0 == ISD::AND &&
+         C.Op0.getOperand(1).getOpcode() == ISD::Constant &&
+         cast<ConstantSDNode>(C.Op0.getOperand(1))->getZExtValue() ==
+             0xffffffff;
 }
 
 // Return a version of comparison CC mask CCMask in which the LT and GT
Index: lib/Target/SystemZ/SystemZInstrInfo.cpp
===================================================================
--- lib/Target/SystemZ/SystemZInstrInfo.cpp
+++ lib/Target/SystemZ/SystemZInstrInfo.cpp
@@ -486,11 +486,8 @@
                                        const MachineRegisterInfo *MRI) const {
   assert(!SrcReg2 && "Only optimizing constant comparisons so far");
   bool IsLogical = (Compare->getDesc().TSFlags & SystemZII::IsLogical) != 0;
-  if (Value == 0 &&
-      !IsLogical &&
-      removeIPMBasedCompare(Compare, SrcReg, MRI, &RI))
-    return true;
-  return false;
+  return Value == 0 && !IsLogical &&
+         removeIPMBasedCompare(Compare, SrcReg, MRI, &RI);
 }
 
 // If Opcode is a move that has a conditional variant, return that variant,
@@ -505,10 +502,7 @@
 
 bool SystemZInstrInfo::isPredicable(MachineInstr *MI) const {
   unsigned Opcode = MI->getOpcode();
-  if (STI.hasLoadStoreOnCond() &&
-      getConditionalMove(Opcode))
-    return true;
-  return false;
+  return STI.hasLoadStoreOnCond() && getConditionalMove(Opcode);
 }
 
 bool SystemZInstrInfo::