diff --git a/llvm/unittests/CodeGen/GlobalISel/CSETest.cpp b/llvm/unittests/CodeGen/GlobalISel/CSETest.cpp
--- a/llvm/unittests/CodeGen/GlobalISel/CSETest.cpp
+++ b/llvm/unittests/CodeGen/GlobalISel/CSETest.cpp
@@ -13,7 +13,7 @@
 namespace {
 
 TEST_F(AArch64GISelMITest, TestCSE) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -109,7 +109,7 @@
 }
 
 TEST_F(AArch64GISelMITest, TestCSEConstantConfig) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -139,7 +139,7 @@
 }
 
 TEST_F(AArch64GISelMITest, TestCSEImmediateNextCSE) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
diff --git a/llvm/unittests/CodeGen/GlobalISel/ConstantFoldingTest.cpp b/llvm/unittests/CodeGen/GlobalISel/ConstantFoldingTest.cpp
--- a/llvm/unittests/CodeGen/GlobalISel/ConstantFoldingTest.cpp
+++ b/llvm/unittests/CodeGen/GlobalISel/ConstantFoldingTest.cpp
@@ -18,7 +18,7 @@
 namespace {
 
 TEST_F(AArch64GISelMITest, FoldWithBuilder) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
   // Try to use the FoldableInstructionsBuilder to build binary ops.
@@ -69,7 +69,7 @@
 }
 
 TEST_F(AArch64GISelMITest, FoldBinOp) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -236,4 +236,4 @@
   EXPECT_EQ(16ULL, FoldGSremMix.getValue().getLimitedValue());
 }
 
-} // namespace
\ No newline at end of file
+} // namespace
diff --git a/llvm/unittests/CodeGen/GlobalISel/GISelMITest.h b/llvm/unittests/CodeGen/GlobalISel/GISelMITest.h
--- a/llvm/unittests/CodeGen/GlobalISel/GISelMITest.h
+++ b/llvm/unittests/CodeGen/GlobalISel/GISelMITest.h
@@ -112,25 +112,27 @@
   virtual void getTargetTestModuleString(SmallString<512> &S,
                                          StringRef MIRFunc) const = 0;
 
-  void setUp(StringRef ExtraAssembly = "") {
-    TM = createTargetMachine();
-    if (!TM)
-      return;
+  LLVMTargetMachine *
+  createTargetMachineAndModule(StringRef ExtraAssembly = "") {
+    TheTM = createTargetMachine();
+    if (!TheTM)
+      return nullptr;
 
     SmallString<512> MIRString;
     getTargetTestModuleString(MIRString, ExtraAssembly);
 
-    ModuleMMIPair = createDummyModule(Context, *TM, MIRString, "func");
+    ModuleMMIPair = createDummyModule(Context, *TheTM, MIRString, "func");
     MF = getMFFromMMI(ModuleMMIPair.first.get(), ModuleMMIPair.second.get());
     collectCopies(Copies, MF);
     EntryMBB = &*MF->begin();
     B.setMF(*MF);
     MRI = &MF->getRegInfo();
     B.setInsertPt(*EntryMBB, EntryMBB->end());
+    return TheTM.get();
   }
 
   LLVMContext Context;
-  std::unique_ptr<LLVMTargetMachine> TM;
+  std::unique_ptr<LLVMTargetMachine> TheTM;
   MachineFunction *MF;
   std::pair<std::unique_ptr<Module>, std::unique_ptr<MachineModuleInfo>>
       ModuleMMIPair;
diff --git a/llvm/unittests/CodeGen/GlobalISel/KnownBitsTest.cpp b/llvm/unittests/CodeGen/GlobalISel/KnownBitsTest.cpp
--- a/llvm/unittests/CodeGen/GlobalISel/KnownBitsTest.cpp
+++ b/llvm/unittests/CodeGen/GlobalISel/KnownBitsTest.cpp
@@ -13,7 +13,7 @@
 TEST_F(AArch64GISelMITest, TestKnownBitsCst) {
   StringRef MIRString = "  %3:_(s8) = G_CONSTANT i8 1\n"
                         "  %4:_(s8) = COPY %3\n";
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
   unsigned CopyReg = Copies[Copies.size() - 1];
@@ -33,7 +33,7 @@
 TEST_F(AArch64GISelMITest, TestKnownBitsCstWithClass) {
   StringRef MIRString = "  %10:gpr32 = MOVi32imm 1\n"
                         "  %4:_(s32) = COPY %10\n";
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
   unsigned CopyReg = Copies[Copies.size() - 1];
@@ -72,7 +72,7 @@
                         "  bb.12:\n"
                         "  %13:_(s8) = PHI %10(s8), %bb.10, %12(s8), %bb.11\n"
                         "  %14:_(s8) = COPY %13\n";
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
   Register CopyReg = Copies[Copies.size() - 1];
@@ -106,7 +106,7 @@
                         "  bb.12:\n"
                         "  %13:_(s8) = PHI %10, %bb.10, %12(s8), %bb.11\n"
                         "  %14:_(s8) = COPY %13\n";
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
   Register CopyReg = Copies[Copies.size() - 1];
@@ -144,7 +144,7 @@
       "  bb.12:\n"
       "  %13:_(s64) = PHI %10(s64), %bb.10, %12(s64), %bb.11\n"
       "  %14:_(s64) = COPY %13\n";
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
   Register CopyReg = Copies[Copies.size() - 1];
@@ -181,7 +181,7 @@
       "  %13:_(s8) = PHI %10(s8), %bb.10, %12(s8), %bb.11, %14(s8), %bb.12\n"
       "  %14:_(s8) = COPY %13\n"
       "  G_BR %bb.12\n";
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
   Register CopyReg = Copies[Copies.size() - 1];
@@ -220,7 +220,7 @@
                         "  %14:_(s8) = G_LSHR %13, %11\n"
                         "  %15:_(s8) = COPY %14\n"
                         "  G_BR %bb.12\n";
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
   Register CopyReg = Copies[Copies.size() - 1];
@@ -248,7 +248,7 @@
                         "  %4:_(p0) = G_INTTOPTR %3\n"
                         "  %5:_(s32) = G_PTRTOINT %4\n"
                         "  %6:_(s32) = COPY %5\n";
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
   unsigned CopyReg = Copies[Copies.size() - 1];
@@ -276,7 +276,7 @@
    %copy_and:_(s8) = COPY %and
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -308,7 +308,7 @@
    %copy_or:_(s8) = COPY %or
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -340,7 +340,7 @@
    %copy_xor:_(s8) = COPY %xor
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -363,7 +363,7 @@
                         "  %4:_(s8) = G_CONSTANT i8 7\n"
                         "  %5:_(s8) = G_XOR %3, %4\n"
                         "  %6:_(s8) = COPY %5\n";
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
   unsigned CopyReg = Copies[Copies.size() - 1];
@@ -395,7 +395,7 @@
    %copy_ashr1:_(s8) = COPY %ashr1
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -439,7 +439,7 @@
    %copy_lshr1:_(s8) = COPY %lshr1
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -476,7 +476,7 @@
    %copy_shl:_(s8) = COPY %shl
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -507,7 +507,7 @@
    %copy_add:_(s16) = COPY %add
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -540,7 +540,7 @@
    %copy_sub:_(s16) = COPY %sub
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -567,7 +567,7 @@
    %copy_mul:_(s16) = COPY %mul
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -595,7 +595,7 @@
    %copy_icmp:_(s32) = COPY %icmp
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -618,7 +618,7 @@
    %copy_fcmp:_(s32) = COPY %fcmp
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -650,7 +650,7 @@
    %copy_select:_(s8) = COPY %select
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -683,7 +683,7 @@
                   "  %11:_(s32) = G_OR %9, %16\n"
                   "  %12:_(s32) = G_MUL %10, %11\n"
                   "  %13:_(s32) = COPY %12\n";
-  setUp(MIR);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIR);
   if (!TM)
     return;
   unsigned CopyReg = Copies[Copies.size() - 1];
@@ -699,7 +699,7 @@
 }
 
 TEST_F(AArch64GISelMITest, TestSignBitIsZero) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -728,7 +728,7 @@
 
                         "  %11:_(s8) = G_CONSTANT i8 -32\n"
                         "  %12:_(s8) = COPY %11\n";
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
   Register CopyReg1 = Copies[Copies.size() - 5];
@@ -754,7 +754,7 @@
                         "  %7:_(s8) = G_CONSTANT i8 -1\n"
                         "  %8:_(s32) = G_SEXT %7\n"
                         "  %9:_(s32) = COPY %8\n";
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
   Register CopySextLoad = Copies[Copies.size() - 2];
@@ -801,7 +801,7 @@
    %copy_inreg31_sext:_(s32) = COPY %inreg31_sext
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -868,7 +868,7 @@
    %copy_assert_sext31_sext:_(s32) = COPY %assert_sext31_sext
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -911,7 +911,7 @@
                         "  %10:_(s32) = G_CONSTANT i32 7\n"
                         "  %11:_(s8) = G_TRUNC %10\n"
                         "  %12:_(s8) = COPY %11\n";
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
   Register CopyTruncLoad = Copies[Copies.size() - 3];
@@ -940,7 +940,7 @@
     "  %11:_(s32) = G_AMDGPU_BUFFER_LOAD_SSHORT %3, %4, %4, %4, 0, 0, 0 :: (load 2)\n"
     "  %12:_(s32) = COPY %11\n";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -970,7 +970,7 @@
     "  %13:_(p4) = G_INTRINSIC intrinsic(@llvm.amdgcn.implicit.buffer.ptr)\n"
     "  %14:_(p4) = COPY %13\n";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -1032,7 +1032,7 @@
   %copy_or_pow2:_(s32) = COPY %or_pow2
 
 )MIR";
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -1077,7 +1077,7 @@
                         "  %cst:_(s32) = G_CONSTANT i32 1\n"
                         "  %and:_(s32) = G_AND %ext, %cst\n"
                         "  %copy:_(s32) = COPY %and(s32)\n";
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -1128,7 +1128,7 @@
                         "  %r2:_(s32) = COPY %zext\n"
                         "  %sext:_(s32) = G_SEXT %y(s16)\n"
                         "  %r3:_(s32) = COPY %sext\n";
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
   Register CopyRegAny = Copies[Copies.size() - 3];
@@ -1198,7 +1198,7 @@
    %copy_inreg4:_(s32) = COPY %inreg4
 
 )";
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
   GISelKnownBits Info(*MF);
@@ -1269,7 +1269,7 @@
    %assert_sext4:_(s32) = G_ASSERT_SEXT %ten, 2
    %copy_assert_sext4:_(s32) = COPY %assert_sext4
 )";
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
   GISelKnownBits Info(*MF);
@@ -1314,7 +1314,7 @@
    %merge:_(s64) = G_MERGE_VALUES %val0, %val1, %val2, %val3
    %mergecopy:_(s64) = COPY %merge
 )";
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -1338,7 +1338,7 @@
    %part3:_(s16) = COPY %val3
 
 )";
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -1365,7 +1365,7 @@
    %copy_bswap:_(s32) = COPY %bswap
    %copy_bitreverse:_(s32) = COPY %bitreverse
 )";
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -1414,7 +1414,7 @@
    %copy_umax1:_(s8) = COPY %umax1
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -1452,7 +1452,7 @@
    %umax:_(s64) = G_UMAX %zext, %const
    %copy_umax:_(s64) = COPY %umax
 )";
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -1484,7 +1484,7 @@
    %copy_umin:_(s8) = COPY %umin
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -1518,7 +1518,7 @@
    %copy_smax:_(s8) = COPY %smax
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -1553,7 +1553,7 @@
    %copy_smin:_(s8) = COPY %smin
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -1582,7 +1582,7 @@
    %biggerSized:_(s32) = G_SHL %src, %thirty3
    %copy2:_(s32) = COPY %biggerSized
 )";
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -1624,7 +1624,7 @@
    %copy_assert3:_(s64) = COPY %assert3
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
diff --git a/llvm/unittests/CodeGen/GlobalISel/KnownBitsVectorTest.cpp b/llvm/unittests/CodeGen/GlobalISel/KnownBitsVectorTest.cpp
--- a/llvm/unittests/CodeGen/GlobalISel/KnownBitsVectorTest.cpp
+++ b/llvm/unittests/CodeGen/GlobalISel/KnownBitsVectorTest.cpp
@@ -26,7 +26,7 @@
    %copy_vector:_(<2 x s8>) = COPY %vector
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -67,7 +67,7 @@
    %16:_(<2 x s8>) = COPY %15
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -103,7 +103,7 @@
    %16:_(<2 x s16>) = COPY %15
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -139,7 +139,7 @@
    %15:_(<2 x s32>) = COPY %14
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -177,7 +177,7 @@
    G_BR %bb.12
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -209,7 +209,7 @@
    G_BR %bb.12
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
   Register CopyReg = Copies[Copies.size() - 1];
@@ -246,7 +246,7 @@
    %copy_and:_(<2 x s8>) = COPY %and
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -279,7 +279,7 @@
    %copy_or:_(<2 x s8>) = COPY %or
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -312,7 +312,7 @@
    %copy_xor:_(<2 x s8>) = COPY %xor
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -340,7 +340,7 @@
    %12:_(<2 x s8>) = COPY %11
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -385,7 +385,7 @@
    %copy_ashr1:_(<2 x s8>) = COPY %ashr1
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -430,7 +430,7 @@
    %copy_lshr1:_(<2 x s8>) = COPY %lshr1
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -466,7 +466,7 @@
    %copy_shl:_(<2 x s8>) = COPY %shl
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -499,7 +499,7 @@
    %copy_add:_(<2 x s16>) = COPY %add
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -532,7 +532,7 @@
    %copy_sub:_(<2 x s16>) = COPY %sub
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -561,7 +561,7 @@
    %copy_mul:_(<2 x s16>) = COPY %mul
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -596,7 +596,7 @@
    %copy_select:_(<2 x s8>) = COPY %select
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -610,7 +610,7 @@
 }
 
 TEST_F(AArch64GISelMITest, TestVectorSignBitIsZero) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -669,7 +669,7 @@
    %21:_(<2 x s8>) = COPY %20
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -712,7 +712,7 @@
    %14:_(<2 x s32>) = COPY %13
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
   Register CopySextLoad = Copies[Copies.size() - 3];
@@ -761,7 +761,7 @@
    %copy_inreg31_sext:_(<2 x s32>) = COPY %inreg31_sext
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -828,7 +828,7 @@
    %copy_assert_sext31_sext:_(<2 x s32>) = COPY %assert_sext31_sext
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -876,7 +876,7 @@
    %14:_(<2 x s8>) = COPY %13
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -939,7 +939,7 @@
   %copy_or_pow2:_(<2 x s32>) = COPY %or_pow2
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -988,7 +988,7 @@
    %copy:_(<2 x s32>) = COPY %and(<2 x s32>)
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -1037,7 +1037,7 @@
    %r3:_(<2 x s32>) = COPY %sext
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
   Register CopyRegAny = Copies[Copies.size() - 3];
@@ -1110,7 +1110,7 @@
    %copy_inreg4:_(<2 x s32>) = COPY %inreg4
 
 )";
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
   GISelKnownBits Info(*MF);
@@ -1178,7 +1178,7 @@
    %assert_sext4:_(<2 x s32>) = G_ASSERT_SEXT %ten_splat, 2
    %copy_assert_sext4:_(<2 x s32>) = COPY %assert_sext4
 )";
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
   GISelKnownBits Info(*MF);
@@ -1223,7 +1223,7 @@
    %copy_bswap:_(<2 x s32>) = COPY %bswap
    %copy_bitreverse:_(<2 x s32>) = COPY %bitreverse
 )";
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -1280,7 +1280,7 @@
    %copy_umax1:_(<2 x s8>) = COPY %umax1
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -1310,7 +1310,7 @@
    %copy_umax:_(<2 x s64>) = COPY %umax
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -1346,7 +1346,7 @@
    %copy_umin:_(<2 x s8>) = COPY %umin
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -1379,7 +1379,7 @@
    %copy_smax:_(<2 x s8>) = COPY %smax
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -1412,7 +1412,7 @@
    %copy_smin:_(<2 x s8>) = COPY %smin
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -1437,7 +1437,7 @@
    %biggerSized:_(<2 x s32>) = G_SHL %src, %thirty3_splat
    %copy2:_(<2 x s32>) = COPY %biggerSized
 )";
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
@@ -1479,7 +1479,7 @@
    %copy_assert3:_(<2 x s64>) = COPY %assert3
 )";
 
-  setUp(MIRString);
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
   if (!TM)
     return;
 
diff --git a/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp b/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
--- a/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
+++ b/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
@@ -25,7 +25,7 @@
 
 // Test G_ROTL/G_ROTR lowering.
 TEST_F(AArch64GISelMITest, LowerRotates) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -78,7 +78,7 @@
 
 // Test G_ROTL/G_ROTR non-pow2 lowering.
 TEST_F(AArch64GISelMITest, LowerRotatesNonPow2) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -135,7 +135,7 @@
 
 // Test vector G_ROTR lowering.
 TEST_F(AArch64GISelMITest, LowerRotatesVector) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -182,7 +182,7 @@
 // Test CTTZ expansion when CTTZ_ZERO_UNDEF is legal or custom,
 // in which case it becomes CTTZ_ZERO_UNDEF with select.
 TEST_F(AArch64GISelMITest, LowerBitCountingCTTZ0) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -214,7 +214,7 @@
 
 // CTTZ expansion in terms of CTLZ
 TEST_F(AArch64GISelMITest, LowerBitCountingCTTZ1) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -248,7 +248,7 @@
 
 // CTLZ scalar narrowing
 TEST_F(AArch64GISelMITest, NarrowScalarCTLZ) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -283,7 +283,7 @@
 
 // CTTZ scalar narrowing
 TEST_F(AArch64GISelMITest, NarrowScalarCTTZ) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -318,7 +318,7 @@
 
 // CTTZ expansion in terms of CTPOP
 TEST_F(AArch64GISelMITest, LowerBitCountingCTTZ2) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -351,7 +351,7 @@
 
 // CTPOP widening.
 TEST_F(AArch64GISelMITest, WidenBitCountingCTPOP1) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -385,7 +385,7 @@
 
 // Test a strange case where the result is wider than the source
 TEST_F(AArch64GISelMITest, WidenBitCountingCTPOP2) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -420,7 +420,7 @@
 
 // CTTZ_ZERO_UNDEF expansion in terms of CTTZ
 TEST_F(AArch64GISelMITest, LowerBitCountingCTTZ3) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -447,7 +447,7 @@
 
 // CTLZ expansion in terms of CTLZ_ZERO_UNDEF
 TEST_F(AArch64GISelMITest, LowerBitCountingCTLZ0) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -478,7 +478,7 @@
 
 // CTLZ expansion in terms of CTLZ_ZERO_UNDEF if the latter is a libcall
 TEST_F(AArch64GISelMITest, LowerBitCountingCTLZLibcall) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -509,7 +509,7 @@
 
 // CTLZ expansion
 TEST_F(AArch64GISelMITest, LowerBitCountingCTLZ1) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -550,7 +550,7 @@
 
 // CTLZ widening.
 TEST_F(AArch64GISelMITest, WidenBitCountingCTLZ) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -585,7 +585,7 @@
 
 // CTLZ_ZERO_UNDEF widening.
 TEST_F(AArch64GISelMITest, WidenBitCountingCTLZZeroUndef) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -621,7 +621,7 @@
 
 // CTPOP widening.
 TEST_F(AArch64GISelMITest, WidenBitCountingCTPOP) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -654,7 +654,7 @@
 
 // CTTZ_ZERO_UNDEF widening.
 TEST_F(AArch64GISelMITest, WidenBitCountingCTTZ_ZERO_UNDEF) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -688,7 +688,7 @@
 
 // CTTZ widening.
 TEST_F(AArch64GISelMITest, WidenBitCountingCTTZ) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -722,7 +722,7 @@
 }
 // UADDO widening.
 TEST_F(AArch64GISelMITest, WidenUADDO) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -761,7 +761,7 @@
 
 // USUBO widening.
 TEST_F(AArch64GISelMITest, WidenUSUBO) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -800,7 +800,7 @@
 
 // SADDO widening.
 TEST_F(AArch64GISelMITest, WidenSADDO) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -839,7 +839,7 @@
 
 // SSUBO widening.
 TEST_F(AArch64GISelMITest, WidenSSUBO) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -877,7 +877,7 @@
 }
 
 TEST_F(AArch64GISelMITest, WidenUADDE) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -917,7 +917,7 @@
 }
 
 TEST_F(AArch64GISelMITest, WidenUSUBE) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -957,7 +957,7 @@
 }
 
 TEST_F(AArch64GISelMITest, WidenSADDE) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -997,7 +997,7 @@
 }
 
 TEST_F(AArch64GISelMITest, WidenSSUBE) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -1037,7 +1037,7 @@
 }
 
 TEST_F(AArch64GISelMITest, NarrowUADDO) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -1074,7 +1074,7 @@
 }
 
 TEST_F(AArch64GISelMITest, NarrowUSUBO) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -1111,7 +1111,7 @@
 }
 
 TEST_F(AArch64GISelMITest, NarrowSADDO) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -1148,7 +1148,7 @@
 }
 
 TEST_F(AArch64GISelMITest, NarrowSSUBO) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -1185,7 +1185,7 @@
 }
 
 TEST_F(AArch64GISelMITest, NarrowUADDE) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -1224,7 +1224,7 @@
 }
 
 TEST_F(AArch64GISelMITest, NarrowUSUBE) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -1263,7 +1263,7 @@
 }
 
 TEST_F(AArch64GISelMITest, NarrowSADDE) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -1302,7 +1302,7 @@
 }
 
 TEST_F(AArch64GISelMITest, NarrowSSUBE) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -1341,7 +1341,7 @@
 }
 
 TEST_F(AArch64GISelMITest, FewerElementsAnd) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -1396,7 +1396,7 @@
 }
 
 TEST_F(AArch64GISelMITest, MoreElementsAnd) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -1439,7 +1439,7 @@
 }
 
 TEST_F(AArch64GISelMITest, FewerElementsPhi) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -1536,7 +1536,7 @@
 
 // FNEG expansion in terms of XOR
 TEST_F(AArch64GISelMITest, LowerFNEG) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -1584,7 +1584,7 @@
 }
 
 TEST_F(AArch64GISelMITest, LowerMinMax) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -1671,7 +1671,7 @@
 }
 
 TEST_F(AArch64GISelMITest, WidenScalarBuildVector) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -1720,7 +1720,7 @@
 }
 
 TEST_F(AArch64GISelMITest, LowerMergeValues) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -1825,7 +1825,7 @@
 }
 
 TEST_F(AArch64GISelMITest, WidenScalarMergeValuesPointer) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -1864,7 +1864,7 @@
 }
 
 TEST_F(AArch64GISelMITest, WidenSEXTINREG) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -1897,7 +1897,7 @@
 }
 
 TEST_F(AArch64GISelMITest, NarrowSEXTINREG) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -1930,7 +1930,7 @@
 }
 
 TEST_F(AArch64GISelMITest, NarrowSEXTINREG2) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -1964,7 +1964,7 @@
 }
 
 TEST_F(AArch64GISelMITest, LowerSEXTINREG) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -1996,7 +1996,7 @@
 }
 
 TEST_F(AArch64GISelMITest, LibcallFPExt) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -2035,7 +2035,7 @@
 }
 
 TEST_F(AArch64GISelMITest, LibcallFPTrunc) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -2077,7 +2077,7 @@
 }
 
 TEST_F(AArch64GISelMITest, LibcallSimple) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -2100,7 +2100,7 @@
 }
 
 TEST_F(AArch64GISelMITest, LibcallSRem) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -2157,7 +2157,7 @@
 }
 
 TEST_F(AArch64GISelMITest, LibcallURem) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -2214,7 +2214,7 @@
 }
 
 TEST_F(AArch64GISelMITest, LibcallCtlzZeroUndef) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -2267,7 +2267,7 @@
 }
 
 TEST_F(AArch64GISelMITest, LibcallFAdd) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -2319,7 +2319,7 @@
 }
 
 TEST_F(AArch64GISelMITest, LibcallFSub) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -2371,7 +2371,7 @@
 }
 
 TEST_F(AArch64GISelMITest, LibcallFMul) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -2423,7 +2423,7 @@
 }
 
 TEST_F(AArch64GISelMITest, LibcallFDiv) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -2475,7 +2475,7 @@
 }
 
 TEST_F(AArch64GISelMITest, LibcallFExp) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -2522,7 +2522,7 @@
 }
 
 TEST_F(AArch64GISelMITest, LibcallFExp2) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -2569,7 +2569,7 @@
 }
 
 TEST_F(AArch64GISelMITest, LibcallFRem) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -2616,7 +2616,7 @@
 }
 
 TEST_F(AArch64GISelMITest, LibcallFPow) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -2663,7 +2663,7 @@
 }
 
 TEST_F(AArch64GISelMITest, LibcallFMa) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -2711,7 +2711,7 @@
 }
 
 TEST_F(AArch64GISelMITest, LibcallFCeil) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -2758,7 +2758,7 @@
 }
 
 TEST_F(AArch64GISelMITest, LibcallFFloor) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -2805,7 +2805,7 @@
 }
 
 TEST_F(AArch64GISelMITest, LibcallFMinNum) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -2855,7 +2855,7 @@
 }
 
 TEST_F(AArch64GISelMITest, LibcallFMaxNum) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -2905,7 +2905,7 @@
 }
 
 TEST_F(AArch64GISelMITest, LibcallFSqrt) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -2952,7 +2952,7 @@
 }
 
 TEST_F(AArch64GISelMITest, LibcallFRint) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -2999,7 +2999,7 @@
 }
 
 TEST_F(AArch64GISelMITest, LibcallFNearbyInt) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -3049,7 +3049,7 @@
 }
 
 TEST_F(AArch64GISelMITest, NarrowScalarExtract) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -3088,7 +3088,7 @@
 }
 
 TEST_F(AArch64GISelMITest, LowerInsert) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -3189,7 +3189,7 @@
 
 // Test lowering of G_FFLOOR
 TEST_F(AArch64GISelMITest, LowerFFloor) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -3221,7 +3221,7 @@
 
 // Test lowering of G_BSWAP
 TEST_F(AArch64GISelMITest, LowerBSWAP) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -3263,7 +3263,7 @@
 
 // Test lowering of G_SDIVREM into G_SDIV and G_SREM
 TEST_F(AArch64GISelMITest, LowerSDIVREM) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -3294,7 +3294,7 @@
 
 // Test lowering of G_UDIVREM into G_UDIV and G_UREM
 TEST_F(AArch64GISelMITest, LowerUDIVREM) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -3325,7 +3325,7 @@
 
 // Test widening of G_UNMERGE_VALUES
 TEST_F(AArch64GISelMITest, WidenUnmerge) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -3373,7 +3373,7 @@
 }
 
 TEST_F(AArch64GISelMITest, BitcastLoad) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -3407,7 +3407,7 @@
 }
 
 TEST_F(AArch64GISelMITest, BitcastStore) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -3441,7 +3441,7 @@
 }
 
 TEST_F(AArch64GISelMITest, BitcastSelect) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -3488,7 +3488,7 @@
 }
 
 TEST_F(AArch64GISelMITest, BitcastBitOps) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -3540,7 +3540,7 @@
 }
 
 TEST_F(AArch64GISelMITest, CreateLibcall) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -3567,7 +3567,7 @@
 
 // Test narrowing of G_IMPLICIT_DEF
 TEST_F(AArch64GISelMITest, NarrowImplicitDef) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -3631,7 +3631,7 @@
 
 // Test widening of G_FREEZE
 TEST_F(AArch64GISelMITest, WidenFreeze) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -3681,7 +3681,7 @@
 
 // Test narrowing of G_FREEZE
 TEST_F(AArch64GISelMITest, NarrowFreeze) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -3769,7 +3769,7 @@
 
 // Test fewer elements of G_FREEZE
 TEST_F(AArch64GISelMITest, FewerElementsFreeze) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -3822,7 +3822,7 @@
 
 // Test more elements of G_FREEZE
 TEST_F(AArch64GISelMITest, MoreElementsFreeze) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -3858,7 +3858,7 @@
 
 // Test fewer elements of G_INSERT_VECTOR_ELEMENT
 TEST_F(AArch64GISelMITest, FewerElementsInsertVectorElt) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -3942,7 +3942,7 @@
 
 // Test widen scalar of G_UNMERGE_VALUES
 TEST_F(AArch64GISelMITest, widenScalarUnmerge) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
diff --git a/llvm/unittests/CodeGen/GlobalISel/LegalizerTest.cpp b/llvm/unittests/CodeGen/GlobalISel/LegalizerTest.cpp
--- a/llvm/unittests/CodeGen/GlobalISel/LegalizerTest.cpp
+++ b/llvm/unittests/CodeGen/GlobalISel/LegalizerTest.cpp
@@ -58,7 +58,7 @@
     %v:_(<2 x s8>) = G_LOAD %vptr:_(p0) :: (load 2, align 1)
     $h4 = COPY %v:_(<2 x s8>)
   )";
-  setUp(MIRString.rtrim(' '));
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString.rtrim(' '));
   if (!TM)
     return;
 
@@ -97,7 +97,7 @@
     %v0_ext:_(s16) = G_ANYEXT %v0:_(s8)
     $h4 = COPY %v0_ext:_(s16)
   )";
-  setUp(MIRString.rtrim(' '));
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString.rtrim(' '));
   if (!TM)
     return;
 
@@ -191,7 +191,7 @@
     $w4 = COPY %v0_zext:_(s32)
     $w5 = COPY %v1_sext:_(s32)
   )";
-  setUp(MIRString.rtrim(' '));
+  LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString.rtrim(' '));
   if (!TM)
     return;
 
diff --git a/llvm/unittests/CodeGen/GlobalISel/MachineIRBuilderTest.cpp b/llvm/unittests/CodeGen/GlobalISel/MachineIRBuilderTest.cpp
--- a/llvm/unittests/CodeGen/GlobalISel/MachineIRBuilderTest.cpp
+++ b/llvm/unittests/CodeGen/GlobalISel/MachineIRBuilderTest.cpp
@@ -10,7 +10,7 @@
 #include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
 
 TEST_F(AArch64GISelMITest, TestBuildConstantFConstant) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -41,7 +41,7 @@
 #ifndef NDEBUG
 
 TEST_F(AArch64GISelMITest, TestBuildConstantFConstantDeath) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -73,7 +73,7 @@
 #endif
 
 TEST_F(AArch64GISelMITest, DstOpSrcOp) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -99,7 +99,7 @@
 }
 
 TEST_F(AArch64GISelMITest, BuildUnmerge) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -120,7 +120,7 @@
 }
 
 TEST_F(AArch64GISelMITest, TestBuildFPInsts) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -156,7 +156,7 @@
 }
 
 TEST_F(AArch64GISelMITest, BuildIntrinsic) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -185,7 +185,7 @@
 }
 
 TEST_F(AArch64GISelMITest, BuildXor) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -214,7 +214,7 @@
 }
 
 TEST_F(AArch64GISelMITest, BuildBitCounts) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -242,7 +242,7 @@
 }
 
 TEST_F(AArch64GISelMITest, BuildCasts) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -267,7 +267,7 @@
 }
 
 TEST_F(AArch64GISelMITest, BuildMinMaxAbs) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -295,7 +295,7 @@
 }
 
 TEST_F(AArch64GISelMITest, BuildAtomicRMW) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -325,7 +325,7 @@
 }
 
 TEST_F(AArch64GISelMITest, BuildMerge) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -364,7 +364,7 @@
 }
 
 TEST_F(AArch64GISelMITest, BuildAddoSubo) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -400,7 +400,7 @@
 }
 
 TEST_F(AArch64GISelMITest, BuildBitfieldExtract) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
   LLT S64 = LLT::scalar(64);
diff --git a/llvm/unittests/CodeGen/GlobalISel/PatternMatchTest.cpp b/llvm/unittests/CodeGen/GlobalISel/PatternMatchTest.cpp
--- a/llvm/unittests/CodeGen/GlobalISel/PatternMatchTest.cpp
+++ b/llvm/unittests/CodeGen/GlobalISel/PatternMatchTest.cpp
@@ -31,7 +31,7 @@
 namespace {
 
 TEST_F(AArch64GISelMITest, MatchIntConstant) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
   auto MIBCst = B.buildConstant(LLT::scalar(64), 42);
@@ -42,7 +42,7 @@
 }
 
 TEST_F(AArch64GISelMITest, MatchBinaryOp) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
   LLT s32 = LLT::scalar(32);
@@ -156,7 +156,7 @@
 }
 
 TEST_F(AArch64GISelMITest, MatchICmp) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -181,7 +181,7 @@
 }
 
 TEST_F(AArch64GISelMITest, MatchFCmp) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -206,7 +206,7 @@
 }
 
 TEST_F(AArch64GISelMITest, MatchFPUnaryOp) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -268,7 +268,7 @@
 }
 
 TEST_F(AArch64GISelMITest, MatchExtendsTrunc) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -315,7 +315,7 @@
 }
 
 TEST_F(AArch64GISelMITest, MatchSpecificType) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -352,7 +352,7 @@
 }
 
 TEST_F(AArch64GISelMITest, MatchCombinators) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -386,7 +386,7 @@
 }
 
 TEST_F(AArch64GISelMITest, MatchMiscellaneous) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -413,7 +413,7 @@
 }
 
 TEST_F(AArch64GISelMITest, MatchSpecificConstant) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -435,7 +435,7 @@
 }
 
 TEST_F(AArch64GISelMITest, MatchZeroInt) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
   auto Zero = B.buildConstant(LLT::scalar(64), 0);
@@ -446,7 +446,7 @@
 }
 
 TEST_F(AArch64GISelMITest, MatchAllOnesInt) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
   auto AllOnes = B.buildConstant(LLT::scalar(64), -1);
@@ -457,7 +457,7 @@
 }
 
 TEST_F(AArch64GISelMITest, MatchNeg) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;
 
@@ -489,7 +489,7 @@
 }
 
 TEST_F(AArch64GISelMITest, MatchNot) {
-  setUp();
+  LLVMTargetMachine *TM = createTargetMachineAndModule();
   if (!TM)
     return;