diff --git a/clang/docs/SYCLSupport.rst b/clang/docs/SYCLSupport.rst
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+
+SYCL Compiler and Runtime architecture design
+=============================================
+
+Introduction
+------------
+
+This document describes the architecture of the SYCL compiler and runtime
+library. More details are provided in
+`external document <https://github.com/intel/llvm/blob/sycl/sycl/doc/CompilerAndRuntimeDesign.md>`_\ ,
+which are going to be added to clang documentation in the future.
+
+SYCL Compiler architecture
+--------------------------
+
+SYCL application compilation flow for ``spir``/``spir64`` target:
+
+
+.. image:: images/Compiler-HLD.svg
+ :target: images/Compiler-HLD.svg
+ :alt: High level component diagram for SYCL Compiler
+
+
+*Diagram 1. Application build flow.*
+
+SYCL compiler logically can be split into the host compiler and a number of
+device compilers—one per each supported target. Clang driver orchestrates the
+compilation process, it will invoke the device compiler once per each requested
+target, then it will invoke the host compiler to compile the host part of a
+SYCL source. In the simplest case, when compilation and linkage are done in one
+compiler driver invocation, once compilation is finished, the device object
+files (which are really LLVM IR files) are linked with the ``llvm-link`` tool.
+The resulting LLVM IR module can additionally processed to get program format
+suitable for execution by specific back-end. For instance, ``llvm-spirv`` tool
+translates LLVM bitcode to SPIR-V module for OpenCL back-end or ``ptxas``/
+``fatbin`` tools prepare LLVM for execution via CUDA back-end. After that
+``clang-offload-wrapper`` tool wraps device module in a host object file. Once
+all the host object files and the wrapped object with device code are ready, the
+driver invokes the usual platform linker and the final executable called "fat
+binary" is produced. This is a host executable or library with embedded linked
+images for each target specified at the command line.
+
+There are many variations of the compilation process depending on whether user
+chose to do one or more of the following:
+
+* perform compilation separately from linkage
+* compile the device module ahead-of-time for one or more targets
+* perform device code splitting so that device code is distributed across
+ multiple modules rather than enclosed in a single one
+* perform linkage of static device libraries
+ Sections below provide more details on some of those scenarios.
+
+SYCL sources can be also compiled as a regular C++ code, in this mode there is
+no "device part" of the code — everything is executed on the host.
+
+Device compiler is further split into the following major components:
+
+
+* **Front-end** - parses input source, "outlines" device part of the code,
+ applies additional restrictions on the device code (e.g. no exceptions or
+ virtual calls), generates LLVM IR for the device code only and an "integration
+ header" which provides information like kernel name, parameters order and data
+ type for the runtime library.
+* **Middle-end** - transforms the initial LLVM IR to get consumed by the
+ back-end. Today middle-end transformations include subset of LLVM standard
+ passes:
+
+ * Any LLVM IR transformation can be applied with only one limitation:
+ the back-end compiler should be able to handle the transformed LLVM IR.
+ NOTE: the performance impact of transformation passes depends on accurate
+ target information, so it makes sense to disable such transformation for
+ "virtual" targets like SPIR.
+ * Optionally: Address space inference pass
+ * Optionally: LLVM IR -> SPIR-V translator or LLVM -> PTX.
+
+* **Back-end** - produces native "device" code. It is shown as
+ "Target-specific LLVM compiler" box on Diagram 1. It is invoked either at
+ compile time (in ahead-of-time compilation scenario) or at runtime
+ (in just-in-time compilation scenario).
+
+*Design note: in current design we use SYCL device front-end compiler to produce
+the integration header for two reasons. First, it must be possible to use any
+host compiler to produce SYCL heterogeneous applications. Second, even if the
+same Clang compiler is used for the host compilation, information provided in
+the integration header is used (included) by the SYCL runtime implementation, so
+the header must be available before the host compilation starts.*
+
+SYCL support in Clang front-end
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+SYCL support in Clang front-end can be split into the following components:
+
+* Device code outlining. This component is responsible for identifying and
+ outlining "device code" in the single source.
+* SYCL kernel function object (functor or lambda) lowering. This component
+ creates a SPIR kernel function interface for SYCL kernels.
+* Device code diagnostics. This component enforces language restrictions on
+ device code.
+* Integration header generation. This component emits information required for
+ binding host and device parts of the SYCL code.
+
+Device code outlining
+~~~~~~~~~~~~~~~~~~~~~
+
+Here is a code example of a SYCL program that demonstrates compiler outlining
+work:
+
+.. code-block:: C++
+
+ int foo(int x) { return ++x; }
+ int bar(int x) { throw std::exception{"CPU code only!"}; }
+ ...
+ using namespace sycl;
+ queue Q;
+ buffer<int, 1> a{range<1>{1024}};
+ Q.submit([&](handler& cgh) {
+ auto A = a.get_access<access::mode::write>(cgh);
+ cgh.parallel_for<init_a>(range<1>{1024}, [=](id<1> index) {
+ A[index] = index[0] * 2 + foo(42);
+ });
+ }
+ ...
+
+In this example, the compiler needs to compile the lambda expression passed
+to the ``sycl::handler::parallel_for`` method, as well as the function ``foo``
+called from the lambda expression for the device.
+
+The compiler must also ignore the ``bar`` function when we compile the
+"device" part of the single source code, as it's unused inside the device
+portion of the source code (the contents of the lambda expression passed to the
+``sycl::handler::parallel_for`` and any function called from this lambda
+expression).
+
+The current approach is to use the SYCL kernel attribute in the runtime to
+mark code passed to ``sycl::handler::parallel_for`` as "kernel functions". The
+runtime library can't mark foo as "device" code - this is a compiler job: to
+traverse all symbols accessible from kernel functions and add them to the
+"device part" of the code marking them with the new SYCL device attribute.
+
+Lowering of lambda function objects and named function objects
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+SYCL memory objects shared between host and device can be accessed either
+through the use of raw pointers to unified memory (known as USM
+https://www.khronos.org/registry/SYCL/specs/sycl-2020/html/sycl-2020.html#sec:usm)
+or special ``accessor`` classes. SYCL device compiler sets address space
+attribute for raw pointers captured by SYCL kernels. ``accessor`` classes
+require additional processing as the "device" implementation of this class
+contains pointers to the device memory as a class member.
+`OpenCL SPIR-V environment specification <https://www.khronos.org/registry/OpenCL/specs/3.0-unified/html/OpenCL_Env.html#_kernels>`_
+doesn't allow passing structures with pointer type members as kernel parameters.
+
+SYCL also has a special mechanism for passing kernel arguments from host to the
+device. In OpenCL kernel arguments are set by calling ``clSetKernelArg``
+function for each kernel argument, meanwhile in SYCL all the kernel arguments
+are fields of "SYCL kernel function" which can be defined as a lambda function
+or a named function object and passed as an argument to SYCL function for
+invoking kernels (such as ``parallel_for`` or ``single_task``\ ). For example,
+in the previous code snippet above ``accessor`` ``A`` is one such captured
+kernel argument.
+
+To facilitate the mapping of SYCL kernel data members to SPIR-like kernel
+arguments we added the generation of an SPIR kernel function inside the
+compiler. A SPIR-like kernel function contains the body of the SYCL kernel
+function, receives OpenCL-like parameters and additionally does some
+manipulation to initialize SYCL kernel data members with these parameters.
+A PTX / CUDA backend uses the same lowering logic, but generated LLVM IR has
+minor differences (e.g. the identification of PTX kernels is different).
+
+The pseudo code for SPIR kernel function generated by the compiler looks like
+this:
+
+.. code-block:: C++
+
+ // Generated kernel function (expressed in OpenCL-like pseudo-code)
+ __kernel KernelName(global int* a) {
+ KernelType KernelFuncObj; // Actually kernel function object declaration
+ // doesn't have a name in AST.
+ // Let the kernel function object have one captured field - accessor A.
+ // We need to init it with global pointer from arguments:
+ KernelFuncObj.A.__init(a);
+ // Body of the SYCL kernel from SYCL headers:
+ {
+ KernelFuncObj();
+ }
+ }
+
+The compiler generates such kernel function for an instantiation of a function
+template with ``sycl_kernel`` attribute. SYCL kernel invocation methods can use
+following helper function template to lower SYCL kernel function object to
+SPIR-like kernel function:
+
+.. code-block:: C++
+
+ // SYCL accessor class template
+ namespace sycl {
+ template <typename T>
+ class accessor {
+ #ifdef __SYCL_DEVICE_ONLY__
+ private:
+ __global T* p;
+ // accessor initialization method
+ __init(__global int* a/*, ...*/) { p = a; [...] }
+ #endif // __SYCL_DEVICE_ONLY__
+ };
+ }
+
+ // SYCL kernel is a function object
+ class MyObj {
+ accessor<int> A; // accessor<int> contains a pointer to the global address space.
+ public:
+ void operator()(); // Body of the kernel
+ };
+
+ // Helper function template for kernel detection by the compiler
+ template <typename KernelName, typename KernelType/*, ...*/>
+ __attribute__((sycl_kernel)) void sycl_kernel_function(KernelType KernelFuncObj) {
+ // ...
+ KernelFuncObj();
+ }
+
+ [...]
+ MyObj Obj{/*some init*/};
+ // The compiler will generate kernel function for MyOjb similar to the example above
+ sycl_kernel_function<MyObj>(Obj);
+
+The compiler also emits the integration header with the information required for
+marshalling SPIR-like kernel arguments by the runtime library. Kernel function
+and integration header are generated by the compiler from ``Sema`` library using
+AST nodes.
+
+Additional details of kernel parameter passing may be found in the document
+`SYCL Kernel Parameter Handling and Array Support <https://github.com/intel/llvm/blob/sycl/sycl/doc/KernelParameterPassing.md>`_.
+
+TODO
+----
+
+* Consider unifying the design among GPGPU programming models like SYCL, HIP,
+ CUDA and OpenMP-offload. In particular, device code outlining is the area
+ where the difference among programming models might be minimal.
diff --git a/clang/docs/images/Compiler-HLD.svg b/clang/docs/images/Compiler-HLD.svg
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