diff --git a/clang/test/CodeGen/X86/ms-x86-intrinsics.c b/clang/test/CodeGen/X86/ms-x86-intrinsics.c --- a/clang/test/CodeGen/X86/ms-x86-intrinsics.c +++ b/clang/test/CodeGen/X86/ms-x86-intrinsics.c @@ -20,7 +20,8 @@ } // CHECK-I386-LABEL: define dso_local signext i16 @test__readfsword(i32 %Offset) // CHECK-I386: %inc = add i32 %Offset, 1 -// CHECK-I386: [[PTR:%[0-9]+]] = inttoptr i32 %inc to i16 addrspace(257)* +// CHECK-I386: [[BYTEPTR:%[0-9]+]] = inttoptr i32 %inc to i8 addrspace(257)* +// CHECK-I386: [[PTR:%[0-9]+]] = bitcast i8 addrspace(257)* [[BYTEPTR]] to i16 addrspace(257)* // CHECK-I386: [[VALUE:%[0-9]+]] = load volatile i16, i16 addrspace(257)* [[PTR]], align 2 // CHECK-I386: ret i16 [[VALUE:%[0-9]+]] @@ -29,7 +30,8 @@ } // CHECK-I386-LABEL: define dso_local i32 @test__readfsdword(i32 %Offset) // CHECK-I386: %inc = add i32 %Offset, 1 -// CHECK-I386: [[PTR:%[0-9]+]] = inttoptr i32 %inc to i32 addrspace(257)* +// CHECK-I386: [[BYTEPTR:%[0-9]+]] = inttoptr i32 %inc to i8 addrspace(257)* +// CHECK-I386: [[PTR:%[0-9]+]] = bitcast i8 addrspace(257)* [[BYTEPTR]] to i32 addrspace(257)* // CHECK-I386: [[VALUE:%[0-9]+]] = load volatile i32, i32 addrspace(257)* [[PTR]], align 4 // CHECK-I386: ret i32 [[VALUE:%[0-9]+]] @@ -38,7 +40,8 @@ } // CHECK-I386-LABEL: define dso_local i64 @test__readfsqword(i32 %Offset) // CHECK-I386: %inc = add i32 %Offset, 1 -// CHECK-I386: [[PTR:%[0-9]+]] = inttoptr i32 %inc to i64 addrspace(257)* +// CHECK-I386: [[BYTEPTR:%[0-9]+]] = inttoptr i32 %inc to i8 addrspace(257)* +// CHECK-I386: [[PTR:%[0-9]+]] = bitcast i8 addrspace(257)* [[BYTEPTR]] to i64 addrspace(257)* // CHECK-I386: [[VALUE:%[0-9]+]] = load volatile i64, i64 addrspace(257)* [[PTR]], align 8 // CHECK-I386: ret i64 [[VALUE:%[0-9]+]] #endif @@ -79,7 +82,8 @@ // CHECK-X64-LABEL: define dso_local i16 @test__readgsword(i32 %Offset) // CHECK-X64: %inc = add i32 %Offset, 1 // CHECK-X64: [[ZEXT:%[0-9]+]] = zext i32 %inc to i64 -// CHECK-X64: [[PTR:%[0-9]+]] = inttoptr i64 [[ZEXT]] to i16 addrspace(256)* +// CHECK-X64: [[BYTEPTR:%[0-9]+]] = inttoptr i64 [[ZEXT]] to i8 addrspace(256)* +// CHECK-X64: [[PTR:%[0-9]+]] = bitcast i8 addrspace(256)* [[BYTEPTR]] to i16 addrspace(256)* // CHECK-X64: [[VALUE:%[0-9]+]] = load volatile i16, i16 addrspace(256)* [[PTR]], align 2 // CHECK-X64: ret i16 [[VALUE:%[0-9]+]] @@ -89,7 +93,8 @@ // CHECK-X64-LABEL: define dso_local i32 @test__readgsdword(i32 %Offset) // CHECK-X64: %inc = add i32 %Offset, 1 // CHECK-X64: [[ZEXT:%[0-9]+]] = zext i32 %inc to i64 -// CHECK-X64: [[PTR:%[0-9]+]] = inttoptr i64 [[ZEXT]] to i32 addrspace(256)* +// CHECK-X64: [[BYTEPTR:%[0-9]+]] = inttoptr i64 [[ZEXT]] to i8 addrspace(256)* +// CHECK-X64: [[PTR:%[0-9]+]] = bitcast i8 addrspace(256)* [[BYTEPTR]] to i32 addrspace(256)* // CHECK-X64: [[VALUE:%[0-9]+]] = load volatile i32, i32 addrspace(256)* [[PTR]], align 4 // CHECK-X64: ret i32 [[VALUE:%[0-9]+]] @@ -99,7 +104,8 @@ // CHECK-X64-LABEL: define dso_local i64 @test__readgsqword(i32 %Offset) // CHECK-X64: %inc = add i32 %Offset, 1 // CHECK-X64: [[ZEXT:%[0-9]+]] = zext i32 %inc to i64 -// CHECK-X64: [[PTR:%[0-9]+]] = inttoptr i64 [[ZEXT]] to i64 addrspace(256)* +// CHECK-X64: [[BYTEPTR:%[0-9]+]] = inttoptr i64 [[ZEXT]] to i8 addrspace(256)* +// CHECK-X64: [[PTR:%[0-9]+]] = bitcast i8 addrspace(256)* [[BYTEPTR]] to i64 addrspace(256)* // CHECK-X64: [[VALUE:%[0-9]+]] = load volatile i64, i64 addrspace(256)* [[PTR]], align 8 // CHECK-X64: ret i64 [[VALUE:%[0-9]+]] diff --git a/clang/test/CodeGen/arm64_32-vaarg.c b/clang/test/CodeGen/arm64_32-vaarg.c --- a/clang/test/CodeGen/arm64_32-vaarg.c +++ b/clang/test/CodeGen/arm64_32-vaarg.c @@ -37,9 +37,8 @@ // CHECK: [[NEXT:%.*]] = getelementptr inbounds i8, i8* [[ALIGNED_ADDR]], i32 8 // CHECK: store i8* [[NEXT]], i8** %mylist - // CHECK: [[ADDR_STRUCT:%.*]] = inttoptr i32 [[ALIGNED]] to %struct.OneLongLong* - // CHECK: [[ADDR_I64:%.*]] = getelementptr inbounds %struct.OneLongLong, %struct.OneLongLong* [[ADDR_STRUCT]], i32 0, i32 0 - // CHECK: [[RES:%.*]] = load i64, i64* [[ADDR_I64]] + // CHECK: [[ADDR_STRUCT:%.*]] = bitcast i8* [[ALIGNED_ADDR]] to i64* + // CHECK: [[RES:%.*]] = load i64, i64* [[ADDR_STRUCT]] // CHECK: ret i64 [[RES]] return va_arg(*mylist, OneLongLong).a; diff --git a/clang/test/CodeGen/pointer-signext.c b/clang/test/CodeGen/pointer-signext.c --- a/clang/test/CodeGen/pointer-signext.c +++ b/clang/test/CodeGen/pointer-signext.c @@ -1,12 +1,9 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple x86_64-pc-win32 -emit-llvm -O2 -o - %s | FileCheck %s // Under Windows 64, int and long are 32-bits. Make sure pointer math doesn't // cause any sign extensions. -// CHECK: [[P:%.*]] = add i64 %param, -8 -// CHECK-NEXT: [[Q:%.*]] = inttoptr i64 [[P]] to [[R:%.*]]* -// CHECK-NEXT: {{%.*}} = getelementptr inbounds [[R]], [[R]]* [[Q]], i64 0, i32 0 - #define CR(Record, TYPE, Field) \ ((TYPE *) ((unsigned char *) (Record) - (unsigned char *) &(((TYPE *) 0)->Field))) @@ -20,6 +17,15 @@ LIST_ENTRY Link; } MEMORY_MAP; +// CHECK-LABEL: @test( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[SUB_PTR_SUB:%.*]] = add i64 [[PARAM:%.*]], -8 +// CHECK-NEXT: [[TMP0:%.*]] = inttoptr i64 [[SUB_PTR_SUB]] to i8* +// CHECK-NEXT: [[SIGNATURE:%.*]] = bitcast i8* [[TMP0]] to i64* +// CHECK-NEXT: [[TMP1:%.*]] = load i64, i64* [[SIGNATURE]], align 8, !tbaa [[TBAA2:![0-9]+]] +// CHECK-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 +// CHECK-NEXT: ret i32 [[CONV]] +// int test(unsigned long long param) { LIST_ENTRY *Link; diff --git a/clang/test/CodeGenCXX/RelativeVTablesABI/member-function-pointer.cpp b/clang/test/CodeGenCXX/RelativeVTablesABI/member-function-pointer.cpp --- a/clang/test/CodeGenCXX/RelativeVTablesABI/member-function-pointer.cpp +++ b/clang/test/CodeGenCXX/RelativeVTablesABI/member-function-pointer.cpp @@ -1,34 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // Member pointer to virtual function. // RUN: %clang_cc1 %s -triple=aarch64-unknown-fuchsia -O3 -S -o - -emit-llvm -fexperimental-relative-c++-abi-vtables | FileCheck %s -// CHECK: define{{.*}} void @_Z4funcP1AMS_FvvE(%class.A* %a, [2 x i64] %fn.coerce) local_unnamed_addr -// CHECK-NEXT: entry: -// CHECK-NEXT: [[fn_ptr:%.+]] = extractvalue [2 x i64] %fn.coerce, 0 -// CHECK-NEXT: [[adjust:%.+]] = extractvalue [2 x i64] %fn.coerce, 1 -// CHECK-NEXT: [[this:%.+]] = bitcast %class.A* %a to i8* -// CHECK-NEXT: [[this_adj:%.+]] = getelementptr inbounds i8, i8* [[this]], i64 [[adjust]] -// CHECK-NEXT: [[virtbit:%.+]] = and i64 [[fn_ptr]], 1 -// CHECK-NEXT: [[isvirt:%.+]] = icmp eq i64 [[virtbit]], 0 -// CHECK-NEXT: br i1 [[isvirt]], label %[[nonvirt:.+]], label %[[virt:.+]] -// CHECK: [[virt]]: // The loading of the virtual function here should be replaced with a llvm.load.relative() call. -// CHECK-NEXT: [[this:%.+]] = bitcast i8* [[this_adj]] to i8** -// CHECK-NEXT: [[vtable:%.+]] = load i8*, i8** [[this]], align 8 -// CHECK-NEXT: [[offset:%.+]] = add i64 [[fn_ptr]], -1 -// CHECK-NEXT: [[ptr:%.+]] = tail call i8* @llvm.load.relative.i64(i8* [[vtable]], i64 [[offset]]) -// CHECK-NEXT: [[method:%.+]] = bitcast i8* [[ptr]] to void (%class.A*)* -// CHECK-NEXT: br label %[[memptr_end:.+]] -// CHECK: [[nonvirt]]: -// CHECK-NEXT: [[method2:%.+]] = inttoptr i64 [[fn_ptr]] to void (%class.A*)* -// CHECK-NEXT: br label %[[memptr_end]] -// CHECK: [[memptr_end]]: -// CHECK-NEXT: [[method3:%.+]] = phi void (%class.A*)* [ [[method]], %[[virt]] ], [ [[method2]], %[[nonvirt]] ] -// CHECK-NEXT: [[a:%.+]] = bitcast i8* [[this_adj]] to %class.A* -// CHECK-NEXT: tail call void [[method3]](%class.A* {{[^,]*}} [[a]]) -// CHECK-NEXT: ret void -// CHECK-NEXT: } class A { public: @@ -42,6 +18,31 @@ typedef void (A::*A_foo)(); +// CHECK-LABEL: @_Z4funcP1AMS_FvvE( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[FN_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x i64] [[FN_COERCE:%.*]], 0 +// CHECK-NEXT: [[FN_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x i64] [[FN_COERCE]], 1 +// CHECK-NEXT: [[TMP0:%.*]] = bitcast %class.A* [[A:%.*]] to i8* +// CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i8, i8* [[TMP0]], i64 [[FN_COERCE_FCA_1_EXTRACT]] +// CHECK-NEXT: [[TMP2:%.*]] = and i64 [[FN_COERCE_FCA_0_EXTRACT]], 1 +// CHECK-NEXT: [[MEMPTR_ISVIRTUAL_NOT:%.*]] = icmp eq i64 [[TMP2]], 0 +// CHECK-NEXT: br i1 [[MEMPTR_ISVIRTUAL_NOT]], label [[MEMPTR_NONVIRTUAL:%.*]], label [[MEMPTR_VIRTUAL:%.*]] +// CHECK: memptr.virtual: +// CHECK-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP1]] to i8** +// CHECK-NEXT: [[VTABLE:%.*]] = load i8*, i8** [[TMP3]], align 8, !tbaa [[TBAA6:![0-9]+]] +// CHECK-NEXT: [[TMP4:%.*]] = add i64 [[FN_COERCE_FCA_0_EXTRACT]], -1 +// CHECK-NEXT: [[TMP5:%.*]] = tail call i8* @llvm.load.relative.i64(i8* [[VTABLE]], i64 [[TMP4]]), !nosanitize !9 +// CHECK-NEXT: br label [[MEMPTR_END:%.*]] +// CHECK: memptr.nonvirtual: +// CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[FN_COERCE_FCA_0_EXTRACT]] to i8* +// CHECK-NEXT: br label [[MEMPTR_END]] +// CHECK: memptr.end: +// CHECK-NEXT: [[DOTIN:%.*]] = phi i8* [ [[TMP5]], [[MEMPTR_VIRTUAL]] ], [ [[TMP6]], [[MEMPTR_NONVIRTUAL]] ] +// CHECK-NEXT: [[THIS_ADJUSTED:%.*]] = bitcast i8* [[TMP1]] to %class.A* +// CHECK-NEXT: [[TMP7:%.*]] = bitcast i8* [[DOTIN]] to void (%class.A*)* +// CHECK-NEXT: tail call void [[TMP7]](%class.A* nonnull dereferenceable(8) [[THIS_ADJUSTED]]) #[[ATTR2:[0-9]+]] +// CHECK-NEXT: ret void +// void func(A *a, A_foo fn) { (a->*fn)(); } diff --git a/clang/test/CodeGenOpenCL/as_type.cl b/clang/test/CodeGenOpenCL/as_type.cl --- a/clang/test/CodeGenOpenCL/as_type.cl +++ b/clang/test/CodeGenOpenCL/as_type.cl @@ -75,7 +75,8 @@ } //CHECK: define{{.*}} spir_func i32 addrspace(1)* @int_to_ptr(i32 %[[x:.*]]) -//CHECK: %[[cast:.*]] = inttoptr i32 %[[x]] to i32 addrspace(1)* +//CHECK: %[[cast_byte:.*]] = inttoptr i32 %[[x]] to i8 addrspace(1)* +//CHECK: %[[cast:.*]] = bitcast i8 addrspace(1)* %[[cast_byte]] to i32 addrspace(1)* //CHECK: ret i32 addrspace(1)* %[[cast]] global int* int_to_ptr(int x) { return __builtin_astype(x, global int*); @@ -100,7 +101,8 @@ //CHECK: define{{.*}} spir_func i32* @char3_to_ptr(<3 x i8> %[[x:.*]]) //CHECK: %[[astype:.*]] = shufflevector <3 x i8> %[[x]], <3 x i8> poison, <4 x i32> //CHECK: %[[cast1:.*]] = bitcast <4 x i8> %[[astype]] to i32 -//CHECK: %[[cast2:.*]] = inttoptr i32 %[[cast1]] to i32* +//CHECK: %[[cast_byte2:.*]] = inttoptr i32 %[[cast1]] to i8* +//CHECK: %[[cast2:.*]] = bitcast i8* %[[cast_byte2]] to i32* //CHECK: ret i32* %[[cast2]] int* char3_to_ptr(char3 x) { return __builtin_astype(x, int*); diff --git a/llvm/include/llvm/IR/PatternMatch.h b/llvm/include/llvm/IR/PatternMatch.h --- a/llvm/include/llvm/IR/PatternMatch.h +++ b/llvm/include/llvm/IR/PatternMatch.h @@ -1573,6 +1573,12 @@ return CastClass_match(Op); } +template +inline match_combine_or, OpTy> +m_BitCastOrSelf(const OpTy &Op) { + return m_CombineOr(m_BitCast(Op), Op); +} + template inline match_combine_or, OpTy> m_TruncOrSelf(const OpTy &Op) { diff --git a/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp b/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp --- a/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp +++ b/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp @@ -253,6 +253,9 @@ Type *MidTy = CI1->getDestTy(); Type *DstTy = CI2->getDestTy(); + assert(SrcTy != MidTy && MidTy != DstTy && + "Neither of the casts should be a no-op on their own."); + Instruction::CastOps firstOp = CI1->getOpcode(); Instruction::CastOps secondOp = CI2->getOpcode(); Type *SrcIntPtrTy = @@ -271,6 +274,10 @@ (Res == Instruction::PtrToInt && DstTy != SrcIntPtrTy)) Res = 0; + // Don't allow changing inttoptr pointer type. + if (firstOp == Instruction::IntToPtr && secondOp == Instruction::BitCast) + Res = 0; + return Instruction::CastOps(Res); } @@ -1933,6 +1940,17 @@ return new IntToPtrInst(P, CI.getType()); } + // If the target pointer element type isn't i8*, make it so. + // This will allow to CSE "pointers" that only differ by the pointee type, + // which is generally beneficial since e.g. SCEV can't look past inttoptr. + // Note that we must keep the address space! + Type *BytePtrTy = + CI.getType()->getWithNewType(Type::getInt8PtrTy(CI.getContext(), AS)); + if (CI.getType() != BytePtrTy) { + Value *P = Builder.CreateIntToPtr(CI.getOperand(0), BytePtrTy); + return new BitCastInst(P, CI.getType()); + } + if (Instruction *I = commonCastTransforms(CI)) return I; @@ -1980,12 +1998,16 @@ } Value *Vec, *Scalar, *Index; - if (match(SrcOp, m_OneUse(m_InsertElt(m_IntToPtr(m_Value(Vec)), - m_Value(Scalar), m_Value(Index)))) && + if (match(SrcOp, m_OneUse(m_BitCastOrSelf( + m_InsertElt(m_BitCastOrSelf(m_IntToPtr(m_Value(Vec))), + m_Value(Scalar), m_Value(Index))))) && Vec->getType() == Ty) { assert(Vec->getType()->getScalarSizeInBits() == PtrSize && "Wrong type"); - // Convert the scalar to int followed by insert to eliminate one cast: - // p2i (ins (i2p Vec), Scalar, Index --> ins Vec, (p2i Scalar), Index + // Convert the scalar to int optionally followed by a bitcast + // followed by insert to eliminate one cast: + // p2i (?bitcast (ins (?bitcast (i2p Vec)), Scalar, Index)) + // --> + // ins Vec, (p2i Scalar), Index Value *NewCast = Builder.CreatePtrToInt(Scalar, Ty->getScalarType()); return InsertElementInst::Create(Vec, NewCast, Index); } diff --git a/llvm/test/Transforms/InstCombine/2009-02-20-InstCombine-SROA.ll b/llvm/test/Transforms/InstCombine/2009-02-20-InstCombine-SROA.ll --- a/llvm/test/Transforms/InstCombine/2009-02-20-InstCombine-SROA.ll +++ b/llvm/test/Transforms/InstCombine/2009-02-20-InstCombine-SROA.ll @@ -46,139 +46,132 @@ ; IC-NEXT: br i1 [[TMP15]], label [[BB1_I_I:%.*]], label [[BB2_I_I:%.*]] ; IC: bb1.i.i: ; IC-NEXT: [[TMP16:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 -; IC-NEXT: [[TMP17:%.*]] = load i32*, i32** [[TMP16]], align 8 ; IC-NEXT: br label [[_ZST4FINDIN9__GNU_CXX17__NORMAL_ITERATORIPIST6VECTORIISAIIEEEEIET_S7_S7_RKT0__EXIT:%.*]] ; IC: bb2.i.i: -; IC-NEXT: [[TMP18:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 -; IC-NEXT: [[TMP19:%.*]] = load i32*, i32** [[TMP18]], align 8 -; IC-NEXT: [[TMP20:%.*]] = getelementptr i32, i32* [[TMP19]], i32 1 -; IC-NEXT: [[TMP21:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 -; IC-NEXT: store i32* [[TMP20]], i32** [[TMP21]], align 8 -; IC-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP20]], align 4 -; IC-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP0]], align 4 -; IC-NEXT: [[TMP24:%.*]] = icmp eq i32 [[TMP22]], [[TMP23]] -; IC-NEXT: br i1 [[TMP24]], label [[BB4_I_I:%.*]], label [[BB5_I_I:%.*]] +; IC-NEXT: [[TMP17:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 +; IC-NEXT: [[TMP18:%.*]] = load i32*, i32** [[TMP17]], align 8 +; IC-NEXT: [[TMP19:%.*]] = getelementptr i32, i32* [[TMP18]], i32 1 +; IC-NEXT: [[TMP20:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 +; IC-NEXT: store i32* [[TMP19]], i32** [[TMP20]], align 8 +; IC-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP19]], align 4 +; IC-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP0]], align 4 +; IC-NEXT: [[TMP23:%.*]] = icmp eq i32 [[TMP21]], [[TMP22]] +; IC-NEXT: br i1 [[TMP23]], label [[BB4_I_I:%.*]], label [[BB5_I_I:%.*]] ; IC: bb4.i.i: -; IC-NEXT: [[TMP25:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 -; IC-NEXT: [[TMP26:%.*]] = load i32*, i32** [[TMP25]], align 8 +; IC-NEXT: [[TMP24:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 ; IC-NEXT: br label [[_ZST4FINDIN9__GNU_CXX17__NORMAL_ITERATORIPIST6VECTORIISAIIEEEEIET_S7_S7_RKT0__EXIT]] ; IC: bb5.i.i: -; IC-NEXT: [[TMP27:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 -; IC-NEXT: [[TMP28:%.*]] = load i32*, i32** [[TMP27]], align 8 -; IC-NEXT: [[TMP29:%.*]] = getelementptr i32, i32* [[TMP28]], i32 1 -; IC-NEXT: [[TMP30:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 -; IC-NEXT: store i32* [[TMP29]], i32** [[TMP30]], align 8 -; IC-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP29]], align 4 -; IC-NEXT: [[TMP32:%.*]] = load i32, i32* [[TMP0]], align 4 -; IC-NEXT: [[TMP33:%.*]] = icmp eq i32 [[TMP31]], [[TMP32]] -; IC-NEXT: br i1 [[TMP33]], label [[BB7_I_I:%.*]], label [[BB8_I_I:%.*]] +; IC-NEXT: [[TMP25:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 +; IC-NEXT: [[TMP26:%.*]] = load i32*, i32** [[TMP25]], align 8 +; IC-NEXT: [[TMP27:%.*]] = getelementptr i32, i32* [[TMP26]], i32 1 +; IC-NEXT: [[TMP28:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 +; IC-NEXT: store i32* [[TMP27]], i32** [[TMP28]], align 8 +; IC-NEXT: [[TMP29:%.*]] = load i32, i32* [[TMP27]], align 4 +; IC-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP0]], align 4 +; IC-NEXT: [[TMP31:%.*]] = icmp eq i32 [[TMP29]], [[TMP30]] +; IC-NEXT: br i1 [[TMP31]], label [[BB7_I_I:%.*]], label [[BB8_I_I:%.*]] ; IC: bb7.i.i: -; IC-NEXT: [[TMP34:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 -; IC-NEXT: [[TMP35:%.*]] = load i32*, i32** [[TMP34]], align 8 +; IC-NEXT: [[TMP32:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 ; IC-NEXT: br label [[_ZST4FINDIN9__GNU_CXX17__NORMAL_ITERATORIPIST6VECTORIISAIIEEEEIET_S7_S7_RKT0__EXIT]] ; IC: bb8.i.i: +; IC-NEXT: [[TMP33:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 +; IC-NEXT: [[TMP34:%.*]] = load i32*, i32** [[TMP33]], align 8 +; IC-NEXT: [[TMP35:%.*]] = getelementptr i32, i32* [[TMP34]], i32 1 ; IC-NEXT: [[TMP36:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 -; IC-NEXT: [[TMP37:%.*]] = load i32*, i32** [[TMP36]], align 8 -; IC-NEXT: [[TMP38:%.*]] = getelementptr i32, i32* [[TMP37]], i32 1 -; IC-NEXT: [[TMP39:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 -; IC-NEXT: store i32* [[TMP38]], i32** [[TMP39]], align 8 -; IC-NEXT: [[TMP40:%.*]] = load i32, i32* [[TMP38]], align 4 -; IC-NEXT: [[TMP41:%.*]] = load i32, i32* [[TMP0]], align 4 -; IC-NEXT: [[TMP42:%.*]] = icmp eq i32 [[TMP40]], [[TMP41]] -; IC-NEXT: br i1 [[TMP42]], label [[BB10_I_I:%.*]], label [[BB11_I_I:%.*]] +; IC-NEXT: store i32* [[TMP35]], i32** [[TMP36]], align 8 +; IC-NEXT: [[TMP37:%.*]] = load i32, i32* [[TMP35]], align 4 +; IC-NEXT: [[TMP38:%.*]] = load i32, i32* [[TMP0]], align 4 +; IC-NEXT: [[TMP39:%.*]] = icmp eq i32 [[TMP37]], [[TMP38]] +; IC-NEXT: br i1 [[TMP39]], label [[BB10_I_I:%.*]], label [[BB11_I_I:%.*]] ; IC: bb10.i.i: -; IC-NEXT: [[TMP43:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 -; IC-NEXT: [[TMP44:%.*]] = load i32*, i32** [[TMP43]], align 8 +; IC-NEXT: [[TMP40:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 ; IC-NEXT: br label [[_ZST4FINDIN9__GNU_CXX17__NORMAL_ITERATORIPIST6VECTORIISAIIEEEEIET_S7_S7_RKT0__EXIT]] ; IC: bb11.i.i: -; IC-NEXT: [[TMP45:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 -; IC-NEXT: [[TMP46:%.*]] = load i32*, i32** [[TMP45]], align 8 -; IC-NEXT: [[TMP47:%.*]] = getelementptr i32, i32* [[TMP46]], i32 1 -; IC-NEXT: [[TMP48:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 -; IC-NEXT: store i32* [[TMP47]], i32** [[TMP48]], align 8 -; IC-NEXT: [[TMP49:%.*]] = add i32 [[__TRIP_COUNT_0_I_I:%.*]], -1 +; IC-NEXT: [[TMP41:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 +; IC-NEXT: [[TMP42:%.*]] = load i32*, i32** [[TMP41]], align 8 +; IC-NEXT: [[TMP43:%.*]] = getelementptr i32, i32* [[TMP42]], i32 1 +; IC-NEXT: [[TMP44:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 +; IC-NEXT: store i32* [[TMP43]], i32** [[TMP44]], align 8 +; IC-NEXT: [[TMP45:%.*]] = add i32 [[__TRIP_COUNT_0_I_I:%.*]], -1 ; IC-NEXT: br label [[BB12_I_I]] ; IC: bb12.i.i: -; IC-NEXT: [[__TRIP_COUNT_0_I_I]] = phi i32 [ [[TMP10]], [[ENTRY:%.*]] ], [ [[TMP49]], [[BB11_I_I]] ] -; IC-NEXT: [[TMP50:%.*]] = icmp sgt i32 [[__TRIP_COUNT_0_I_I]], 0 -; IC-NEXT: br i1 [[TMP50]], label [[BB_I_I:%.*]], label [[BB13_I_I:%.*]] +; IC-NEXT: [[__TRIP_COUNT_0_I_I]] = phi i32 [ [[TMP10]], [[ENTRY:%.*]] ], [ [[TMP45]], [[BB11_I_I]] ] +; IC-NEXT: [[TMP46:%.*]] = icmp sgt i32 [[__TRIP_COUNT_0_I_I]], 0 +; IC-NEXT: br i1 [[TMP46]], label [[BB_I_I:%.*]], label [[BB13_I_I:%.*]] ; IC: bb13.i.i: -; IC-NEXT: [[TMP51:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__LAST_ADDR_I_I]], i32 0, i32 0 -; IC-NEXT: [[TMP52:%.*]] = load i32*, i32** [[TMP51]], align 8 -; IC-NEXT: [[TMP53:%.*]] = ptrtoint i32* [[TMP52]] to i32 -; IC-NEXT: [[TMP54:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 -; IC-NEXT: [[TMP55:%.*]] = load i32*, i32** [[TMP54]], align 8 -; IC-NEXT: [[TMP56:%.*]] = ptrtoint i32* [[TMP55]] to i32 -; IC-NEXT: [[TMP57:%.*]] = sub i32 [[TMP53]], [[TMP56]] -; IC-NEXT: [[TMP58:%.*]] = ashr i32 [[TMP57]], 2 -; IC-NEXT: switch i32 [[TMP58]], label [[BB26_I_I:%.*]] [ +; IC-NEXT: [[TMP47:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__LAST_ADDR_I_I]], i32 0, i32 0 +; IC-NEXT: [[TMP48:%.*]] = load i32*, i32** [[TMP47]], align 8 +; IC-NEXT: [[TMP49:%.*]] = ptrtoint i32* [[TMP48]] to i32 +; IC-NEXT: [[TMP50:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 +; IC-NEXT: [[TMP51:%.*]] = load i32*, i32** [[TMP50]], align 8 +; IC-NEXT: [[TMP52:%.*]] = ptrtoint i32* [[TMP51]] to i32 +; IC-NEXT: [[TMP53:%.*]] = sub i32 [[TMP49]], [[TMP52]] +; IC-NEXT: [[TMP54:%.*]] = ashr i32 [[TMP53]], 2 +; IC-NEXT: switch i32 [[TMP54]], label [[BB26_I_I:%.*]] [ ; IC-NEXT: i32 1, label [[BB22_I_I:%.*]] ; IC-NEXT: i32 2, label [[BB18_I_I:%.*]] ; IC-NEXT: i32 3, label [[BB14_I_I:%.*]] ; IC-NEXT: ] ; IC: bb14.i.i: -; IC-NEXT: [[TMP59:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 -; IC-NEXT: [[TMP60:%.*]] = load i32*, i32** [[TMP59]], align 8 -; IC-NEXT: [[TMP61:%.*]] = load i32, i32* [[TMP60]], align 4 -; IC-NEXT: [[TMP62:%.*]] = load i32, i32* [[TMP0]], align 4 -; IC-NEXT: [[TMP63:%.*]] = icmp eq i32 [[TMP61]], [[TMP62]] -; IC-NEXT: br i1 [[TMP63]], label [[BB16_I_I:%.*]], label [[BB17_I_I:%.*]] +; IC-NEXT: [[TMP55:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 +; IC-NEXT: [[TMP56:%.*]] = load i32*, i32** [[TMP55]], align 8 +; IC-NEXT: [[TMP57:%.*]] = load i32, i32* [[TMP56]], align 4 +; IC-NEXT: [[TMP58:%.*]] = load i32, i32* [[TMP0]], align 4 +; IC-NEXT: [[TMP59:%.*]] = icmp eq i32 [[TMP57]], [[TMP58]] +; IC-NEXT: br i1 [[TMP59]], label [[BB16_I_I:%.*]], label [[BB17_I_I:%.*]] ; IC: bb16.i.i: -; IC-NEXT: [[TMP64:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 -; IC-NEXT: [[TMP65:%.*]] = load i32*, i32** [[TMP64]], align 8 +; IC-NEXT: [[TMP60:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 ; IC-NEXT: br label [[_ZST4FINDIN9__GNU_CXX17__NORMAL_ITERATORIPIST6VECTORIISAIIEEEEIET_S7_S7_RKT0__EXIT]] ; IC: bb17.i.i: -; IC-NEXT: [[TMP66:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 -; IC-NEXT: [[TMP67:%.*]] = load i32*, i32** [[TMP66]], align 8 -; IC-NEXT: [[TMP68:%.*]] = getelementptr i32, i32* [[TMP67]], i32 1 -; IC-NEXT: [[TMP69:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 -; IC-NEXT: store i32* [[TMP68]], i32** [[TMP69]], align 8 +; IC-NEXT: [[TMP61:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 +; IC-NEXT: [[TMP62:%.*]] = load i32*, i32** [[TMP61]], align 8 +; IC-NEXT: [[TMP63:%.*]] = getelementptr i32, i32* [[TMP62]], i32 1 +; IC-NEXT: [[TMP64:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 +; IC-NEXT: store i32* [[TMP63]], i32** [[TMP64]], align 8 ; IC-NEXT: br label [[BB18_I_I]] ; IC: bb18.i.i: -; IC-NEXT: [[TMP70:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 -; IC-NEXT: [[TMP71:%.*]] = load i32*, i32** [[TMP70]], align 8 -; IC-NEXT: [[TMP72:%.*]] = load i32, i32* [[TMP71]], align 4 -; IC-NEXT: [[TMP73:%.*]] = load i32, i32* [[TMP0]], align 4 -; IC-NEXT: [[TMP74:%.*]] = icmp eq i32 [[TMP72]], [[TMP73]] -; IC-NEXT: br i1 [[TMP74]], label [[BB20_I_I:%.*]], label [[BB21_I_I:%.*]] +; IC-NEXT: [[TMP65:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 +; IC-NEXT: [[TMP66:%.*]] = load i32*, i32** [[TMP65]], align 8 +; IC-NEXT: [[TMP67:%.*]] = load i32, i32* [[TMP66]], align 4 +; IC-NEXT: [[TMP68:%.*]] = load i32, i32* [[TMP0]], align 4 +; IC-NEXT: [[TMP69:%.*]] = icmp eq i32 [[TMP67]], [[TMP68]] +; IC-NEXT: br i1 [[TMP69]], label [[BB20_I_I:%.*]], label [[BB21_I_I:%.*]] ; IC: bb20.i.i: -; IC-NEXT: [[TMP75:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 -; IC-NEXT: [[TMP76:%.*]] = load i32*, i32** [[TMP75]], align 8 +; IC-NEXT: [[TMP70:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 ; IC-NEXT: br label [[_ZST4FINDIN9__GNU_CXX17__NORMAL_ITERATORIPIST6VECTORIISAIIEEEEIET_S7_S7_RKT0__EXIT]] ; IC: bb21.i.i: -; IC-NEXT: [[TMP77:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 -; IC-NEXT: [[TMP78:%.*]] = load i32*, i32** [[TMP77]], align 8 -; IC-NEXT: [[TMP79:%.*]] = getelementptr i32, i32* [[TMP78]], i32 1 -; IC-NEXT: [[TMP80:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 -; IC-NEXT: store i32* [[TMP79]], i32** [[TMP80]], align 8 +; IC-NEXT: [[TMP71:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 +; IC-NEXT: [[TMP72:%.*]] = load i32*, i32** [[TMP71]], align 8 +; IC-NEXT: [[TMP73:%.*]] = getelementptr i32, i32* [[TMP72]], i32 1 +; IC-NEXT: [[TMP74:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 +; IC-NEXT: store i32* [[TMP73]], i32** [[TMP74]], align 8 ; IC-NEXT: br label [[BB22_I_I]] ; IC: bb22.i.i: -; IC-NEXT: [[TMP81:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 -; IC-NEXT: [[TMP82:%.*]] = load i32*, i32** [[TMP81]], align 8 -; IC-NEXT: [[TMP83:%.*]] = load i32, i32* [[TMP82]], align 4 -; IC-NEXT: [[TMP84:%.*]] = load i32, i32* [[TMP0]], align 4 -; IC-NEXT: [[TMP85:%.*]] = icmp eq i32 [[TMP83]], [[TMP84]] -; IC-NEXT: br i1 [[TMP85]], label [[BB24_I_I:%.*]], label [[BB25_I_I:%.*]] +; IC-NEXT: [[TMP75:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 +; IC-NEXT: [[TMP76:%.*]] = load i32*, i32** [[TMP75]], align 8 +; IC-NEXT: [[TMP77:%.*]] = load i32, i32* [[TMP76]], align 4 +; IC-NEXT: [[TMP78:%.*]] = load i32, i32* [[TMP0]], align 4 +; IC-NEXT: [[TMP79:%.*]] = icmp eq i32 [[TMP77]], [[TMP78]] +; IC-NEXT: br i1 [[TMP79]], label [[BB24_I_I:%.*]], label [[BB25_I_I:%.*]] ; IC: bb24.i.i: -; IC-NEXT: [[TMP86:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 -; IC-NEXT: [[TMP87:%.*]] = load i32*, i32** [[TMP86]], align 8 +; IC-NEXT: [[TMP80:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 ; IC-NEXT: br label [[_ZST4FINDIN9__GNU_CXX17__NORMAL_ITERATORIPIST6VECTORIISAIIEEEEIET_S7_S7_RKT0__EXIT]] ; IC: bb25.i.i: -; IC-NEXT: [[TMP88:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 -; IC-NEXT: [[TMP89:%.*]] = load i32*, i32** [[TMP88]], align 8 -; IC-NEXT: [[TMP90:%.*]] = getelementptr i32, i32* [[TMP89]], i32 1 -; IC-NEXT: [[TMP91:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 -; IC-NEXT: store i32* [[TMP90]], i32** [[TMP91]], align 8 +; IC-NEXT: [[TMP81:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 +; IC-NEXT: [[TMP82:%.*]] = load i32*, i32** [[TMP81]], align 8 +; IC-NEXT: [[TMP83:%.*]] = getelementptr i32, i32* [[TMP82]], i32 1 +; IC-NEXT: [[TMP84:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0 +; IC-NEXT: store i32* [[TMP83]], i32** [[TMP84]], align 8 ; IC-NEXT: br label [[BB26_I_I]] ; IC: bb26.i.i: -; IC-NEXT: [[TMP92:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__LAST_ADDR_I_I]], i32 0, i32 0 -; IC-NEXT: [[TMP93:%.*]] = load i32*, i32** [[TMP92]], align 8 +; IC-NEXT: [[TMP85:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator > >", %"struct.__gnu_cxx::__normal_iterator > >"* [[__LAST_ADDR_I_I]], i32 0, i32 0 ; IC-NEXT: br label [[_ZST4FINDIN9__GNU_CXX17__NORMAL_ITERATORIPIST6VECTORIISAIIEEEEIET_S7_S7_RKT0__EXIT]] ; IC: _ZSt4findIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEiET_S7_S7_RKT0_.exit: -; IC-NEXT: [[DOT0_0_I_I:%.*]] = phi i32* [ [[TMP93]], [[BB26_I_I]] ], [ [[TMP87]], [[BB24_I_I]] ], [ [[TMP76]], [[BB20_I_I]] ], [ [[TMP65]], [[BB16_I_I]] ], [ [[TMP44]], [[BB10_I_I]] ], [ [[TMP35]], [[BB7_I_I]] ], [ [[TMP26]], [[BB4_I_I]] ], [ [[TMP17]], [[BB1_I_I]] ] +; IC-NEXT: [[DOTIN_IN:%.*]] = phi i32** [ [[TMP85]], [[BB26_I_I]] ], [ [[TMP80]], [[BB24_I_I]] ], [ [[TMP70]], [[BB20_I_I]] ], [ [[TMP60]], [[BB16_I_I]] ], [ [[TMP40]], [[BB10_I_I]] ], [ [[TMP32]], [[BB7_I_I]] ], [ [[TMP24]], [[BB4_I_I]] ], [ [[TMP16]], [[BB1_I_I]] ] ; IC-NEXT: br label [[RETURN:%.*]] ; IC: return: -; IC-NEXT: ret i32* [[DOT0_0_I_I]] +; IC-NEXT: [[TMP86:%.*]] = load i32*, i32** [[DOTIN_IN]], align 4 +; IC-NEXT: ret i32* [[TMP86]] ; ; IC_SROA-LABEL: @_Z3fooRSt6vectorIiSaIiEE( ; IC_SROA-NEXT: entry: @@ -269,10 +262,10 @@ ; IC_SROA: bb26.i.i: ; IC_SROA-NEXT: br label [[_ZST4FINDIN9__GNU_CXX17__NORMAL_ITERATORIPIST6VECTORIISAIIEEEEIET_S7_S7_RKT0__EXIT]] ; IC_SROA: _ZSt4findIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEiET_S7_S7_RKT0_.exit: -; IC_SROA-NEXT: [[DOT0_0_I_I:%.*]] = phi i32* [ [[TMP1]], [[BB26_I_I]] ], [ [[__FIRST_ADDR_I_I_SROA_0_2]], [[BB24_I_I]] ], [ [[__FIRST_ADDR_I_I_SROA_0_1]], [[BB20_I_I]] ], [ [[__FIRST_ADDR_I_I_SROA_0_0]], [[BB16_I_I]] ], [ [[TMP16]], [[BB10_I_I]] ], [ [[TMP13]], [[BB7_I_I]] ], [ [[TMP10]], [[BB4_I_I]] ], [ [[__FIRST_ADDR_I_I_SROA_0_0]], [[BB1_I_I]] ] +; IC_SROA-NEXT: [[DOTIN_IN_SROA_SPECULATED:%.*]] = phi i32* [ [[TMP1]], [[BB26_I_I]] ], [ [[__FIRST_ADDR_I_I_SROA_0_2]], [[BB24_I_I]] ], [ [[__FIRST_ADDR_I_I_SROA_0_1]], [[BB20_I_I]] ], [ [[__FIRST_ADDR_I_I_SROA_0_0]], [[BB16_I_I]] ], [ [[TMP16]], [[BB10_I_I]] ], [ [[TMP13]], [[BB7_I_I]] ], [ [[TMP10]], [[BB4_I_I]] ], [ [[__FIRST_ADDR_I_I_SROA_0_0]], [[BB1_I_I]] ] ; IC_SROA-NEXT: br label [[RETURN:%.*]] ; IC_SROA: return: -; IC_SROA-NEXT: ret i32* [[DOT0_0_I_I]] +; IC_SROA-NEXT: ret i32* [[DOTIN_IN_SROA_SPECULATED]] ; entry: %0 = alloca %"struct.__gnu_cxx::__normal_iterator > >" diff --git a/llvm/test/Transforms/InstCombine/PR30597.ll b/llvm/test/Transforms/InstCombine/PR30597.ll --- a/llvm/test/Transforms/InstCombine/PR30597.ll +++ b/llvm/test/Transforms/InstCombine/PR30597.ll @@ -24,7 +24,8 @@ ; CHECK-LABEL: @function( ; CHECK-NEXT: entry-block: ; CHECK-NEXT: [[LOADED:%.*]] = load i64, i64* [[TMP0:%.*]], align 8, !range [[RNG0:![0-9]+]] -; CHECK-NEXT: [[INTTOPTR:%.*]] = inttoptr i64 [[LOADED]] to i64* +; CHECK-NEXT: [[TMP1:%.*]] = inttoptr i64 [[LOADED]] to i8* +; CHECK-NEXT: [[INTTOPTR:%.*]] = bitcast i8* [[TMP1]] to i64* ; CHECK-NEXT: ret i64* [[INTTOPTR]] ; entry-block: diff --git a/llvm/test/Transforms/InstCombine/align-addr.ll b/llvm/test/Transforms/InstCombine/align-addr.ll --- a/llvm/test/Transforms/InstCombine/align-addr.ll +++ b/llvm/test/Transforms/InstCombine/align-addr.ll @@ -10,7 +10,8 @@ ; CHECK-NEXT: entry: ; CHECK-NEXT: [[C:%.*]] = ptrtoint i8* [[B:%.*]] to i64 ; CHECK-NEXT: [[D:%.*]] = and i64 [[C]], -16 -; CHECK-NEXT: [[E:%.*]] = inttoptr i64 [[D]] to double* +; CHECK-NEXT: [[TMP0:%.*]] = inttoptr i64 [[D]] to i8* +; CHECK-NEXT: [[E:%.*]] = bitcast i8* [[TMP0]] to double* ; CHECK-NEXT: [[V:%.*]] = shl i64 [[U:%.*]], 1 ; CHECK-NEXT: [[Z:%.*]] = and i64 [[Y:%.*]], -2 ; CHECK-NEXT: [[T1421:%.*]] = icmp eq i64 [[N:%.*]], 0 diff --git a/llvm/test/Transforms/InstCombine/apint-call-cast-target.ll b/llvm/test/Transforms/InstCombine/apint-call-cast-target.ll --- a/llvm/test/Transforms/InstCombine/apint-call-cast-target.ll +++ b/llvm/test/Transforms/InstCombine/apint-call-cast-target.ll @@ -11,8 +11,9 @@ ; CHECK-LABEL: @ctime( ; CHECK-NEXT: entry: ; CHECK-NEXT: [[I0:%.*]] = call i32 @main2() -; CHECK-NEXT: [[TMP1:%.*]] = inttoptr i32 [[I0]] to i7* -; CHECK-NEXT: ret i7* [[TMP1]] +; CHECK-NEXT: [[TMP1:%.*]] = inttoptr i32 [[I0]] to i8* +; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i7* +; CHECK-NEXT: ret i7* [[TMP2]] ; entry: %i0 = call i7* bitcast (i32 ()* @main2 to i7* ()*)( ) diff --git a/llvm/test/Transforms/InstCombine/cast_ptr.ll b/llvm/test/Transforms/InstCombine/cast_ptr.ll --- a/llvm/test/Transforms/InstCombine/cast_ptr.ll +++ b/llvm/test/Transforms/InstCombine/cast_ptr.ll @@ -218,10 +218,11 @@ define <2 x i32> @insertelt_extra_use1(<2 x i32> %x, i32* %p) { ; CHECK-LABEL: @insertelt_extra_use1( -; CHECK-NEXT: [[V:%.*]] = inttoptr <2 x i32> [[X:%.*]] to <2 x i32*> +; CHECK-NEXT: [[TMP1:%.*]] = inttoptr <2 x i32> [[X:%.*]] to <2 x i8*> +; CHECK-NEXT: [[V:%.*]] = bitcast <2 x i8*> [[TMP1]] to <2 x i32*> ; CHECK-NEXT: call void @use(<2 x i32*> [[V]]) -; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint i32* [[P:%.*]] to i32 -; CHECK-NEXT: [[R:%.*]] = insertelement <2 x i32> [[X]], i32 [[TMP1]], i32 0 +; CHECK-NEXT: [[TMP2:%.*]] = ptrtoint i32* [[P:%.*]] to i32 +; CHECK-NEXT: [[R:%.*]] = insertelement <2 x i32> [[X]], i32 [[TMP2]], i32 0 ; CHECK-NEXT: ret <2 x i32> [[R]] ; %v = inttoptr <2 x i32> %x to <2 x i32*> @@ -233,7 +234,8 @@ define <2 x i32> @insertelt_extra_use2(<2 x i32> %x, i32* %p) { ; CHECK-LABEL: @insertelt_extra_use2( -; CHECK-NEXT: [[V:%.*]] = inttoptr <2 x i32> [[X:%.*]] to <2 x i32*> +; CHECK-NEXT: [[TMP1:%.*]] = inttoptr <2 x i32> [[X:%.*]] to <2 x i8*> +; CHECK-NEXT: [[V:%.*]] = bitcast <2 x i8*> [[TMP1]] to <2 x i32*> ; CHECK-NEXT: [[I:%.*]] = insertelement <2 x i32*> [[V]], i32* [[P:%.*]], i32 0 ; CHECK-NEXT: call void @use(<2 x i32*> [[I]]) ; CHECK-NEXT: [[R:%.*]] = ptrtoint <2 x i32*> [[I]] to <2 x i32> diff --git a/llvm/test/Transforms/InstCombine/indexed-gep-compares.ll b/llvm/test/Transforms/InstCombine/indexed-gep-compares.ll --- a/llvm/test/Transforms/InstCombine/indexed-gep-compares.ll +++ b/llvm/test/Transforms/InstCombine/indexed-gep-compares.ll @@ -35,16 +35,19 @@ define i32 *@test2(i32 %A, i32 %Offset) { ; CHECK-LABEL: @test2( ; CHECK-NEXT: entry: +; CHECK-NEXT: [[TMP0:%.*]] = inttoptr i32 [[A:%.*]] to i8* +; CHECK-NEXT: [[A_PTR:%.*]] = bitcast i8* [[TMP0]] to i32* +; CHECK-NEXT: [[TMP:%.*]] = getelementptr inbounds i32, i32* [[A_PTR]], i32 [[OFFSET:%.*]] ; CHECK-NEXT: br label [[BB:%.*]] ; CHECK: bb: -; CHECK-NEXT: [[RHS_IDX:%.*]] = phi i32 [ [[RHS_ADD:%.*]], [[BB]] ], [ [[OFFSET:%.*]], [[ENTRY:%.*]] ] -; CHECK-NEXT: [[RHS_ADD]] = add nsw i32 [[RHS_IDX]], 1 -; CHECK-NEXT: [[COND:%.*]] = icmp sgt i32 [[RHS_IDX]], 100 +; CHECK-NEXT: [[RHS:%.*]] = phi i32* [ [[RHS_NEXT:%.*]], [[BB]] ], [ [[TMP]], [[ENTRY:%.*]] ] +; CHECK-NEXT: [[LHS:%.*]] = getelementptr inbounds i8, i8* [[TMP0]], i32 400 +; CHECK-NEXT: [[RHS_NEXT]] = getelementptr inbounds i32, i32* [[RHS]], i32 1 +; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[RHS]] to i8* +; CHECK-NEXT: [[COND:%.*]] = icmp ult i8* [[LHS]], [[TMP1]] ; CHECK-NEXT: br i1 [[COND]], label [[BB2:%.*]], label [[BB]] ; CHECK: bb2: -; CHECK-NEXT: [[RHSTO_PTR:%.*]] = inttoptr i32 [[A:%.*]] to i32* -; CHECK-NEXT: [[RHS_PTR:%.*]] = getelementptr inbounds i32, i32* [[RHSTO_PTR]], i32 [[RHS_IDX]] -; CHECK-NEXT: ret i32* [[RHS_PTR]] +; CHECK-NEXT: ret i32* [[RHS]] ; entry: %A.ptr = inttoptr i32 %A to i32* @@ -102,17 +105,20 @@ define i32 *@test4(i16 %A, i32 %Offset) { ; CHECK-LABEL: @test4( ; CHECK-NEXT: entry: +; CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[A:%.*]] to i32 +; CHECK-NEXT: [[TMP1:%.*]] = inttoptr i32 [[TMP0]] to i8* +; CHECK-NEXT: [[A_PTR:%.*]] = bitcast i8* [[TMP1]] to i32* +; CHECK-NEXT: [[TMP:%.*]] = getelementptr inbounds i32, i32* [[A_PTR]], i32 [[OFFSET:%.*]] ; CHECK-NEXT: br label [[BB:%.*]] ; CHECK: bb: -; CHECK-NEXT: [[RHS_IDX:%.*]] = phi i32 [ [[RHS_ADD:%.*]], [[BB]] ], [ [[OFFSET:%.*]], [[ENTRY:%.*]] ] -; CHECK-NEXT: [[RHS_ADD]] = add nsw i32 [[RHS_IDX]], 1 -; CHECK-NEXT: [[COND:%.*]] = icmp sgt i32 [[RHS_IDX]], 100 +; CHECK-NEXT: [[RHS:%.*]] = phi i32* [ [[RHS_NEXT:%.*]], [[BB]] ], [ [[TMP]], [[ENTRY:%.*]] ] +; CHECK-NEXT: [[LHS:%.*]] = getelementptr inbounds i8, i8* [[TMP1]], i32 400 +; CHECK-NEXT: [[RHS_NEXT]] = getelementptr inbounds i32, i32* [[RHS]], i32 1 +; CHECK-NEXT: [[TMP2:%.*]] = bitcast i32* [[RHS]] to i8* +; CHECK-NEXT: [[COND:%.*]] = icmp ult i8* [[LHS]], [[TMP2]] ; CHECK-NEXT: br i1 [[COND]], label [[BB2:%.*]], label [[BB]] ; CHECK: bb2: -; CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[A:%.*]] to i32 -; CHECK-NEXT: [[RHSTO_PTR:%.*]] = inttoptr i32 [[TMP0]] to i32* -; CHECK-NEXT: [[RHS_PTR:%.*]] = getelementptr inbounds i32, i32* [[RHSTO_PTR]], i32 [[RHS_IDX]] -; CHECK-NEXT: ret i32* [[RHS_PTR]] +; CHECK-NEXT: ret i32* [[RHS]] ; entry: %A.ptr = inttoptr i16 %A to i32* @@ -186,16 +192,19 @@ ; CHECK-NEXT: [[A:%.*]] = invoke i32 @fun_i32() ; CHECK-NEXT: to label [[CONT:%.*]] unwind label [[LPAD:%.*]] ; CHECK: cont: +; CHECK-NEXT: [[TMP0:%.*]] = inttoptr i32 [[A]] to i8* +; CHECK-NEXT: [[A_PTR:%.*]] = bitcast i8* [[TMP0]] to i32* +; CHECK-NEXT: [[TMP:%.*]] = getelementptr inbounds i32, i32* [[A_PTR]], i32 [[OFFSET:%.*]] ; CHECK-NEXT: br label [[BB:%.*]] ; CHECK: bb: -; CHECK-NEXT: [[RHS_IDX:%.*]] = phi i32 [ [[RHS_ADD:%.*]], [[BB]] ], [ [[OFFSET:%.*]], [[CONT]] ] -; CHECK-NEXT: [[RHS_ADD]] = add nsw i32 [[RHS_IDX]], 1 -; CHECK-NEXT: [[COND:%.*]] = icmp sgt i32 [[RHS_IDX]], 100 +; CHECK-NEXT: [[RHS:%.*]] = phi i32* [ [[RHS_NEXT:%.*]], [[BB]] ], [ [[TMP]], [[CONT]] ] +; CHECK-NEXT: [[LHS:%.*]] = getelementptr inbounds i8, i8* [[TMP0]], i32 400 +; CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[LHS]] to i32* +; CHECK-NEXT: [[RHS_NEXT]] = getelementptr inbounds i32, i32* [[RHS]], i32 1 +; CHECK-NEXT: [[COND:%.*]] = icmp ugt i32* [[RHS]], [[TMP1]] ; CHECK-NEXT: br i1 [[COND]], label [[BB2:%.*]], label [[BB]] ; CHECK: bb2: -; CHECK-NEXT: [[RHSTO_PTR:%.*]] = inttoptr i32 [[A]] to i32* -; CHECK-NEXT: [[RHS_PTR:%.*]] = getelementptr inbounds i32, i32* [[RHSTO_PTR]], i32 [[RHS_IDX]] -; CHECK-NEXT: ret i32* [[RHS_PTR]] +; CHECK-NEXT: ret i32* [[RHS]] ; CHECK: lpad: ; CHECK-NEXT: [[L:%.*]] = landingpad { i8*, i32 } ; CHECK-NEXT: cleanup @@ -260,11 +269,10 @@ ; CHECK-NEXT: [[CASTI8:%.*]] = inttoptr i32 [[TMP0]] to i8* ; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[OFFSET:%.*]] to i32 ; CHECK-NEXT: [[GEPI8:%.*]] = getelementptr inbounds i8, i8* [[CASTI8]], i32 [[TMP1]] -; CHECK-NEXT: [[CAST:%.*]] = bitcast i8* [[GEPI8]] to i32** ; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[LD]] to i32 -; CHECK-NEXT: [[PTRCAST:%.*]] = inttoptr i32 [[TMP2]] to i32** -; CHECK-NEXT: [[GEPI32:%.*]] = getelementptr inbounds i32*, i32** [[PTRCAST]], i32 1 -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32** [[GEPI32]], [[CAST]] +; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i32 [[TMP2]] to i8* +; CHECK-NEXT: [[GEPI32:%.*]] = getelementptr inbounds i8, i8* [[TMP3]], i32 4 +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8* [[GEPI32]], [[GEPI8]] ; CHECK-NEXT: ret i1 [[CMP]] ; entry: diff --git a/llvm/test/Transforms/InstCombine/intptr1.ll b/llvm/test/Transforms/InstCombine/intptr1.ll --- a/llvm/test/Transforms/InstCombine/intptr1.ll +++ b/llvm/test/Transforms/InstCombine/intptr1.ll @@ -8,7 +8,8 @@ ; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]] ; CHECK: for.body.preheader: ; CHECK-NEXT: [[B:%.*]] = load i64, i64* [[B_I64:%.*]], align 8 -; CHECK-NEXT: [[B_PTR:%.*]] = inttoptr i64 [[B]] to float* +; CHECK-NEXT: [[TMP0:%.*]] = inttoptr i64 [[B]] to i8* +; CHECK-NEXT: [[B_PTR:%.*]] = bitcast i8* [[TMP0]] to float* ; CHECK-NEXT: br label [[FOR_BODY:%.*]] ; CHECK: for.body: ; CHECK-NEXT: [[A_ADDR_03:%.*]] = phi float* [ [[INCDEC_PTR:%.*]], [[FOR_BODY]] ], [ [[A]], [[FOR_BODY_PREHEADER]] ] @@ -61,7 +62,8 @@ ; CHECK: for.body: ; CHECK-NEXT: [[A_ADDR_03:%.*]] = phi float* [ [[INCDEC_PTR:%.*]], [[BB:%.*]] ], [ [[A]], [[FOR_BODY_PREHEADER]] ] ; CHECK-NEXT: [[B_ADDR_02:%.*]] = phi i64 [ [[ADD_INT:%.*]], [[BB]] ], [ [[B]], [[FOR_BODY_PREHEADER]] ] -; CHECK-NEXT: [[TMP:%.*]] = inttoptr i64 [[B_ADDR_02]] to float* +; CHECK-NEXT: [[TMP0:%.*]] = inttoptr i64 [[B_ADDR_02]] to i8* +; CHECK-NEXT: [[TMP:%.*]] = bitcast i8* [[TMP0]] to float* ; CHECK-NEXT: [[PTRCMP:%.*]] = icmp ult float* [[TMP]], [[A_END]] ; CHECK-NEXT: br i1 [[PTRCMP]], label [[FOR_END]], label [[BB]] ; CHECK: bb: @@ -116,7 +118,8 @@ ; CHECK: for.body.preheader: ; CHECK-NEXT: [[B_I64:%.*]] = bitcast float** [[B_FLOAT:%.*]] to i64* ; CHECK-NEXT: [[B:%.*]] = load i64, i64* [[B_I64]], align 8 -; CHECK-NEXT: [[B_PTR:%.*]] = inttoptr i64 [[B]] to float* +; CHECK-NEXT: [[TMP0:%.*]] = inttoptr i64 [[B]] to i8* +; CHECK-NEXT: [[B_PTR:%.*]] = bitcast i8* [[TMP0]] to float* ; CHECK-NEXT: br label [[FOR_BODY:%.*]] ; CHECK: for.body: ; CHECK-NEXT: [[A_ADDR_03:%.*]] = phi float* [ [[INCDEC_PTR:%.*]], [[FOR_BODY]] ], [ [[A]], [[FOR_BODY_PREHEADER]] ] @@ -168,7 +171,8 @@ ; CHECK: for.body.preheader: ; CHECK-NEXT: [[B_I64:%.*]] = bitcast i8** [[B_I8P:%.*]] to i64* ; CHECK-NEXT: [[B:%.*]] = load i64, i64* [[B_I64]], align 8 -; CHECK-NEXT: [[B_PTR:%.*]] = inttoptr i64 [[B]] to float* +; CHECK-NEXT: [[TMP0:%.*]] = inttoptr i64 [[B]] to i8* +; CHECK-NEXT: [[B_PTR:%.*]] = bitcast i8* [[TMP0]] to float* ; CHECK-NEXT: br label [[FOR_BODY:%.*]] ; CHECK: for.body: ; CHECK-NEXT: [[A_ADDR_03:%.*]] = phi float* [ [[INCDEC_PTR:%.*]], [[FOR_BODY]] ], [ [[A]], [[FOR_BODY_PREHEADER]] ] diff --git a/llvm/test/Transforms/InstCombine/intptr3.ll b/llvm/test/Transforms/InstCombine/intptr3.ll --- a/llvm/test/Transforms/InstCombine/intptr3.ll +++ b/llvm/test/Transforms/InstCombine/intptr3.ll @@ -7,15 +7,16 @@ ; CHECK-NEXT: [[CMP1:%.*]] = icmp ult float* [[A:%.*]], [[A_END:%.*]] ; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]] ; CHECK: for.body.preheader: -; CHECK-NEXT: [[B_FLOAT:%.*]] = inttoptr i64 [[B:%.*]] to float* +; CHECK-NEXT: [[TMP0:%.*]] = inttoptr i64 [[B:%.*]] to i8* ; CHECK-NEXT: br label [[FOR_BODY:%.*]] ; CHECK: for.body: ; CHECK-NEXT: [[A_ADDR_03:%.*]] = phi float* [ [[INCDEC_PTR:%.*]], [[FOR_BODY]] ], [ [[A]], [[FOR_BODY_PREHEADER]] ] -; CHECK-NEXT: [[B_ADDR_FLOAT:%.*]] = phi float* [ [[B_ADDR_FLOAT_INC:%.*]], [[FOR_BODY]] ], [ [[B_FLOAT]], [[FOR_BODY_PREHEADER]] ] +; CHECK-NEXT: [[B_ADDR_I64_PTR:%.*]] = phi i8* [ [[B_ADDR_FLOAT_INC:%.*]], [[FOR_BODY]] ], [ [[TMP0]], [[FOR_BODY_PREHEADER]] ] +; CHECK-NEXT: [[B_ADDR_FLOAT:%.*]] = bitcast i8* [[B_ADDR_I64_PTR]] to float* ; CHECK-NEXT: [[L:%.*]] = load float, float* [[B_ADDR_FLOAT]], align 4 ; CHECK-NEXT: [[MUL_I:%.*]] = fmul float [[L]], 4.200000e+01 ; CHECK-NEXT: store float [[MUL_I]], float* [[A_ADDR_03]], align 4 -; CHECK-NEXT: [[B_ADDR_FLOAT_INC]] = getelementptr inbounds float, float* [[B_ADDR_FLOAT]], i64 1 +; CHECK-NEXT: [[B_ADDR_FLOAT_INC]] = getelementptr inbounds i8, i8* [[B_ADDR_I64_PTR]], i64 4 ; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds float, float* [[A_ADDR_03]], i64 1 ; CHECK-NEXT: [[CMP:%.*]] = icmp ult float* [[INCDEC_PTR]], [[A_END]] ; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END]] diff --git a/llvm/test/Transforms/InstCombine/intptr7.ll b/llvm/test/Transforms/InstCombine/intptr7.ll --- a/llvm/test/Transforms/InstCombine/intptr7.ll +++ b/llvm/test/Transforms/InstCombine/intptr7.ll @@ -5,17 +5,22 @@ ; CHECK-LABEL: @matching_phi( ; CHECK-NEXT: entry: ; CHECK-NEXT: [[ADD_INT:%.*]] = add i64 [[A:%.*]], 1 -; CHECK-NEXT: [[ADD:%.*]] = inttoptr i64 [[ADD_INT]] to float* +; CHECK-NEXT: [[TMP0:%.*]] = inttoptr i64 [[ADD_INT]] to i8* +; CHECK-NEXT: [[ADD:%.*]] = bitcast i8* [[TMP0]] to float* +; CHECK-NEXT: [[ADDB:%.*]] = getelementptr inbounds float, float* [[B:%.*]], i64 2 ; CHECK-NEXT: br i1 [[COND:%.*]], label [[BBB:%.*]], label [[A:%.*]] ; CHECK: A: -; CHECK-NEXT: [[ADDB:%.*]] = getelementptr inbounds float, float* [[B:%.*]], i64 2 +; CHECK-NEXT: [[ADDB_INT:%.*]] = ptrtoint float* [[ADDB]] to i64 ; CHECK-NEXT: br label [[C:%.*]] ; CHECK: Bbb: ; CHECK-NEXT: store float 1.000000e+01, float* [[ADD]], align 4 ; CHECK-NEXT: br label [[C]] ; CHECK: C: ; CHECK-NEXT: [[A_ADDR_03:%.*]] = phi float* [ [[ADDB]], [[A]] ], [ [[ADD]], [[BBB]] ] -; CHECK-NEXT: [[I1:%.*]] = load float, float* [[A_ADDR_03]], align 4 +; CHECK-NEXT: [[B_ADDR_02:%.*]] = phi i64 [ [[ADDB_INT]], [[A]] ], [ [[ADD_INT]], [[BBB]] ] +; CHECK-NEXT: [[TMP1:%.*]] = inttoptr i64 [[B_ADDR_02]] to i8* +; CHECK-NEXT: [[I0:%.*]] = bitcast i8* [[TMP1]] to float* +; CHECK-NEXT: [[I1:%.*]] = load float, float* [[I0]], align 4 ; CHECK-NEXT: [[MUL_I:%.*]] = fmul float [[I1]], 4.200000e+01 ; CHECK-NEXT: store float [[MUL_I]], float* [[A_ADDR_03]], align 4 ; CHECK-NEXT: ret void @@ -48,18 +53,22 @@ ; CHECK-LABEL: @no_matching_phi( ; CHECK-NEXT: entry: ; CHECK-NEXT: [[ADD_INT:%.*]] = add i64 [[A:%.*]], 1 -; CHECK-NEXT: [[ADD:%.*]] = inttoptr i64 [[ADD_INT]] to float* +; CHECK-NEXT: [[TMP0:%.*]] = inttoptr i64 [[ADD_INT]] to i8* +; CHECK-NEXT: [[ADD:%.*]] = bitcast i8* [[TMP0]] to float* ; CHECK-NEXT: [[ADDB:%.*]] = getelementptr inbounds float, float* [[B:%.*]], i64 2 ; CHECK-NEXT: br i1 [[COND:%.*]], label [[B:%.*]], label [[A:%.*]] ; CHECK: A: ; CHECK-NEXT: br label [[C:%.*]] ; CHECK: B: +; CHECK-NEXT: [[ADDB_INT:%.*]] = ptrtoint float* [[ADDB]] to i64 ; CHECK-NEXT: store float 1.000000e+01, float* [[ADD]], align 4 ; CHECK-NEXT: br label [[C]] ; CHECK: C: ; CHECK-NEXT: [[A_ADDR_03:%.*]] = phi float* [ [[ADDB]], [[A]] ], [ [[ADD]], [[B]] ] -; CHECK-NEXT: [[B_ADDR_02_PTR:%.*]] = phi float* [ [[ADD]], [[A]] ], [ [[ADDB]], [[B]] ] -; CHECK-NEXT: [[I1:%.*]] = load float, float* [[B_ADDR_02_PTR]], align 4 +; CHECK-NEXT: [[B_ADDR_02:%.*]] = phi i64 [ [[ADD_INT]], [[A]] ], [ [[ADDB_INT]], [[B]] ] +; CHECK-NEXT: [[TMP1:%.*]] = inttoptr i64 [[B_ADDR_02]] to i8* +; CHECK-NEXT: [[I0:%.*]] = bitcast i8* [[TMP1]] to float* +; CHECK-NEXT: [[I1:%.*]] = load float, float* [[I0]], align 4 ; CHECK-NEXT: [[MUL_I:%.*]] = fmul float [[I1]], 4.200000e+01 ; CHECK-NEXT: store float [[MUL_I]], float* [[A_ADDR_03]], align 4 ; CHECK-NEXT: ret void diff --git a/llvm/test/Transforms/InstCombine/load-bitcast32.ll b/llvm/test/Transforms/InstCombine/load-bitcast32.ll --- a/llvm/test/Transforms/InstCombine/load-bitcast32.ll +++ b/llvm/test/Transforms/InstCombine/load-bitcast32.ll @@ -10,7 +10,8 @@ ; CHECK-NEXT: [[A:%.*]] = bitcast i8* [[X:%.*]] to i64* ; CHECK-NEXT: [[B:%.*]] = load i64, i64* [[A]], align 4 ; CHECK-NEXT: [[TMP0:%.*]] = trunc i64 [[B]] to i32 -; CHECK-NEXT: [[C:%.*]] = inttoptr i32 [[TMP0]] to i64* +; CHECK-NEXT: [[TMP1:%.*]] = inttoptr i32 [[TMP0]] to i8* +; CHECK-NEXT: [[C:%.*]] = bitcast i8* [[TMP1]] to i64* ; CHECK-NEXT: ret i64* [[C]] ; entry: @@ -26,7 +27,8 @@ ; CHECK-NEXT: entry: ; CHECK-NEXT: [[A:%.*]] = bitcast i8* [[X:%.*]] to i32* ; CHECK-NEXT: [[B:%.*]] = load i32, i32* [[A]], align 4 -; CHECK-NEXT: [[C:%.*]] = inttoptr i32 [[B]] to i32* +; CHECK-NEXT: [[TMP0:%.*]] = inttoptr i32 [[B]] to i8* +; CHECK-NEXT: [[C:%.*]] = bitcast i8* [[TMP0]] to i32* ; CHECK-NEXT: ret i32* [[C]] ; entry: @@ -42,7 +44,8 @@ ; CHECK-NEXT: entry: ; CHECK-NEXT: [[A:%.*]] = bitcast i8* [[X:%.*]] to i32* ; CHECK-NEXT: [[B:%.*]] = load i32, i32* [[A]], align 4 -; CHECK-NEXT: [[C:%.*]] = inttoptr i32 [[B]] to i64* +; CHECK-NEXT: [[TMP0:%.*]] = inttoptr i32 [[B]] to i8* +; CHECK-NEXT: [[C:%.*]] = bitcast i8* [[TMP0]] to i64* ; CHECK-NEXT: ret i64* [[C]] ; entry: diff --git a/llvm/test/Transforms/InstCombine/load-bitcast64.ll b/llvm/test/Transforms/InstCombine/load-bitcast64.ll --- a/llvm/test/Transforms/InstCombine/load-bitcast64.ll +++ b/llvm/test/Transforms/InstCombine/load-bitcast64.ll @@ -9,7 +9,8 @@ ; CHECK-NEXT: entry: ; CHECK-NEXT: [[A:%.*]] = bitcast i8* [[X:%.*]] to i64* ; CHECK-NEXT: [[B:%.*]] = load i64, i64* [[A]], align 4 -; CHECK-NEXT: [[C:%.*]] = inttoptr i64 [[B]] to i64* +; CHECK-NEXT: [[TMP0:%.*]] = inttoptr i64 [[B]] to i8* +; CHECK-NEXT: [[C:%.*]] = bitcast i8* [[TMP0]] to i64* ; CHECK-NEXT: ret i64* [[C]] ; entry: @@ -26,7 +27,8 @@ ; CHECK-NEXT: [[A:%.*]] = bitcast i8* [[X:%.*]] to i32* ; CHECK-NEXT: [[B:%.*]] = load i32, i32* [[A]], align 4 ; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[B]] to i64 -; CHECK-NEXT: [[C:%.*]] = inttoptr i64 [[TMP0]] to i32* +; CHECK-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to i8* +; CHECK-NEXT: [[C:%.*]] = bitcast i8* [[TMP1]] to i32* ; CHECK-NEXT: ret i32* [[C]] ; entry: @@ -43,7 +45,8 @@ ; CHECK-NEXT: [[A:%.*]] = bitcast i8* [[X:%.*]] to i32* ; CHECK-NEXT: [[B:%.*]] = load i32, i32* [[A]], align 4 ; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[B]] to i64 -; CHECK-NEXT: [[C:%.*]] = inttoptr i64 [[TMP0]] to i64* +; CHECK-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to i8* +; CHECK-NEXT: [[C:%.*]] = bitcast i8* [[TMP1]] to i64* ; CHECK-NEXT: ret i64* [[C]] ; entry: diff --git a/llvm/test/Transforms/InstCombine/multi-use-load-casts.ll b/llvm/test/Transforms/InstCombine/multi-use-load-casts.ll --- a/llvm/test/Transforms/InstCombine/multi-use-load-casts.ll +++ b/llvm/test/Transforms/InstCombine/multi-use-load-casts.ll @@ -15,11 +15,13 @@ ; CHECK-NEXT: tail call void @abort() ; CHECK-NEXT: unreachable ; CHECK: bb5: -; CHECK-NEXT: [[PTR0:%.*]] = inttoptr i64 [[DATA]] to i32* +; CHECK-NEXT: [[TMP0:%.*]] = inttoptr i64 [[DATA]] to i8* +; CHECK-NEXT: [[PTR0:%.*]] = bitcast i8* [[TMP0]] to i32* ; CHECK-NEXT: tail call void @sink0(i32* [[PTR0]]) ; CHECK-NEXT: br label [[BB9:%.*]] ; CHECK: bb7: -; CHECK-NEXT: [[PTR1:%.*]] = inttoptr i64 [[DATA]] to i32* +; CHECK-NEXT: [[TMP1:%.*]] = inttoptr i64 [[DATA]] to i8* +; CHECK-NEXT: [[PTR1:%.*]] = bitcast i8* [[TMP1]] to i32* ; CHECK-NEXT: tail call void @sink1(i32* [[PTR1]]) ; CHECK-NEXT: br label [[BB9]] ; CHECK: bb9: @@ -62,7 +64,8 @@ ; CHECK-NEXT: tail call void @abort() ; CHECK-NEXT: unreachable ; CHECK: bb5: -; CHECK-NEXT: [[PTR0:%.*]] = inttoptr i64 [[DATA]] to i32* +; CHECK-NEXT: [[TMP0:%.*]] = inttoptr i64 [[DATA]] to i8* +; CHECK-NEXT: [[PTR0:%.*]] = bitcast i8* [[TMP0]] to i32* ; CHECK-NEXT: tail call void @sink0(i32* [[PTR0]]) ; CHECK-NEXT: br label [[BB9:%.*]] ; CHECK: bb7: @@ -109,7 +112,8 @@ ; CHECK-NEXT: tail call void @abort() ; CHECK-NEXT: unreachable ; CHECK: bb5: -; CHECK-NEXT: [[PTR0:%.*]] = inttoptr i64 [[DATA]] to i32* +; CHECK-NEXT: [[TMP0:%.*]] = inttoptr i64 [[DATA]] to i8* +; CHECK-NEXT: [[PTR0:%.*]] = bitcast i8* [[TMP0]] to i32* ; CHECK-NEXT: tail call void @sink0(i32* [[PTR0]]) ; CHECK-NEXT: br label [[BB9:%.*]] ; CHECK: bb7: diff --git a/llvm/test/Transforms/InstCombine/ptr-int-cast.ll b/llvm/test/Transforms/InstCombine/ptr-int-cast.ll --- a/llvm/test/Transforms/InstCombine/ptr-int-cast.ll +++ b/llvm/test/Transforms/InstCombine/ptr-int-cast.ll @@ -19,8 +19,9 @@ ; CHECK-LABEL: @test2( ; CHECK-NEXT: entry: ; CHECK-NEXT: [[TMP0:%.*]] = trunc i128 [[X:%.*]] to i64 -; CHECK-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to i32* -; CHECK-NEXT: ret i32* [[TMP1]] +; CHECK-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to i8* +; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32* +; CHECK-NEXT: ret i32* [[TMP2]] ; entry: %0 = inttoptr i128 %x to i32* diff --git a/llvm/test/Transforms/InstCombine/type_pun-inseltpoison.ll b/llvm/test/Transforms/InstCombine/type_pun-inseltpoison.ll --- a/llvm/test/Transforms/InstCombine/type_pun-inseltpoison.ll +++ b/llvm/test/Transforms/InstCombine/type_pun-inseltpoison.ll @@ -57,8 +57,9 @@ ; CHECK-LABEL: @type_pun_pointer( ; CHECK-NEXT: [[SROA_BC:%.*]] = bitcast <16 x i8> [[IN:%.*]] to <4 x i32> ; CHECK-NEXT: [[SROA_EXTRACT:%.*]] = extractelement <4 x i32> [[SROA_BC]], i32 0 -; CHECK-NEXT: [[TMP1:%.*]] = inttoptr i32 [[SROA_EXTRACT]] to i32* -; CHECK-NEXT: ret i32* [[TMP1]] +; CHECK-NEXT: [[TMP1:%.*]] = inttoptr i32 [[SROA_EXTRACT]] to i8* +; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32* +; CHECK-NEXT: ret i32* [[TMP2]] ; %sroa = shufflevector <16 x i8> %in, <16 x i8> poison, <4 x i32> %1 = bitcast <4 x i8> %sroa to i32 diff --git a/llvm/test/Transforms/InstCombine/type_pun.ll b/llvm/test/Transforms/InstCombine/type_pun.ll --- a/llvm/test/Transforms/InstCombine/type_pun.ll +++ b/llvm/test/Transforms/InstCombine/type_pun.ll @@ -57,8 +57,9 @@ ; CHECK-LABEL: @type_pun_pointer( ; CHECK-NEXT: [[SROA_BC:%.*]] = bitcast <16 x i8> [[IN:%.*]] to <4 x i32> ; CHECK-NEXT: [[SROA_EXTRACT:%.*]] = extractelement <4 x i32> [[SROA_BC]], i32 0 -; CHECK-NEXT: [[TMP1:%.*]] = inttoptr i32 [[SROA_EXTRACT]] to i32* -; CHECK-NEXT: ret i32* [[TMP1]] +; CHECK-NEXT: [[TMP1:%.*]] = inttoptr i32 [[SROA_EXTRACT]] to i8* +; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32* +; CHECK-NEXT: ret i32* [[TMP2]] ; %sroa = shufflevector <16 x i8> %in, <16 x i8> undef, <4 x i32> %1 = bitcast <4 x i8> %sroa to i32