diff --git a/llvm/test/TableGen/pseudo-inst-expansion.td b/llvm/test/TableGen/pseudo-inst-expansion.td new file mode 100644 --- /dev/null +++ b/llvm/test/TableGen/pseudo-inst-expansion.td @@ -0,0 +1,37 @@ +// RUN: llvm-tblgen -gen-pseudo-lowering -I %p/../../include %s | FileCheck %s + +include "llvm/Target/Target.td" + +def TestTargetInstrInfo : InstrInfo; + +def TestTarget : Target { + let InstructionSet = TestTargetInstrInfo; +} + +def REG : Register<"REG">; +def GPR : RegisterClass<"TestTarget", [i32], 32, (add REG)>; + +class SysReg op> { + bits<12> Encoding = op; +} +def SR : SysReg<0b111100001111>; + +class Pseudo pattern> + : Instruction { + dag OutOperandList = outs; + dag InOperandList = ins; + let Pattern = pattern; + let isPseudo = 1; +} + +def INSTR : Instruction { + let OutOperandList = (outs GPR:$rd); + let InOperandList = (ins i32imm:$val); + let Pattern = []; +} + +def PSEUDO : Pseudo<(outs GPR:$rd), (ins), + [(set GPR:$rd, (i32 SR.Encoding))]>, + PseudoInstExpansion<(INSTR GPR:$rd, SR.Encoding)>; + +// CHECK: .addOperand(MCOperand::createImm(3855)); diff --git a/llvm/utils/TableGen/PseudoLoweringEmitter.cpp b/llvm/utils/TableGen/PseudoLoweringEmitter.cpp --- a/llvm/utils/TableGen/PseudoLoweringEmitter.cpp +++ b/llvm/utils/TableGen/PseudoLoweringEmitter.cpp @@ -108,6 +108,12 @@ OperandMap[BaseIdx + i].Kind = OpData::Imm; OperandMap[BaseIdx + i].Data.Imm = II->getValue(); ++OpsAdded; + } else if (auto *BI = dyn_cast(Dag->getArg(i))) { + auto II = dyn_cast(BI->convertInitializerTo(IntRecTy::get())); + assert(II && "Cannot convert to integer initializer"); + OperandMap[BaseIdx + i].Kind = OpData::Imm; + OperandMap[BaseIdx + i].Data.Imm = II->getValue(); + ++OpsAdded; } else if (DagInit *SubDag = dyn_cast(Dag->getArg(i))) { // Just add the operands recursively. This is almost certainly // a constant value for a complex operand (> 1 MI operand).