Index: llvm/lib/CodeGen/GlobalISel/CSEMIRBuilder.cpp =================================================================== --- llvm/lib/CodeGen/GlobalISel/CSEMIRBuilder.cpp +++ llvm/lib/CodeGen/GlobalISel/CSEMIRBuilder.cpp @@ -184,7 +184,11 @@ case TargetOpcode::G_UDIV: case TargetOpcode::G_SDIV: case TargetOpcode::G_UREM: - case TargetOpcode::G_SREM: { + case TargetOpcode::G_SREM: + case TargetOpcode::G_SMIN: + case TargetOpcode::G_SMAX: + case TargetOpcode::G_UMIN: + case TargetOpcode::G_UMAX: { // Try to constant fold these. assert(SrcOps.size() == 2 && "Invalid sources"); assert(DstOps.size() == 1 && "Invalid dsts"); Index: llvm/lib/CodeGen/GlobalISel/Utils.cpp =================================================================== --- llvm/lib/CodeGen/GlobalISel/Utils.cpp +++ llvm/lib/CodeGen/GlobalISel/Utils.cpp @@ -477,6 +477,14 @@ if (!C2.getBoolValue()) break; return C1.srem(C2); + case TargetOpcode::G_SMIN: + return APIntOps::smin(C1, C2); + case TargetOpcode::G_SMAX: + return APIntOps::smax(C1, C2); + case TargetOpcode::G_UMIN: + return APIntOps::umin(C1, C2); + case TargetOpcode::G_UMAX: + return APIntOps::umax(C1, C2); } return None; Index: llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fold-binop-into-select.mir =================================================================== --- llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fold-binop-into-select.mir +++ llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fold-binop-into-select.mir @@ -910,10 +910,7 @@ ; CHECK: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero ; CHECK: %ten:_(s32) = G_CONSTANT i32 10 ; CHECK: %twenty:_(s32) = G_CONSTANT i32 20 - ; CHECK: %thirty:_(s32) = G_CONSTANT i32 30 - ; CHECK: [[SMIN:%[0-9]+]]:_(s32) = G_SMIN %ten, %thirty - ; CHECK: [[SMIN1:%[0-9]+]]:_(s32) = G_SMIN %twenty, %thirty - ; CHECK: %smin:_(s32) = G_SELECT %cond(s1), [[SMIN]], [[SMIN1]] + ; CHECK: %smin:_(s32) = G_SELECT %cond(s1), %ten, %twenty ; CHECK: S_ENDPGM 0, implicit %smin(s32) %reg:_(s32) = COPY $vgpr0 %zero:_(s32) = G_CONSTANT i32 0 @@ -934,16 +931,8 @@ liveins: $vgpr0 ; CHECK-LABEL: name: fold_smax_into_select_s32_0 ; CHECK: liveins: $vgpr0 - ; CHECK: %reg:_(s32) = COPY $vgpr0 - ; CHECK: %zero:_(s32) = G_CONSTANT i32 0 - ; CHECK: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero - ; CHECK: %ten:_(s32) = G_CONSTANT i32 10 - ; CHECK: %twenty:_(s32) = G_CONSTANT i32 20 ; CHECK: %thirty:_(s32) = G_CONSTANT i32 30 - ; CHECK: [[SMAX:%[0-9]+]]:_(s32) = G_SMAX %ten, %thirty - ; CHECK: [[SMAX1:%[0-9]+]]:_(s32) = G_SMAX %twenty, %thirty - ; CHECK: %smax:_(s32) = G_SELECT %cond(s1), [[SMAX]], [[SMAX1]] - ; CHECK: S_ENDPGM 0, implicit %smax(s32) + ; CHECK: S_ENDPGM 0, implicit %thirty(s32) %reg:_(s32) = COPY $vgpr0 %zero:_(s32) = G_CONSTANT i32 0 %cond:_(s1) = G_ICMP intpred(eq), %reg, %zero @@ -968,10 +957,7 @@ ; CHECK: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero ; CHECK: %ten:_(s32) = G_CONSTANT i32 10 ; CHECK: %twenty:_(s32) = G_CONSTANT i32 20 - ; CHECK: %thirty:_(s32) = G_CONSTANT i32 30 - ; CHECK: [[UMIN:%[0-9]+]]:_(s32) = G_UMIN %ten, %thirty - ; CHECK: [[UMIN1:%[0-9]+]]:_(s32) = G_UMIN %twenty, %thirty - ; CHECK: %umin:_(s32) = G_SELECT %cond(s1), [[UMIN]], [[UMIN1]] + ; CHECK: %umin:_(s32) = G_SELECT %cond(s1), %ten, %twenty ; CHECK: S_ENDPGM 0, implicit %umin(s32) %reg:_(s32) = COPY $vgpr0 %zero:_(s32) = G_CONSTANT i32 0 @@ -992,16 +978,8 @@ liveins: $vgpr0 ; CHECK-LABEL: name: fold_umax_into_select_s32_0 ; CHECK: liveins: $vgpr0 - ; CHECK: %reg:_(s32) = COPY $vgpr0 - ; CHECK: %zero:_(s32) = G_CONSTANT i32 0 - ; CHECK: %cond:_(s1) = G_ICMP intpred(eq), %reg(s32), %zero - ; CHECK: %ten:_(s32) = G_CONSTANT i32 10 - ; CHECK: %twenty:_(s32) = G_CONSTANT i32 20 ; CHECK: %thirty:_(s32) = G_CONSTANT i32 30 - ; CHECK: [[UMAX:%[0-9]+]]:_(s32) = G_UMAX %ten, %thirty - ; CHECK: [[UMAX1:%[0-9]+]]:_(s32) = G_UMAX %twenty, %thirty - ; CHECK: %umax:_(s32) = G_SELECT %cond(s1), [[UMAX]], [[UMAX1]] - ; CHECK: S_ENDPGM 0, implicit %umax(s32) + ; CHECK: S_ENDPGM 0, implicit %thirty(s32) %reg:_(s32) = COPY $vgpr0 %zero:_(s32) = G_CONSTANT i32 0 %cond:_(s1) = G_ICMP intpred(eq), %reg, %zero