Index: llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
===================================================================
--- llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
+++ llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
@@ -676,9 +676,9 @@
       if (FI < 0)
         Offset += StackOffset::getFixed(RVFI->getLibCallStackSize());
     } else if (MFI.getStackID(FI) == TargetStackID::ScalableVector) {
-      Offset +=
-          StackOffset::get(MFI.getStackSize() - RVFI->getCalleeSavedStackSize(),
-                           RVFI->getRVVStackSize());
+      Offset += StackOffset::get(
+          alignTo(MFI.getStackSize() - RVFI->getCalleeSavedStackSize(), 16),
+          RVFI->getRVVStackSize());
     }
   } else {
     FrameReg = RI->getFrameRegister(MF);
@@ -715,9 +715,9 @@
         if (FI < 0)
           Offset += StackOffset::getFixed(RVFI->getLibCallStackSize());
       } else if (MFI.getStackID(FI) == TargetStackID::ScalableVector) {
-        Offset += StackOffset::get(MFI.getStackSize() -
-                                       RVFI->getCalleeSavedStackSize(),
-                                   RVFI->getRVVStackSize());
+        Offset += StackOffset::get(
+            alignTo(MFI.getStackSize() - RVFI->getCalleeSavedStackSize(), 16),
+            RVFI->getRVVStackSize());
       }
     }
   }
@@ -846,7 +846,7 @@
     MaxOffset = std::max<int64_t>(Offset + ObjSize, MaxOffset);
   }
 
-  unsigned Size = alignTo(MaxOffset - MinOffset, 16);
+  unsigned Size = MaxOffset - MinOffset;
   RVFI->setCalleeSavedStackSize(Size);
 }
 
Index: llvm/test/CodeGen/RISCV/rvv/localvar.ll
===================================================================
--- llvm/test/CodeGen/RISCV/rvv/localvar.ll
+++ llvm/test/CodeGen/RISCV/rvv/localvar.ll
@@ -256,15 +256,15 @@
 ; RV64IV-NEXT:    csrr a2, vlenb
 ; RV64IV-NEXT:    slli a2, a2, 1
 ; RV64IV-NEXT:    add a2, s1, a2
-; RV64IV-NEXT:    addi a2, a2, 224
+; RV64IV-NEXT:    addi a2, a2, 240
 ; RV64IV-NEXT:    call notdead2@plt
 ; RV64IV-NEXT:    lw a0, 124(s1)
 ; RV64IV-NEXT:    csrr a0, vlenb
 ; RV64IV-NEXT:    slli a0, a0, 1
 ; RV64IV-NEXT:    add a0, s1, a0
-; RV64IV-NEXT:    addi a0, a0, 224
+; RV64IV-NEXT:    addi a0, a0, 240
 ; RV64IV-NEXT:    vl2r.v v26, (a0)
-; RV64IV-NEXT:    addi a0, s1, 224
+; RV64IV-NEXT:    addi a0, s1, 240
 ; RV64IV-NEXT:    vl2r.v v26, (a0)
 ; RV64IV-NEXT:    lw a0, 120(s1)
 ; RV64IV-NEXT:    addi sp, s0, -256
Index: llvm/test/CodeGen/RISCV/rvv/rv32-spill-vector-csr.ll
===================================================================
--- llvm/test/CodeGen/RISCV/rvv/rv32-spill-vector-csr.ll
+++ llvm/test/CodeGen/RISCV/rvv/rv32-spill-vector-csr.ll
@@ -17,19 +17,23 @@
 ; SPILL-O0-NEXT:    sw a0, 8(sp) # 4-byte Folded Spill
 ; SPILL-O0-NEXT:    csrr a1, vlenb
 ; SPILL-O0-NEXT:    add a1, sp, a1
+; SPILL-O0-NEXT:    addi a1, a1, 16
 ; SPILL-O0-NEXT:    vs1r.v v8, (a1) # Unknown-size Folded Spill
 ; SPILL-O0-NEXT:    vsetvli a0, a0, e64,m1,ta,mu
 ; SPILL-O0-NEXT:    vfadd.vv v25, v8, v9
-; SPILL-O0-NEXT:    vs1r.v v25, (sp) # Unknown-size Folded Spill
+; SPILL-O0-NEXT:    addi a0, sp, 16
+; SPILL-O0-NEXT:    vs1r.v v25, (a0) # Unknown-size Folded Spill
 ; SPILL-O0-NEXT:    lui a0, %hi(.L.str)
 ; SPILL-O0-NEXT:    addi a0, a0, %lo(.L.str)
 ; SPILL-O0-NEXT:    call puts@plt
-; SPILL-O0-NEXT:    vl1r.v v25, (sp) # Unknown-size Folded Reload
+; SPILL-O0-NEXT:    addi a1, sp, 16
+; SPILL-O0-NEXT:    vl1r.v v25, (a1) # Unknown-size Folded Reload
 ; SPILL-O0-NEXT:    csrr a1, vlenb
 ; SPILL-O0-NEXT:    add a1, sp, a1
+; SPILL-O0-NEXT:    addi a1, a1, 16
 ; SPILL-O0-NEXT:    vl1r.v v8, (a1) # Unknown-size Folded Reload
 ; SPILL-O0-NEXT:    # kill: def $x11 killed $x10
-; SPILL-O0-NEXT:    lw a0, 8(sp)  # 4-byte Folded Reload
+; SPILL-O0-NEXT:    lw a0, 8(sp) # 4-byte Folded Reload
 ; SPILL-O0-NEXT:    vsetvli a0, a0, e64,m1,ta,mu
 ; SPILL-O0-NEXT:    vfadd.vv v8, v8, v25
 ; SPILL-O0-NEXT:    csrr a0, vlenb
@@ -43,16 +47,18 @@
 ; SPILL-O2:       # %bb.0:
 ; SPILL-O2-NEXT:    addi sp, sp, -16
 ; SPILL-O2-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
-; SPILL-O2-NEXT:    sw s0, 8(sp)  # 4-byte Folded Spill
+; SPILL-O2-NEXT:    sw s0, 8(sp) # 4-byte Folded Spill
 ; SPILL-O2-NEXT:    csrr a1, vlenb
 ; SPILL-O2-NEXT:    slli a1, a1, 1
 ; SPILL-O2-NEXT:    sub sp, sp, a1
 ; SPILL-O2-NEXT:    mv s0, a0
-; SPILL-O2-NEXT:    vs1r.v v8, (sp) # Unknown-size Folded Spill
+; SPILL-O2-NEXT:    addi a1, sp, 16
+; SPILL-O2-NEXT:    vs1r.v v8, (a1) # Unknown-size Folded Spill
 ; SPILL-O2-NEXT:    vsetvli a0, a0, e64,m1,ta,mu
 ; SPILL-O2-NEXT:    vfadd.vv v25, v8, v9
 ; SPILL-O2-NEXT:    csrr a0, vlenb
 ; SPILL-O2-NEXT:    add a0, sp, a0
+; SPILL-O2-NEXT:    addi a0, a0, 16
 ; SPILL-O2-NEXT:    vs1r.v v25, (a0) # Unknown-size Folded Spill
 ; SPILL-O2-NEXT:    lui a0, %hi(.L.str)
 ; SPILL-O2-NEXT:    addi a0, a0, %lo(.L.str)
@@ -60,8 +66,10 @@
 ; SPILL-O2-NEXT:    vsetvli a0, s0, e64,m1,ta,mu
 ; SPILL-O2-NEXT:    csrr a0, vlenb
 ; SPILL-O2-NEXT:    add a0, sp, a0
+; SPILL-O2-NEXT:    addi a0, a0, 16
 ; SPILL-O2-NEXT:    vl1r.v v25, (a0) # Unknown-size Folded Reload
-; SPILL-O2-NEXT:    vl1r.v v26, (sp) # Unknown-size Folded Reload
+; SPILL-O2-NEXT:    addi a0, sp, 16
+; SPILL-O2-NEXT:    vl1r.v v26, (a0) # Unknown-size Folded Reload
 ; SPILL-O2-NEXT:    vfadd.vv v8, v26, v25
 ; SPILL-O2-NEXT:    csrr a0, vlenb
 ; SPILL-O2-NEXT:    slli a0, a0, 1
@@ -78,4 +86,4 @@
 }
 
 declare <vscale x 1 x double> @llvm.riscv.vfadd.nxv1f64.nxv1f64(<vscale x 1 x double> %a, <vscale x 1 x double> %b, i32 %gvl)
-declare i32 @puts(i8*);
\ No newline at end of file
+declare i32 @puts(i8*);
Index: llvm/test/CodeGen/RISCV/rvv/rv64-spill-vector-csr.ll
===================================================================
--- llvm/test/CodeGen/RISCV/rvv/rv64-spill-vector-csr.ll
+++ llvm/test/CodeGen/RISCV/rvv/rv64-spill-vector-csr.ll
@@ -17,22 +17,22 @@
 ; SPILL-O0-NEXT:    sd a0, 16(sp) # 8-byte Folded Spill
 ; SPILL-O0-NEXT:    csrr a1, vlenb
 ; SPILL-O0-NEXT:    add a1, sp, a1
-; SPILL-O0-NEXT:    addi a1, a1, 16
+; SPILL-O0-NEXT:    addi a1, a1, 32
 ; SPILL-O0-NEXT:    vs1r.v v8, (a1) # Unknown-size Folded Spill
 ; SPILL-O0-NEXT:    vsetvli a0, a0, e64,m1,ta,mu
 ; SPILL-O0-NEXT:    vfadd.vv v25, v8, v9
-; SPILL-O0-NEXT:    addi a0, sp, 16
+; SPILL-O0-NEXT:    addi a0, sp, 32
 ; SPILL-O0-NEXT:    vs1r.v v25, (a0) # Unknown-size Folded Spill
 ; SPILL-O0-NEXT:    lui a0, %hi(.L.str)
 ; SPILL-O0-NEXT:    addi a0, a0, %lo(.L.str)
 ; SPILL-O0-NEXT:    call puts@plt
-; SPILL-O0-NEXT:    addi a1, sp, 16
+; SPILL-O0-NEXT:    addi a1, sp, 32
 ; SPILL-O0-NEXT:    vl1r.v v25, (a1) # Unknown-size Folded Reload
 ; SPILL-O0-NEXT:    csrr a1, vlenb
 ; SPILL-O0-NEXT:    add a1, sp, a1
-; SPILL-O0-NEXT:    addi a1, a1, 16
+; SPILL-O0-NEXT:    addi a1, a1, 32
 ; SPILL-O0-NEXT:    vl1r.v v8, (a1) # Unknown-size Folded Reload
-; SPILL-O0-NEXT:                     # kill: def $x11 killed $x10
+; SPILL-O0-NEXT:    # kill: def $x11 killed $x10
 ; SPILL-O0-NEXT:    ld a0, 16(sp) # 8-byte Folded Reload
 ; SPILL-O0-NEXT:    vsetvli a0, a0, e64,m1,ta,mu
 ; SPILL-O0-NEXT:    vfadd.vv v8, v8, v25
Index: llvm/test/CodeGen/RISCV/rvv/rvv-framelayout.ll
===================================================================
--- llvm/test/CodeGen/RISCV/rvv/rvv-framelayout.ll
+++ llvm/test/CodeGen/RISCV/rvv/rvv-framelayout.ll
@@ -107,9 +107,9 @@
 ; CHECK-NEXT:    csrr a2, vlenb
 ; CHECK-NEXT:    slli a2, a2, 1
 ; CHECK-NEXT:    add a2, s1, a2
-; CHECK-NEXT:    addi a2, a2, 96
+; CHECK-NEXT:    addi a2, a2, 112
 ; CHECK-NEXT:    vl1re64.v v25, (a2)
-; CHECK-NEXT:    addi a2, s1, 96
+; CHECK-NEXT:    addi a2, s1, 112
 ; CHECK-NEXT:    vl2re64.v v26, (a2)
 ; CHECK-NEXT:    lw a2, 64(s1)
 ; CHECK-NEXT:    slli a1, a1, 2
Index: llvm/test/CodeGen/RISCV/rvv/wrong-stack-slot.mir
===================================================================
--- llvm/test/CodeGen/RISCV/rvv/wrong-stack-slot.mir
+++ llvm/test/CodeGen/RISCV/rvv/wrong-stack-slot.mir
@@ -55,7 +55,7 @@
   bb.0.entry:
     ; CHECK-LABEL: foo:
     ; CHECK:    sd a0, 16(sp)
-    ; CHECK-NEXT:    addi a0, sp, 16
+    ; CHECK-NEXT:    addi a0, sp, 32
     ; CHECK-NEXT:    vs2r.v v30, (a0)
     liveins: $x10, $v30m2