Index: llvm/test/CodeGen/RISCV/rvv/wrong-stack-slot.mir =================================================================== --- /dev/null +++ llvm/test/CodeGen/RISCV/rvv/wrong-stack-slot.mir @@ -0,0 +1,68 @@ +# RUN: llc -mtriple=riscv64 -mattr=+m,+experimental-v -o - %s \ +# RUN: -start-before=prologepilog | FileCheck %s +--- | + define void @foo() + { + entry: + ret void + } +... +--- +name: foo +alignment: 2 +exposesReturnsTwice: false +legalized: false +regBankSelected: false +selected: false +failedISel: false +tracksRegLiveness: true +hasWinCFI: false +registers: [] +liveins: + - { reg: '$x10', virtual-reg: '' } +frameInfo: + isFrameAddressTaken: false + isReturnAddressTaken: false + hasStackMap: false + hasPatchPoint: false + stackSize: 0 + offsetAdjustment: 0 + maxAlignment: 8 + adjustsStack: false + hasCalls: true + stackProtector: '' + maxCallFrameSize: 4294967295 + cvBytesOfCalleeSavedRegisters: 0 + hasOpaqueSPAdjustment: false + hasVAStart: false + hasMustTailInVarArgFunc: false + localFrameSize: 0 + savePoint: '' + restorePoint: '' +fixedStack: [] +stack: + - { id: 0, name: '', type: spill-slot, offset: 0, size: 8, alignment: 8, + stack-id: default, callee-saved-register: '', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } + - { id: 1, name: '', type: spill-slot, offset: 0, size: 16, alignment: 8, + stack-id: scalable-vector, callee-saved-register: '', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } +callSites: [] +debugValueSubstitutions: [] +constants: [] +machineFunctionInfo: {} +body: | + bb.0.entry: + ; CHECK-LABEL: foo: + ; CHECK: sd a0, 16(sp) + ; CHECK-NEXT: addi a0, sp, 16 + ; CHECK-NEXT: vs2r.v v30, (a0) + liveins: $x10, $v30m2 + + $x25 = COPY $x10 + SD renamable $x25, %stack.0, 0 :: (store 8 into %stack.0) + PseudoVSPILL_M2 renamable $v30m2, %stack.1 :: (store unknown-size into %stack.1, align 8) + PseudoRET + +... +