diff --git a/llvm/include/llvm/CodeGen/TargetRegisterInfo.h b/llvm/include/llvm/CodeGen/TargetRegisterInfo.h --- a/llvm/include/llvm/CodeGen/TargetRegisterInfo.h +++ b/llvm/include/llvm/CodeGen/TargetRegisterInfo.h @@ -914,9 +914,7 @@ /// True if storage within the function requires the stack pointer to be /// aligned more than the normal calling convention calls for. - /// This cannot be overriden by the target, but canRealignStack can be - /// overridden. - bool needsStackRealignment(const MachineFunction &MF) const; + virtual bool needsStackRealignment(const MachineFunction &MF) const; /// Get the offset from the referenced frame index in the instruction, /// if there is one. diff --git a/llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp b/llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp --- a/llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp +++ b/llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp @@ -1377,7 +1377,8 @@ CurFn->CSRSize = MFI.getCVBytesOfCalleeSavedRegisters(); CurFn->FrameSize = MFI.getStackSize(); CurFn->OffsetAdjustment = MFI.getOffsetAdjustment(); - CurFn->HasStackRealignment = TRI->needsStackRealignment(*MF); + CurFn->HasStackRealignment = + TRI->needsStackRealignment(*MF) && TRI->canRealignStack(*MF); // For this function S_FRAMEPROC record, figure out which codeview register // will be the frame pointer. diff --git a/llvm/lib/CodeGen/GCRootLowering.cpp b/llvm/lib/CodeGen/GCRootLowering.cpp --- a/llvm/lib/CodeGen/GCRootLowering.cpp +++ b/llvm/lib/CodeGen/GCRootLowering.cpp @@ -317,8 +317,9 @@ // size, we use UINT64_MAX to represent this. const MachineFrameInfo &MFI = MF.getFrameInfo(); const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo(); - const bool DynamicFrameSize = MFI.hasVarSizedObjects() || - RegInfo->needsStackRealignment(MF); + const bool DynamicFrameSize = + MFI.hasVarSizedObjects() || + (RegInfo->needsStackRealignment(MF) && RegInfo->canRealignStack(MF)); FI->setFrameSize(DynamicFrameSize ? UINT64_MAX : MFI.getStackSize()); // Find all safe points. diff --git a/llvm/lib/CodeGen/MachineFrameInfo.cpp b/llvm/lib/CodeGen/MachineFrameInfo.cpp --- a/llvm/lib/CodeGen/MachineFrameInfo.cpp +++ b/llvm/lib/CodeGen/MachineFrameInfo.cpp @@ -173,7 +173,8 @@ // value. Align StackAlign; if (adjustsStack() || hasVarSizedObjects() || - (RegInfo->needsStackRealignment(MF) && getObjectIndexEnd() != 0)) + (RegInfo->needsStackRealignment(MF) && RegInfo->canRealignStack(MF) && + getObjectIndexEnd() != 0)) StackAlign = TFI->getStackAlign(); else StackAlign = TFI->getTransientStackAlign(); diff --git a/llvm/lib/CodeGen/PrologEpilogInserter.cpp b/llvm/lib/CodeGen/PrologEpilogInserter.cpp --- a/llvm/lib/CodeGen/PrologEpilogInserter.cpp +++ b/llvm/lib/CodeGen/PrologEpilogInserter.cpp @@ -877,10 +877,10 @@ // incoming stack pointer if a frame pointer is required and is closer // to the incoming rather than the final stack pointer. const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo(); - bool EarlyScavengingSlots = (TFI.hasFP(MF) && - TFI.isFPCloseToIncomingSP() && - RegInfo->useFPForScavengingIndex(MF) && - !RegInfo->needsStackRealignment(MF)); + bool EarlyScavengingSlots = + (TFI.hasFP(MF) && TFI.isFPCloseToIncomingSP() && + RegInfo->useFPForScavengingIndex(MF) && + !(RegInfo->needsStackRealignment(MF) && RegInfo->canRealignStack(MF))); if (RS && EarlyScavengingSlots) { SmallVector SFIs; RS->getScavengingFrameIndices(SFIs); @@ -1063,7 +1063,8 @@ // value. Align StackAlign; if (MFI.adjustsStack() || MFI.hasVarSizedObjects() || - (RegInfo->needsStackRealignment(MF) && MFI.getObjectIndexEnd() != 0)) + (RegInfo->needsStackRealignment(MF) && RegInfo->canRealignStack(MF) && + MFI.getObjectIndexEnd() != 0)) StackAlign = TFI.getStackAlign(); else StackAlign = TFI.getTransientStackAlign(); diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -6173,7 +6173,7 @@ // Don't promote to an alignment that would require dynamic stack // realignment. const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo(); - if (!TRI->needsStackRealignment(MF)) + if (!TRI->needsStackRealignment(MF) || !TRI->canRealignStack(MF)) while (NewAlign > Alignment && DL.exceedsNaturalStackAlignment(NewAlign)) NewAlign = NewAlign / 2; diff --git a/llvm/lib/CodeGen/StackMaps.cpp b/llvm/lib/CodeGen/StackMaps.cpp --- a/llvm/lib/CodeGen/StackMaps.cpp +++ b/llvm/lib/CodeGen/StackMaps.cpp @@ -511,7 +511,8 @@ const MachineFrameInfo &MFI = AP.MF->getFrameInfo(); const TargetRegisterInfo *RegInfo = AP.MF->getSubtarget().getRegisterInfo(); bool HasDynamicFrameSize = - MFI.hasVarSizedObjects() || RegInfo->needsStackRealignment(*(AP.MF)); + MFI.hasVarSizedObjects() || (RegInfo->needsStackRealignment(*AP.MF) && + RegInfo->canRealignStack(*AP.MF)); uint64_t FrameSize = HasDynamicFrameSize ? UINT64_MAX : MFI.getStackSize(); auto CurrentIt = FnInfos.find(AP.CurrentFnSym); diff --git a/llvm/lib/CodeGen/TargetRegisterInfo.cpp b/llvm/lib/CodeGen/TargetRegisterInfo.cpp --- a/llvm/lib/CodeGen/TargetRegisterInfo.cpp +++ b/llvm/lib/CodeGen/TargetRegisterInfo.cpp @@ -466,16 +466,9 @@ const MachineFrameInfo &MFI = MF.getFrameInfo(); const TargetFrameLowering *TFI = MF.getSubtarget().getFrameLowering(); const Function &F = MF.getFunction(); - Align StackAlign = TFI->getStackAlign(); - bool requiresRealignment = ((MFI.getMaxAlign() > StackAlign) || - F.hasFnAttribute(Attribute::StackAlignment)); - if (F.hasFnAttribute("stackrealign") || requiresRealignment) { - if (canRealignStack(MF)) - return true; - LLVM_DEBUG(dbgs() << "Can't realign function's stack: " << F.getName() - << "\n"); - } - return false; + return F.hasFnAttribute("stackrealign") || + (MFI.getMaxAlign() > TFI->getStackAlign()) || + F.hasFnAttribute(Attribute::StackAlignment); } bool TargetRegisterInfo::regmaskSubsetEqual(const uint32_t *mask0, diff --git a/llvm/lib/Target/AMDGPU/SIRegisterInfo.h b/llvm/lib/Target/AMDGPU/SIRegisterInfo.h --- a/llvm/lib/Target/AMDGPU/SIRegisterInfo.h +++ b/llvm/lib/Target/AMDGPU/SIRegisterInfo.h @@ -79,7 +79,7 @@ bool hasBasePointer(const MachineFunction &MF) const; Register getBaseRegister() const; - bool canRealignStack(const MachineFunction &MF) const override; + bool needsStackRealignment(const MachineFunction &MF) const override; bool requiresRegisterScavenging(const MachineFunction &Fn) const override; bool requiresFrameIndexScavenging(const MachineFunction &MF) const override; diff --git a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp --- a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp @@ -358,7 +358,7 @@ return Reserved; } -bool SIRegisterInfo::canRealignStack(const MachineFunction &MF) const { +bool SIRegisterInfo::needsStackRealignment(const MachineFunction &MF) const { const SIMachineFunctionInfo *Info = MF.getInfo(); // On entry, the base address is 0, so it can't possibly need any more // alignment. @@ -368,7 +368,7 @@ if (Info->isEntryFunction()) return false; - return TargetRegisterInfo::canRealignStack(MF); + return TargetRegisterInfo::needsStackRealignment(MF); } bool SIRegisterInfo::requiresRegisterScavenging(const MachineFunction &Fn) const { diff --git a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp --- a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp +++ b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp @@ -403,7 +403,8 @@ // If we have stack realignment and VLAs, we have no pointer to use to // access the stack. If we have stack realignment, and a large call frame, // we have no place to allocate the emergency spill slot. - if (needsStackRealignment(MF) && !TFI->hasReservedCallFrame(MF)) + if (needsStackRealignment(MF) && canRealignStack(MF) && + !TFI->hasReservedCallFrame(MF)) return true; // Thumb has trouble with negative offsets from the FP. Thumb2 has a limited @@ -458,8 +459,8 @@ const MachineFrameInfo &MFI = MF.getFrameInfo(); if (MF.getTarget().Options.DisableFramePointerElim(MF) && MFI.adjustsStack()) return true; - return MFI.hasVarSizedObjects() || MFI.isFrameAddressTaken() - || needsStackRealignment(MF); + return MFI.hasVarSizedObjects() || MFI.isFrameAddressTaken() || + (needsStackRealignment(MF) && canRealignStack(MF)); } Register diff --git a/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp b/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp --- a/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp +++ b/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp @@ -2234,7 +2234,7 @@ *TII); } // If there's dynamic realignment, adjust for it. - if (RI.needsStackRealignment(MF)) { + if (RI.needsStackRealignment(MF) && RI.canRealignStack(MF)) { MachineFrameInfo &MFI = MF.getFrameInfo(); Align MaxAlign = MFI.getMaxAlign(); assert (!AFI->isThumb1OnlyFunction()); @@ -2251,7 +2251,6 @@ .add(predOps(ARMCC::AL)) .add(condCodeOp()); } - } MI.eraseFromParent(); return true; diff --git a/llvm/lib/Target/ARM/ARMFrameLowering.cpp b/llvm/lib/Target/ARM/ARMFrameLowering.cpp --- a/llvm/lib/Target/ARM/ARMFrameLowering.cpp +++ b/llvm/lib/Target/ARM/ARMFrameLowering.cpp @@ -206,9 +206,9 @@ return true; // Frame pointer required for use within this function. - return (RegInfo->needsStackRealignment(MF) || - MFI.hasVarSizedObjects() || - MFI.isFrameAddressTaken()); + return ( + (RegInfo->needsStackRealignment(MF) && RegInfo->canRealignStack(MF)) || + MFI.hasVarSizedObjects() || MFI.isFrameAddressTaken()); } /// hasReservedCallFrame - Under normal circumstances, when a frame pointer is @@ -807,7 +807,8 @@ // sure if we also have VLAs, we have a base pointer for frame access. // If aligned NEON registers were spilled, the stack has already been // realigned. - if (!AFI->getNumAlignedDPRCS2Regs() && RegInfo->needsStackRealignment(MF)) { + if (!AFI->getNumAlignedDPRCS2Regs() && RegInfo->needsStackRealignment(MF) && + RegInfo->canRealignStack(MF)) { Align MaxAlign = MFI.getMaxAlign(); assert(!AFI->isThumb1OnlyFunction()); if (!AFI->isThumbFunction()) { @@ -1005,7 +1006,7 @@ // When dynamically realigning the stack, use the frame pointer for // parameters, and the stack/base pointer for locals. - if (RegInfo->needsStackRealignment(MF)) { + if (RegInfo->needsStackRealignment(MF) && RegInfo->canRealignStack(MF)) { assert(hasFP(MF) && "dynamic stack realignment without a FP!"); if (isFixed) { FrameReg = RegInfo->getFrameRegister(MF); @@ -1783,7 +1784,8 @@ // instruction. // FIXME: It will be better just to find spare register here. if (AFI->isThumb2Function() && - (MFI.hasVarSizedObjects() || RegInfo->needsStackRealignment(MF))) + (MFI.hasVarSizedObjects() || + (RegInfo->needsStackRealignment(MF) && RegInfo->canRealignStack(MF)))) SavedRegs.set(ARM::R4); // If a stack probe will be emitted, spill R4 and LR, since they are @@ -1808,7 +1810,8 @@ // changes it, it'll be a spill, which implies we've used all the registers // and so R4 is already used, so not marking it here will be OK. // FIXME: It will be better just to find spare register here. - if (MFI.hasVarSizedObjects() || RegInfo->needsStackRealignment(MF) || + if (MFI.hasVarSizedObjects() || + (RegInfo->needsStackRealignment(MF) && RegInfo->canRealignStack(MF)) || MFI.estimateStackSize(MF) > 508) SavedRegs.set(ARM::R4); } diff --git a/llvm/lib/Target/X86/X86FrameLowering.cpp b/llvm/lib/Target/X86/X86FrameLowering.cpp --- a/llvm/lib/Target/X86/X86FrameLowering.cpp +++ b/llvm/lib/Target/X86/X86FrameLowering.cpp @@ -70,7 +70,8 @@ X86FrameLowering::canSimplifyCallFramePseudos(const MachineFunction &MF) const { return hasReservedCallFrame(MF) || MF.getInfo()->hasPreallocatedCall() || - (hasFP(MF) && !TRI->needsStackRealignment(MF)) || + (hasFP(MF) && + !(TRI->needsStackRealignment(MF) && TRI->canRealignStack(MF))) || TRI->hasBasePointer(MF); } @@ -93,8 +94,9 @@ bool X86FrameLowering::hasFP(const MachineFunction &MF) const { const MachineFrameInfo &MFI = MF.getFrameInfo(); return (MF.getTarget().Options.DisableFramePointerElim(MF) || - TRI->needsStackRealignment(MF) || MFI.hasVarSizedObjects() || - MFI.isFrameAddressTaken() || MFI.hasOpaqueSPAdjustment() || + (TRI->needsStackRealignment(MF) && TRI->canRealignStack(MF)) || + MFI.hasVarSizedObjects() || MFI.isFrameAddressTaken() || + MFI.hasOpaqueSPAdjustment() || MF.getInfo()->getForceFramePointer() || MF.getInfo()->hasPreallocatedCall() || MF.callsUnwindInit() || MF.hasEHFunclets() || MF.callsEHReturn() || @@ -533,8 +535,9 @@ const uint64_t StackProbeSize = TLI.getStackProbeSize(MF); uint64_t ProbeChunk = StackProbeSize * 8; - uint64_t MaxAlign = - TRI->needsStackRealignment(MF) ? calculateMaxStackAlign(MF) : 0; + uint64_t MaxAlign = TRI->needsStackRealignment(MF) && TRI->canRealignStack(MF) + ? calculateMaxStackAlign(MF) + : 0; // Synthesize a loop or unroll it, depending on the number of iterations. // BuildStackAlignAND ensures that only MaxAlign % StackProbeSize bits left @@ -1351,7 +1354,8 @@ // pointer, calls, or dynamic alloca then we do not need to adjust the // stack pointer (we fit in the Red Zone). We also check that we don't // push and pop from the stack. - if (has128ByteRedZone(MF) && !TRI->needsStackRealignment(MF) && + if (has128ByteRedZone(MF) && + !(TRI->needsStackRealignment(MF) && TRI->canRealignStack(MF)) && !MFI.hasVarSizedObjects() && // No dynamic alloca. !MFI.adjustsStack() && // No calls. !EmitStackProbeCall && // No stack probes. @@ -1420,7 +1424,8 @@ NumBytes = FrameSize - X86FI->getCalleeSavedFrameSize(); // Callee-saved registers are pushed on stack before the stack is realigned. - if (TRI->needsStackRealignment(MF) && !IsWin64Prologue) + if (TRI->needsStackRealignment(MF) && TRI->canRealignStack(MF) && + !IsWin64Prologue) NumBytes = alignTo(NumBytes, MaxAlign); // Save EBP/RBP into the appropriate stack slot. @@ -1481,7 +1486,7 @@ // Update the offset adjustment, which is mainly used by codeview to translate // from ESP to VFRAME relative local variable offsets. if (!IsFunclet) { - if (HasFP && TRI->needsStackRealignment(MF)) + if (HasFP && TRI->needsStackRealignment(MF) && TRI->canRealignStack(MF)) MFI.setOffsetAdjustment(-NumBytes); else MFI.setOffsetAdjustment(-StackSize); @@ -1525,7 +1530,8 @@ // Realign stack after we pushed callee-saved registers (so that we'll be // able to calculate their offsets from the frame pointer). // Don't do this for Win64, it needs to realign the stack after the prologue. - if (!IsWin64Prologue && !IsFunclet && TRI->needsStackRealignment(MF)) { + if (!IsWin64Prologue && !IsFunclet && TRI->needsStackRealignment(MF) && + TRI->canRealignStack(MF)) { assert(HasFP && "There should be a frame pointer if stack is realigned."); BuildStackAlignAND(MBB, MBBI, DL, StackPtr, MaxAlign); @@ -1553,7 +1559,8 @@ // increments is necessary to ensure that the guard pages used by the OS // virtual memory manager are allocated in correct sequence. uint64_t AlignedNumBytes = NumBytes; - if (IsWin64Prologue && !IsFunclet && TRI->needsStackRealignment(MF)) + if (IsWin64Prologue && !IsFunclet && TRI->needsStackRealignment(MF) && + TRI->canRealignStack(MF)) AlignedNumBytes = alignTo(AlignedNumBytes, MaxAlign); if (AlignedNumBytes >= StackProbeSize && EmitStackProbeCall) { assert(!X86FI->getUsesRedZone() && @@ -1748,7 +1755,8 @@ // Realign stack after we spilled callee-saved registers (so that we'll be // able to calculate their offsets from the frame pointer). // Win64 requires aligning the stack after the prologue. - if (IsWin64Prologue && TRI->needsStackRealignment(MF)) { + if (IsWin64Prologue && TRI->needsStackRealignment(MF) && + TRI->canRealignStack(MF)) { assert(HasFP && "There should be a frame pointer if stack is realigned."); BuildStackAlignAND(MBB, MBBI, DL, SPOrEstablisher, MaxAlign); } @@ -1949,7 +1957,8 @@ // Callee-saved registers were pushed on stack before the stack was // realigned. - if (TRI->needsStackRealignment(MF) && !IsWin64Prologue) + if (TRI->needsStackRealignment(MF) && TRI->canRealignStack(MF) && + !IsWin64Prologue) NumBytes = alignTo(FrameSize, MaxAlign); } else { NumBytes = StackSize - CSSize; @@ -2011,9 +2020,10 @@ // slot before popping them off! Same applies for the case, when stack was // realigned. Don't do this if this was a funclet epilogue, since the funclets // will not do realignment or dynamic stack allocation. - if ((TRI->needsStackRealignment(MF) || MFI.hasVarSizedObjects()) && + if (((TRI->needsStackRealignment(MF) && TRI->canRealignStack(MF)) || + MFI.hasVarSizedObjects()) && !IsFunclet) { - if (TRI->needsStackRealignment(MF)) + if (TRI->needsStackRealignment(MF) && TRI->canRealignStack(MF)) MBBI = FirstCSPop; unsigned SEHFrameOffset = calculateSetFPREG(SEHStackAllocAmt); uint64_t LEAAmount = @@ -2113,7 +2123,7 @@ // have dynamic allocas in addition to dynamic realignment. if (TRI->hasBasePointer(MF)) FrameReg = IsFixed ? TRI->getFramePtr() : TRI->getBaseRegister(); - else if (TRI->needsStackRealignment(MF)) + else if (TRI->needsStackRealignment(MF) && TRI->canRealignStack(MF)) FrameReg = IsFixed ? TRI->getFramePtr() : TRI->getStackRegister(); else FrameReg = TRI->getFrameRegister(MF); @@ -2172,7 +2182,7 @@ assert(isAligned(MFI.getObjectAlign(FI), -(Offset + StackSize))); return StackOffset::getFixed(Offset + StackSize); } - } else if (TRI->needsStackRealignment(MF)) { + } else if (TRI->needsStackRealignment(MF) && TRI->canRealignStack(MF)) { if (FI < 0) { // Skip the saved EBP. return StackOffset::getFixed(Offset + SlotSize + FPDelta); @@ -2264,7 +2274,7 @@ // SP in the middle of the function. if (MFI.isFixedObjectIndex(FI) && TRI->needsStackRealignment(MF) && - !STI.isTargetWin64()) + TRI->canRealignStack(MF) && !STI.isTargetWin64()) return getFrameIndexReference(MF, FI, FrameReg); // If !hasReservedCallFrame the function might have SP adjustement in the @@ -3247,7 +3257,8 @@ bool X86FrameLowering::canUseAsPrologue(const MachineBasicBlock &MBB) const { assert(MBB.getParent() && "Block is not attached to a function!"); const MachineFunction &MF = *MBB.getParent(); - return !TRI->needsStackRealignment(MF) || !MBB.isLiveIn(X86::EFLAGS); + return !TRI->needsStackRealignment(MF) || !TRI->canRealignStack(MF) || + !MBB.isLiveIn(X86::EFLAGS); } bool X86FrameLowering::canUseAsEpilogue(const MachineBasicBlock &MBB) const { @@ -3497,7 +3508,8 @@ } // Flip it if we're accessing off of the FP. - if (!TRI->needsStackRealignment(MF) && hasFP(MF)) + if (!(TRI->needsStackRealignment(MF) && TRI->canRealignStack(MF)) && + hasFP(MF)) std::reverse(ObjectsToAllocate.begin(), ObjectsToAllocate.end()); } diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -4623,7 +4623,7 @@ // Can't do sibcall if stack needs to be dynamically re-aligned. PEI needs to // emit a special epilogue. const X86RegisterInfo *RegInfo = Subtarget.getRegisterInfo(); - if (RegInfo->needsStackRealignment(MF)) + if (RegInfo->needsStackRealignment(MF) && RegInfo->canRealignStack(MF)) return false; // Also avoid sibcall optimization if either caller or callee uses struct @@ -25841,7 +25841,8 @@ if (RegInfo->hasBasePointer(MF)) Reg = RegInfo->getBaseRegister(); else { // Handles the SP or FP case. - bool CantUseFP = RegInfo->needsStackRealignment(MF); + bool CantUseFP = + RegInfo->needsStackRealignment(MF) && RegInfo->canRealignStack(MF); if (CantUseFP) Reg = RegInfo->getPtrSizedStackRegister(MF); else diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp --- a/llvm/lib/Target/X86/X86InstrInfo.cpp +++ b/llvm/lib/Target/X86/X86InstrInfo.cpp @@ -5701,7 +5701,7 @@ Align Alignment = MFI.getObjectAlign(FrameIndex); // If the function stack isn't realigned we don't want to fold instructions // that need increased alignment. - if (!RI.needsStackRealignment(MF)) + if (!RI.needsStackRealignment(MF) || !RI.canRealignStack(MF)) Alignment = std::min(Alignment, Subtarget.getFrameLowering()->getStackAlign()); if (Ops.size() == 2 && Ops[0] == 0 && Ops[1] == 1) { diff --git a/llvm/lib/Target/X86/X86RegisterInfo.cpp b/llvm/lib/Target/X86/X86RegisterInfo.cpp --- a/llvm/lib/Target/X86/X86RegisterInfo.cpp +++ b/llvm/lib/Target/X86/X86RegisterInfo.cpp @@ -648,7 +648,7 @@ // can't address variables from the stack pointer. MS inline asm can // reference locals while also adjusting the stack pointer. When we can't // use both the SP and the FP, we need a separate base pointer register. - bool CantUseFP = needsStackRealignment(MF); + bool CantUseFP = needsStackRealignment(MF) && canRealignStack(MF); return CantUseFP && CantUseSP(MFI); } @@ -728,8 +728,8 @@ int FIOffset; Register BasePtr; if (MI.isReturn()) { - assert((!needsStackRealignment(MF) || - MF.getFrameInfo().isFixedObjectIndex(FrameIndex)) && + assert((!needsStackRealignment(MF) || !canRealignStack(MF) || + MF.getFrameInfo().isFixedObjectIndex(FrameIndex)) && "Return instruction can only reference SP relative frame objects"); FIOffset = TFI->getFrameIndexReferenceSP(MF, FrameIndex, BasePtr, 0).getFixed();