diff --git a/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h b/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h --- a/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h +++ b/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h @@ -650,7 +650,8 @@ bool matchRedundantNegOperands(MachineInstr &MI, BuildFnTy &MatchInfo); bool canCombineFMadOrFMA(MachineInstr &MI, bool &AllowFusionGlobally, - bool &HasFMAD, bool &Aggressive); + bool &HasFMAD, bool &Aggressive, + bool CanReassociate = false); /// Transform (fadd (fmul x, y), z) -> (fma x, y, z) /// (fadd (fmul x, y), z) -> (fmad x, y, z) @@ -661,6 +662,11 @@ bool matchCombineFAddFpExtFMulToFMadOrFMA(MachineInstr &MI, BuildFnTy &MatchInfo); + /// Transform (fadd (fma x, y, (fmul u, v)), z) -> (fma x, y, (fma u, v, z)) + /// (fadd (fmad x, y, (fmul u, v)), z) -> (fmad x, y, (fmad u, v, z)) + bool matchCombineFAddFMAFMulToFMadOrFMA(MachineInstr &MI, + BuildFnTy &MatchInfo); + private: /// Given a non-indexed load or store instruction \p MI, find an offset that /// can be usefully and legally folded into it as a post-indexing operation. diff --git a/llvm/include/llvm/Target/GlobalISel/Combine.td b/llvm/include/llvm/Target/GlobalISel/Combine.td --- a/llvm/include/llvm/Target/GlobalISel/Combine.td +++ b/llvm/include/llvm/Target/GlobalISel/Combine.td @@ -781,6 +781,17 @@ ${info}); }]), (apply [{ Helper.applyBuildFn(*${root}, ${info}); }])>; +// Transform (fadd (fma x, y, (fmul z, u)), v) -> (fma x, y, (fma z, u, v)) +// (fadd (fmad x, y, (fmul z, u)), v) -> (fmad x, y, (fmad z, u, v)) +// Transform (fadd v, (fma x, y, (fmul z, u))) -> (fma x, y, (fma z, u, v)) +// (fadd v, (fmad x, y, (fmul z, u))) -> (fmad x, y, (fmad z, u, v)) +def combine_fadd_fma_fmul_to_fmad_or_fma: GICombineRule< + (defs root:$root, build_fn_matchinfo:$info), + (match (wip_match_opcode G_FADD):$root, + [{ return Helper.matchCombineFAddFMAFMulToFMadOrFMA(*${root}, + ${info}); }]), + (apply [{ Helper.applyBuildFn(*${root}, ${info}); }])>; + // FIXME: These should use the custom predicate feature once it lands. def undef_combines : GICombineGroup<[undef_to_fp_zero, undef_to_int_zero, undef_to_negative_one, @@ -814,7 +825,8 @@ mul_by_neg_one]>; def fma_combines : GICombineGroup<[combine_fadd_fmul_to_fmad_or_fma, - combine_fadd_fpext_fmul_to_fmad_or_fma]>; + combine_fadd_fpext_fmul_to_fmad_or_fma, + combine_fadd_fma_fmul_to_fmad_or_fma]>; def all_combines : GICombineGroup<[trivial_combines, insert_vec_elt_combines, extract_vec_elt_combines, combines_for_extload, diff --git a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp --- a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp +++ b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp @@ -4822,12 +4822,18 @@ bool CombinerHelper::canCombineFMadOrFMA(MachineInstr &MI, bool &AllowFusionGlobally, - bool &HasFMAD, bool &Aggressive) { + bool &HasFMAD, bool &Aggressive, + bool CanReassociate) { + auto *MF = MI.getMF(); const auto &TLI = *MF->getSubtarget().getTargetLowering(); const TargetOptions &Options = MF->getTarget().Options; LLT DstType = MRI.getType(MI.getOperand(0).getReg()); + if (CanReassociate && + !(Options.UnsafeFPMath || MI.getFlag(MachineInstr::MIFlag::FmReassoc))) + return false; + // Floating-point multiply-add with intermediate rounding. HasFMAD = (LI && TLI.isFMADLegal(MI, DstType)); // Floating-point multiply-add without intermediate rounding. @@ -4954,6 +4960,69 @@ return false; } +bool CombinerHelper::matchCombineFAddFMAFMulToFMadOrFMA( + MachineInstr &MI, std::function &MatchInfo) { + assert(MI.getOpcode() == TargetOpcode::G_FADD); + + bool AllowFusionGlobally, HasFMAD, Aggressive; + if (!canCombineFMadOrFMA(MI, AllowFusionGlobally, HasFMAD, Aggressive, true)) + return false; + + MachineInstr *LHS = MRI.getVRegDef(MI.getOperand(1).getReg()); + MachineInstr *RHS = MRI.getVRegDef(MI.getOperand(2).getReg()); + LLT DstTy = MRI.getType(MI.getOperand(0).getReg()); + + unsigned PreferredFusedOpcode = + HasFMAD ? TargetOpcode::G_FMAD : TargetOpcode::G_FMA; + + // If we have two choices trying to fold (fadd (fmul u, v), (fmul x, y)), + // prefer to fold the multiply with fewer uses. + if (Aggressive && isContractableFMul(*LHS, AllowFusionGlobally) && + isContractableFMul(*RHS, AllowFusionGlobally)) { + if (hasMoreUses(*LHS, *RHS, MRI)) + std::swap(LHS, RHS); + } + + MachineInstr *FMA = nullptr; + Register Z; + // fold (fadd (fma x, y, (fmul u, v)), z) -> (fma x, y, (fma u, v, z)) + if (LHS->getOpcode() == PreferredFusedOpcode && + (MRI.getVRegDef(LHS->getOperand(3).getReg())->getOpcode() == + TargetOpcode::G_FMUL) && + MRI.hasOneNonDBGUse(LHS->getOperand(0).getReg()) && + MRI.hasOneNonDBGUse(LHS->getOperand(3).getReg())) { + FMA = LHS; + Z = RHS->getOperand(0).getReg(); + } + // fold (fadd z, (fma x, y, (fmul u, v))) -> (fma x, y, (fma u, v, z)) + else if (RHS->getOpcode() == PreferredFusedOpcode && + (MRI.getVRegDef(RHS->getOperand(3).getReg())->getOpcode() == + TargetOpcode::G_FMUL) && + MRI.hasOneNonDBGUse(RHS->getOperand(0).getReg()) && + MRI.hasOneNonDBGUse(RHS->getOperand(3).getReg())) { + Z = LHS->getOperand(0).getReg(); + FMA = RHS; + } + + if (FMA) { + MachineInstr *FMulMI = MRI.getVRegDef(FMA->getOperand(3).getReg()); + Register X = FMA->getOperand(1).getReg(); + Register Y = FMA->getOperand(2).getReg(); + Register U = FMulMI->getOperand(1).getReg(); + Register V = FMulMI->getOperand(2).getReg(); + + MatchInfo = [=, &MI](MachineIRBuilder &B) { + Register InnerFMA = MRI.createGenericVirtualRegister(DstTy); + B.buildInstr(PreferredFusedOpcode, {InnerFMA}, {U, V, Z}); + B.buildInstr(PreferredFusedOpcode, {MI.getOperand(0).getReg()}, + {X, Y, InnerFMA}); + }; + return true; + } + + return false; +} + bool CombinerHelper::tryCombine(MachineInstr &MI) { if (tryCombineCopy(MI)) return true; diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-fma-mul.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-fma-mul.ll new file mode 100644 --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-fma-mul.ll @@ -0,0 +1,726 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -global-isel -march=amdgcn -mcpu=gfx900 -fp-contract=fast < %s | FileCheck -check-prefix=GFX9-CONTRACT %s +; RUN: llc -global-isel -march=amdgcn -mcpu=gfx900 --denormal-fp-math=preserve-sign < %s | FileCheck -check-prefix=GFX9-DENORM %s +; RUN: llc -global-isel -march=amdgcn -mcpu=gfx1010 -fp-contract=fast < %s | FileCheck -check-prefix=GFX10-CONTRACT %s +; RUN: llc -global-isel -march=amdgcn -mcpu=gfx1010 --denormal-fp-math=preserve-sign < %s | FileCheck -check-prefix=GFX10-DENORM %s + +; fadd (fma a, b, (fmul c, d)), e --> fma a, b, (fma c, d, e) +; fadd e, (fma a, b, (fmul c, d)) --> fma a, b, (fma c, d, e) + +define float @test_f32_add_mul(float %a, float %b, float %c, float %d, float %e) { +; GFX9-CONTRACT-LABEL: test_f32_add_mul: +; GFX9-CONTRACT: ; %bb.0: ; %.entry +; GFX9-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-CONTRACT-NEXT: v_fma_f32 v2, v2, v3, v4 +; GFX9-CONTRACT-NEXT: v_fma_f32 v0, v0, v1, v2 +; GFX9-CONTRACT-NEXT: s_setpc_b64 s[30:31] +; +; GFX9-DENORM-LABEL: test_f32_add_mul: +; GFX9-DENORM: ; %bb.0: ; %.entry +; GFX9-DENORM-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-DENORM-NEXT: v_mad_f32 v2, v2, v3, v4 +; GFX9-DENORM-NEXT: v_mac_f32_e32 v2, v0, v1 +; GFX9-DENORM-NEXT: v_mov_b32_e32 v0, v2 +; GFX9-DENORM-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-CONTRACT-LABEL: test_f32_add_mul: +; GFX10-CONTRACT: ; %bb.0: ; %.entry +; GFX10-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-CONTRACT-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX10-CONTRACT-NEXT: v_fma_f32 v2, v2, v3, v4 +; GFX10-CONTRACT-NEXT: v_fmac_f32_e32 v2, v0, v1 +; GFX10-CONTRACT-NEXT: v_mov_b32_e32 v0, v2 +; GFX10-CONTRACT-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-DENORM-LABEL: test_f32_add_mul: +; GFX10-DENORM: ; %bb.0: ; %.entry +; GFX10-DENORM-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-DENORM-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX10-DENORM-NEXT: v_fma_f32 v2, v2, v3, v4 +; GFX10-DENORM-NEXT: v_fmac_f32_e32 v2, v0, v1 +; GFX10-DENORM-NEXT: v_mov_b32_e32 v0, v2 +; GFX10-DENORM-NEXT: s_setpc_b64 s[30:31] +.entry: + %x = fmul fast float %c, %d + %y = call fast float @llvm.fmuladd.f32(float %a, float %b, float %x) + %z = fadd fast float %y, %e + ret float %z +} + +define float @test_f32_add_mul_rhs(float %a, float %b, float %c, float %d, float %e) { +; GFX9-CONTRACT-LABEL: test_f32_add_mul_rhs: +; GFX9-CONTRACT: ; %bb.0: ; %.entry +; GFX9-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-CONTRACT-NEXT: v_fma_f32 v2, v2, v3, v4 +; GFX9-CONTRACT-NEXT: v_fma_f32 v0, v0, v1, v2 +; GFX9-CONTRACT-NEXT: s_setpc_b64 s[30:31] +; +; GFX9-DENORM-LABEL: test_f32_add_mul_rhs: +; GFX9-DENORM: ; %bb.0: ; %.entry +; GFX9-DENORM-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-DENORM-NEXT: v_mad_f32 v2, v2, v3, v4 +; GFX9-DENORM-NEXT: v_mac_f32_e32 v2, v0, v1 +; GFX9-DENORM-NEXT: v_mov_b32_e32 v0, v2 +; GFX9-DENORM-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-CONTRACT-LABEL: test_f32_add_mul_rhs: +; GFX10-CONTRACT: ; %bb.0: ; %.entry +; GFX10-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-CONTRACT-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX10-CONTRACT-NEXT: v_fma_f32 v2, v2, v3, v4 +; GFX10-CONTRACT-NEXT: v_fmac_f32_e32 v2, v0, v1 +; GFX10-CONTRACT-NEXT: v_mov_b32_e32 v0, v2 +; GFX10-CONTRACT-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-DENORM-LABEL: test_f32_add_mul_rhs: +; GFX10-DENORM: ; %bb.0: ; %.entry +; GFX10-DENORM-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-DENORM-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX10-DENORM-NEXT: v_fma_f32 v2, v2, v3, v4 +; GFX10-DENORM-NEXT: v_fmac_f32_e32 v2, v0, v1 +; GFX10-DENORM-NEXT: v_mov_b32_e32 v0, v2 +; GFX10-DENORM-NEXT: s_setpc_b64 s[30:31] +.entry: + %x = fmul fast float %c, %d + %y = call fast float @llvm.fmuladd.f32(float %a, float %b, float %x) + %z = fadd fast float %e, %y + ret float %z +} + +define half @test_half_add_mul(half %a, half %b, half %c, half %d, half %e) { +; GFX9-CONTRACT-LABEL: test_half_add_mul: +; GFX9-CONTRACT: ; %bb.0: ; %.entry +; GFX9-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-CONTRACT-NEXT: v_fma_f16 v2, v2, v3, v4 +; GFX9-CONTRACT-NEXT: v_fma_f16 v0, v0, v1, v2 +; GFX9-CONTRACT-NEXT: s_setpc_b64 s[30:31] +; +; GFX9-DENORM-LABEL: test_half_add_mul: +; GFX9-DENORM: ; %bb.0: ; %.entry +; GFX9-DENORM-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-DENORM-NEXT: v_mad_legacy_f16 v2, v2, v3, v4 +; GFX9-DENORM-NEXT: v_mac_f16_e32 v2, v0, v1 +; GFX9-DENORM-NEXT: v_mov_b32_e32 v0, v2 +; GFX9-DENORM-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-CONTRACT-LABEL: test_half_add_mul: +; GFX10-CONTRACT: ; %bb.0: ; %.entry +; GFX10-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-CONTRACT-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX10-CONTRACT-NEXT: v_fmac_f16_e32 v4, v2, v3 +; GFX10-CONTRACT-NEXT: v_fmac_f16_e32 v4, v0, v1 +; GFX10-CONTRACT-NEXT: v_mov_b32_e32 v0, v4 +; GFX10-CONTRACT-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-DENORM-LABEL: test_half_add_mul: +; GFX10-DENORM: ; %bb.0: ; %.entry +; GFX10-DENORM-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-DENORM-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX10-DENORM-NEXT: v_mul_f16_e32 v2, v2, v3 +; GFX10-DENORM-NEXT: v_mul_f16_e32 v0, v0, v1 +; GFX10-DENORM-NEXT: v_add_f16_e32 v0, v0, v2 +; GFX10-DENORM-NEXT: v_add_f16_e32 v0, v0, v4 +; GFX10-DENORM-NEXT: s_setpc_b64 s[30:31] +.entry: + %x = fmul fast half %c, %d + %y = call fast half @llvm.fmuladd.f16(half %a, half %b, half %x) + %z = fadd fast half %y, %e + ret half %z +} + +define half @test_half_add_mul_rhs(half %a, half %b, half %c, half %d, half %e) { +; GFX9-CONTRACT-LABEL: test_half_add_mul_rhs: +; GFX9-CONTRACT: ; %bb.0: ; %.entry +; GFX9-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-CONTRACT-NEXT: v_fma_f16 v2, v2, v3, v4 +; GFX9-CONTRACT-NEXT: v_fma_f16 v0, v0, v1, v2 +; GFX9-CONTRACT-NEXT: s_setpc_b64 s[30:31] +; +; GFX9-DENORM-LABEL: test_half_add_mul_rhs: +; GFX9-DENORM: ; %bb.0: ; %.entry +; GFX9-DENORM-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-DENORM-NEXT: v_mad_legacy_f16 v2, v2, v3, v4 +; GFX9-DENORM-NEXT: v_mac_f16_e32 v2, v0, v1 +; GFX9-DENORM-NEXT: v_mov_b32_e32 v0, v2 +; GFX9-DENORM-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-CONTRACT-LABEL: test_half_add_mul_rhs: +; GFX10-CONTRACT: ; %bb.0: ; %.entry +; GFX10-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-CONTRACT-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX10-CONTRACT-NEXT: v_fmac_f16_e32 v4, v2, v3 +; GFX10-CONTRACT-NEXT: v_fmac_f16_e32 v4, v0, v1 +; GFX10-CONTRACT-NEXT: v_mov_b32_e32 v0, v4 +; GFX10-CONTRACT-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-DENORM-LABEL: test_half_add_mul_rhs: +; GFX10-DENORM: ; %bb.0: ; %.entry +; GFX10-DENORM-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-DENORM-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX10-DENORM-NEXT: v_mul_f16_e32 v2, v2, v3 +; GFX10-DENORM-NEXT: v_mul_f16_e32 v0, v0, v1 +; GFX10-DENORM-NEXT: v_add_f16_e32 v0, v0, v2 +; GFX10-DENORM-NEXT: v_add_f16_e32 v0, v4, v0 +; GFX10-DENORM-NEXT: s_setpc_b64 s[30:31] +.entry: + %x = fmul fast half %c, %d + %y = call fast half @llvm.fmuladd.f16(half %a, half %b, half %x) + %z = fadd fast half %e, %y + ret half %z +} + +define double @test_double_add_mul(double %a, double %b, double %c, double %d, double %e) { +; GFX9-CONTRACT-LABEL: test_double_add_mul: +; GFX9-CONTRACT: ; %bb.0: ; %.entry +; GFX9-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-CONTRACT-NEXT: v_fma_f64 v[4:5], v[4:5], v[6:7], v[8:9] +; GFX9-CONTRACT-NEXT: v_fma_f64 v[0:1], v[0:1], v[2:3], v[4:5] +; GFX9-CONTRACT-NEXT: s_setpc_b64 s[30:31] +; +; GFX9-DENORM-LABEL: test_double_add_mul: +; GFX9-DENORM: ; %bb.0: ; %.entry +; GFX9-DENORM-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-DENORM-NEXT: v_fma_f64 v[4:5], v[4:5], v[6:7], v[8:9] +; GFX9-DENORM-NEXT: v_fma_f64 v[0:1], v[0:1], v[2:3], v[4:5] +; GFX9-DENORM-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-CONTRACT-LABEL: test_double_add_mul: +; GFX10-CONTRACT: ; %bb.0: ; %.entry +; GFX10-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-CONTRACT-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX10-CONTRACT-NEXT: v_fma_f64 v[4:5], v[4:5], v[6:7], v[8:9] +; GFX10-CONTRACT-NEXT: v_fma_f64 v[0:1], v[0:1], v[2:3], v[4:5] +; GFX10-CONTRACT-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-DENORM-LABEL: test_double_add_mul: +; GFX10-DENORM: ; %bb.0: ; %.entry +; GFX10-DENORM-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-DENORM-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX10-DENORM-NEXT: v_fma_f64 v[4:5], v[4:5], v[6:7], v[8:9] +; GFX10-DENORM-NEXT: v_fma_f64 v[0:1], v[0:1], v[2:3], v[4:5] +; GFX10-DENORM-NEXT: s_setpc_b64 s[30:31] +.entry: + %x = fmul fast double %c, %d + %y = call fast double @llvm.fmuladd.f64(double %a, double %b, double %x) + %z = fadd fast double %y, %e + ret double %z +} + +define double @test_double_add_mul_rhs(double %a, double %b, double %c, double %d, double %e) { +; GFX9-CONTRACT-LABEL: test_double_add_mul_rhs: +; GFX9-CONTRACT: ; %bb.0: ; %.entry +; GFX9-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-CONTRACT-NEXT: v_fma_f64 v[4:5], v[4:5], v[6:7], v[8:9] +; GFX9-CONTRACT-NEXT: v_fma_f64 v[0:1], v[0:1], v[2:3], v[4:5] +; GFX9-CONTRACT-NEXT: s_setpc_b64 s[30:31] +; +; GFX9-DENORM-LABEL: test_double_add_mul_rhs: +; GFX9-DENORM: ; %bb.0: ; %.entry +; GFX9-DENORM-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-DENORM-NEXT: v_fma_f64 v[4:5], v[4:5], v[6:7], v[8:9] +; GFX9-DENORM-NEXT: v_fma_f64 v[0:1], v[0:1], v[2:3], v[4:5] +; GFX9-DENORM-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-CONTRACT-LABEL: test_double_add_mul_rhs: +; GFX10-CONTRACT: ; %bb.0: ; %.entry +; GFX10-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-CONTRACT-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX10-CONTRACT-NEXT: v_fma_f64 v[4:5], v[4:5], v[6:7], v[8:9] +; GFX10-CONTRACT-NEXT: v_fma_f64 v[0:1], v[0:1], v[2:3], v[4:5] +; GFX10-CONTRACT-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-DENORM-LABEL: test_double_add_mul_rhs: +; GFX10-DENORM: ; %bb.0: ; %.entry +; GFX10-DENORM-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-DENORM-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX10-DENORM-NEXT: v_fma_f64 v[4:5], v[4:5], v[6:7], v[8:9] +; GFX10-DENORM-NEXT: v_fma_f64 v[0:1], v[0:1], v[2:3], v[4:5] +; GFX10-DENORM-NEXT: s_setpc_b64 s[30:31] +.entry: + %x = fmul fast double %c, %d + %y = call fast double @llvm.fmuladd.f64(double %a, double %b, double %x) + %z = fadd fast double %e, %y + ret double %z +} + +define <4 x float> @test_v4f32_add_mul(<4 x float> %a, <4 x float> %b, <4 x float> %c, <4 x float> %d, <4 x float> %e) { +; GFX9-CONTRACT-LABEL: test_v4f32_add_mul: +; GFX9-CONTRACT: ; %bb.0: ; %.entry +; GFX9-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-CONTRACT-NEXT: v_fma_f32 v8, v8, v12, v16 +; GFX9-CONTRACT-NEXT: v_fma_f32 v9, v9, v13, v17 +; GFX9-CONTRACT-NEXT: v_fma_f32 v10, v10, v14, v18 +; GFX9-CONTRACT-NEXT: v_fma_f32 v11, v11, v15, v19 +; GFX9-CONTRACT-NEXT: v_fma_f32 v0, v0, v4, v8 +; GFX9-CONTRACT-NEXT: v_fma_f32 v1, v1, v5, v9 +; GFX9-CONTRACT-NEXT: v_fma_f32 v2, v2, v6, v10 +; GFX9-CONTRACT-NEXT: v_fma_f32 v3, v3, v7, v11 +; GFX9-CONTRACT-NEXT: s_setpc_b64 s[30:31] +; +; GFX9-DENORM-LABEL: test_v4f32_add_mul: +; GFX9-DENORM: ; %bb.0: ; %.entry +; GFX9-DENORM-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-DENORM-NEXT: v_mad_f32 v8, v8, v12, v16 +; GFX9-DENORM-NEXT: v_mac_f32_e32 v8, v0, v4 +; GFX9-DENORM-NEXT: v_mad_f32 v4, v9, v13, v17 +; GFX9-DENORM-NEXT: v_mac_f32_e32 v4, v1, v5 +; GFX9-DENORM-NEXT: v_mad_f32 v5, v10, v14, v18 +; GFX9-DENORM-NEXT: v_mac_f32_e32 v5, v2, v6 +; GFX9-DENORM-NEXT: v_mad_f32 v6, v11, v15, v19 +; GFX9-DENORM-NEXT: v_mac_f32_e32 v6, v3, v7 +; GFX9-DENORM-NEXT: v_mov_b32_e32 v0, v8 +; GFX9-DENORM-NEXT: v_mov_b32_e32 v1, v4 +; GFX9-DENORM-NEXT: v_mov_b32_e32 v2, v5 +; GFX9-DENORM-NEXT: v_mov_b32_e32 v3, v6 +; GFX9-DENORM-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-CONTRACT-LABEL: test_v4f32_add_mul: +; GFX10-CONTRACT: ; %bb.0: ; %.entry +; GFX10-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-CONTRACT-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX10-CONTRACT-NEXT: v_fma_f32 v8, v8, v12, v16 +; GFX10-CONTRACT-NEXT: v_fma_f32 v9, v9, v13, v17 +; GFX10-CONTRACT-NEXT: v_fma_f32 v10, v10, v14, v18 +; GFX10-CONTRACT-NEXT: v_fma_f32 v11, v11, v15, v19 +; GFX10-CONTRACT-NEXT: v_fmac_f32_e32 v8, v0, v4 +; GFX10-CONTRACT-NEXT: v_fmac_f32_e32 v9, v1, v5 +; GFX10-CONTRACT-NEXT: v_fmac_f32_e32 v10, v2, v6 +; GFX10-CONTRACT-NEXT: v_fmac_f32_e32 v11, v3, v7 +; GFX10-CONTRACT-NEXT: v_mov_b32_e32 v0, v8 +; GFX10-CONTRACT-NEXT: v_mov_b32_e32 v1, v9 +; GFX10-CONTRACT-NEXT: v_mov_b32_e32 v2, v10 +; GFX10-CONTRACT-NEXT: v_mov_b32_e32 v3, v11 +; GFX10-CONTRACT-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-DENORM-LABEL: test_v4f32_add_mul: +; GFX10-DENORM: ; %bb.0: ; %.entry +; GFX10-DENORM-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-DENORM-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX10-DENORM-NEXT: v_fma_f32 v8, v8, v12, v16 +; GFX10-DENORM-NEXT: v_fma_f32 v9, v9, v13, v17 +; GFX10-DENORM-NEXT: v_fma_f32 v10, v10, v14, v18 +; GFX10-DENORM-NEXT: v_fma_f32 v11, v11, v15, v19 +; GFX10-DENORM-NEXT: v_fmac_f32_e32 v8, v0, v4 +; GFX10-DENORM-NEXT: v_fmac_f32_e32 v9, v1, v5 +; GFX10-DENORM-NEXT: v_fmac_f32_e32 v10, v2, v6 +; GFX10-DENORM-NEXT: v_fmac_f32_e32 v11, v3, v7 +; GFX10-DENORM-NEXT: v_mov_b32_e32 v0, v8 +; GFX10-DENORM-NEXT: v_mov_b32_e32 v1, v9 +; GFX10-DENORM-NEXT: v_mov_b32_e32 v2, v10 +; GFX10-DENORM-NEXT: v_mov_b32_e32 v3, v11 +; GFX10-DENORM-NEXT: s_setpc_b64 s[30:31] +.entry: + %x = fmul fast <4 x float> %c, %d + %y = call fast <4 x float> @llvm.fmuladd.v4f32(<4 x float> %a, <4 x float> %b, <4 x float> %x) + %z = fadd fast <4 x float> %y, %e + ret <4 x float> %z +} + +define <4 x float> @test_v4f32_add_mul_rhs(<4 x float> %a, <4 x float> %b, <4 x float> %c, <4 x float> %d, <4 x float> %e) { +; GFX9-CONTRACT-LABEL: test_v4f32_add_mul_rhs: +; GFX9-CONTRACT: ; %bb.0: ; %.entry +; GFX9-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-CONTRACT-NEXT: v_fma_f32 v8, v8, v12, v16 +; GFX9-CONTRACT-NEXT: v_fma_f32 v9, v9, v13, v17 +; GFX9-CONTRACT-NEXT: v_fma_f32 v10, v10, v14, v18 +; GFX9-CONTRACT-NEXT: v_fma_f32 v11, v11, v15, v19 +; GFX9-CONTRACT-NEXT: v_fma_f32 v0, v0, v4, v8 +; GFX9-CONTRACT-NEXT: v_fma_f32 v1, v1, v5, v9 +; GFX9-CONTRACT-NEXT: v_fma_f32 v2, v2, v6, v10 +; GFX9-CONTRACT-NEXT: v_fma_f32 v3, v3, v7, v11 +; GFX9-CONTRACT-NEXT: s_setpc_b64 s[30:31] +; +; GFX9-DENORM-LABEL: test_v4f32_add_mul_rhs: +; GFX9-DENORM: ; %bb.0: ; %.entry +; GFX9-DENORM-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-DENORM-NEXT: v_mad_f32 v8, v8, v12, v16 +; GFX9-DENORM-NEXT: v_mac_f32_e32 v8, v0, v4 +; GFX9-DENORM-NEXT: v_mad_f32 v4, v9, v13, v17 +; GFX9-DENORM-NEXT: v_mac_f32_e32 v4, v1, v5 +; GFX9-DENORM-NEXT: v_mad_f32 v5, v10, v14, v18 +; GFX9-DENORM-NEXT: v_mac_f32_e32 v5, v2, v6 +; GFX9-DENORM-NEXT: v_mad_f32 v6, v11, v15, v19 +; GFX9-DENORM-NEXT: v_mac_f32_e32 v6, v3, v7 +; GFX9-DENORM-NEXT: v_mov_b32_e32 v0, v8 +; GFX9-DENORM-NEXT: v_mov_b32_e32 v1, v4 +; GFX9-DENORM-NEXT: v_mov_b32_e32 v2, v5 +; GFX9-DENORM-NEXT: v_mov_b32_e32 v3, v6 +; GFX9-DENORM-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-CONTRACT-LABEL: test_v4f32_add_mul_rhs: +; GFX10-CONTRACT: ; %bb.0: ; %.entry +; GFX10-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-CONTRACT-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX10-CONTRACT-NEXT: v_fma_f32 v8, v8, v12, v16 +; GFX10-CONTRACT-NEXT: v_fma_f32 v9, v9, v13, v17 +; GFX10-CONTRACT-NEXT: v_fma_f32 v10, v10, v14, v18 +; GFX10-CONTRACT-NEXT: v_fma_f32 v11, v11, v15, v19 +; GFX10-CONTRACT-NEXT: v_fmac_f32_e32 v8, v0, v4 +; GFX10-CONTRACT-NEXT: v_fmac_f32_e32 v9, v1, v5 +; GFX10-CONTRACT-NEXT: v_fmac_f32_e32 v10, v2, v6 +; GFX10-CONTRACT-NEXT: v_fmac_f32_e32 v11, v3, v7 +; GFX10-CONTRACT-NEXT: v_mov_b32_e32 v0, v8 +; GFX10-CONTRACT-NEXT: v_mov_b32_e32 v1, v9 +; GFX10-CONTRACT-NEXT: v_mov_b32_e32 v2, v10 +; GFX10-CONTRACT-NEXT: v_mov_b32_e32 v3, v11 +; GFX10-CONTRACT-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-DENORM-LABEL: test_v4f32_add_mul_rhs: +; GFX10-DENORM: ; %bb.0: ; %.entry +; GFX10-DENORM-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-DENORM-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX10-DENORM-NEXT: v_fma_f32 v8, v8, v12, v16 +; GFX10-DENORM-NEXT: v_fma_f32 v9, v9, v13, v17 +; GFX10-DENORM-NEXT: v_fma_f32 v10, v10, v14, v18 +; GFX10-DENORM-NEXT: v_fma_f32 v11, v11, v15, v19 +; GFX10-DENORM-NEXT: v_fmac_f32_e32 v8, v0, v4 +; GFX10-DENORM-NEXT: v_fmac_f32_e32 v9, v1, v5 +; GFX10-DENORM-NEXT: v_fmac_f32_e32 v10, v2, v6 +; GFX10-DENORM-NEXT: v_fmac_f32_e32 v11, v3, v7 +; GFX10-DENORM-NEXT: v_mov_b32_e32 v0, v8 +; GFX10-DENORM-NEXT: v_mov_b32_e32 v1, v9 +; GFX10-DENORM-NEXT: v_mov_b32_e32 v2, v10 +; GFX10-DENORM-NEXT: v_mov_b32_e32 v3, v11 +; GFX10-DENORM-NEXT: s_setpc_b64 s[30:31] +.entry: + %x = fmul fast <4 x float> %c, %d + %y = call fast <4 x float> @llvm.fmuladd.v4f32(<4 x float> %a, <4 x float> %b, <4 x float> %x) + %z = fadd fast <4 x float> %e, %y + ret <4 x float> %z +} + +define <4 x half> @test_f16_add_mul(<4 x half> %a, <4 x half> %b, <4 x half> %c, <4 x half> %d, <4 x half> %e) { +; GFX9-CONTRACT-LABEL: test_f16_add_mul: +; GFX9-CONTRACT: ; %bb.0: ; %.entry +; GFX9-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-CONTRACT-NEXT: v_pk_fma_f16 v4, v4, v6, v8 +; GFX9-CONTRACT-NEXT: v_pk_fma_f16 v5, v5, v7, v9 +; GFX9-CONTRACT-NEXT: v_pk_fma_f16 v0, v0, v2, v4 +; GFX9-CONTRACT-NEXT: v_pk_fma_f16 v1, v1, v3, v5 +; GFX9-CONTRACT-NEXT: s_setpc_b64 s[30:31] +; +; GFX9-DENORM-LABEL: test_f16_add_mul: +; GFX9-DENORM: ; %bb.0: ; %.entry +; GFX9-DENORM-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-DENORM-NEXT: v_pk_mul_f16 v4, v4, v6 +; GFX9-DENORM-NEXT: v_pk_mul_f16 v5, v5, v7 +; GFX9-DENORM-NEXT: v_pk_mul_f16 v0, v0, v2 +; GFX9-DENORM-NEXT: v_pk_mul_f16 v1, v1, v3 +; GFX9-DENORM-NEXT: v_pk_add_f16 v0, v0, v4 +; GFX9-DENORM-NEXT: v_pk_add_f16 v1, v1, v5 +; GFX9-DENORM-NEXT: v_pk_add_f16 v0, v0, v8 +; GFX9-DENORM-NEXT: v_pk_add_f16 v1, v1, v9 +; GFX9-DENORM-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-CONTRACT-LABEL: test_f16_add_mul: +; GFX10-CONTRACT: ; %bb.0: ; %.entry +; GFX10-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-CONTRACT-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX10-CONTRACT-NEXT: v_pk_fma_f16 v4, v4, v6, v8 +; GFX10-CONTRACT-NEXT: v_pk_fma_f16 v5, v5, v7, v9 +; GFX10-CONTRACT-NEXT: v_pk_fma_f16 v0, v0, v2, v4 +; GFX10-CONTRACT-NEXT: v_pk_fma_f16 v1, v1, v3, v5 +; GFX10-CONTRACT-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-DENORM-LABEL: test_f16_add_mul: +; GFX10-DENORM: ; %bb.0: ; %.entry +; GFX10-DENORM-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-DENORM-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX10-DENORM-NEXT: v_pk_mul_f16 v4, v4, v6 +; GFX10-DENORM-NEXT: v_pk_mul_f16 v5, v5, v7 +; GFX10-DENORM-NEXT: v_pk_mul_f16 v0, v0, v2 +; GFX10-DENORM-NEXT: v_pk_mul_f16 v1, v1, v3 +; GFX10-DENORM-NEXT: v_pk_add_f16 v0, v0, v4 +; GFX10-DENORM-NEXT: v_pk_add_f16 v1, v1, v5 +; GFX10-DENORM-NEXT: v_pk_add_f16 v0, v0, v8 +; GFX10-DENORM-NEXT: v_pk_add_f16 v1, v1, v9 +; GFX10-DENORM-NEXT: s_setpc_b64 s[30:31] +.entry: + %x = fmul fast <4 x half> %c, %d + %y = call fast <4 x half> @llvm.fmuladd.v4f16(<4 x half> %a, <4 x half> %b, <4 x half> %x) + %z = fadd fast <4 x half> %y, %e + ret <4 x half> %z +} + +define <4 x half> @test_f16_add_mul_rhs(<4 x half> %a, <4 x half> %b, <4 x half> %c, <4 x half> %d, <4 x half> %e) { +; GFX9-CONTRACT-LABEL: test_f16_add_mul_rhs: +; GFX9-CONTRACT: ; %bb.0: ; %.entry +; GFX9-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-CONTRACT-NEXT: v_pk_fma_f16 v4, v4, v6, v8 +; GFX9-CONTRACT-NEXT: v_pk_fma_f16 v5, v5, v7, v9 +; GFX9-CONTRACT-NEXT: v_pk_fma_f16 v0, v0, v2, v4 +; GFX9-CONTRACT-NEXT: v_pk_fma_f16 v1, v1, v3, v5 +; GFX9-CONTRACT-NEXT: s_setpc_b64 s[30:31] +; +; GFX9-DENORM-LABEL: test_f16_add_mul_rhs: +; GFX9-DENORM: ; %bb.0: ; %.entry +; GFX9-DENORM-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-DENORM-NEXT: v_pk_mul_f16 v4, v4, v6 +; GFX9-DENORM-NEXT: v_pk_mul_f16 v5, v5, v7 +; GFX9-DENORM-NEXT: v_pk_mul_f16 v0, v0, v2 +; GFX9-DENORM-NEXT: v_pk_mul_f16 v1, v1, v3 +; GFX9-DENORM-NEXT: v_pk_add_f16 v0, v0, v4 +; GFX9-DENORM-NEXT: v_pk_add_f16 v1, v1, v5 +; GFX9-DENORM-NEXT: v_pk_add_f16 v0, v8, v0 +; GFX9-DENORM-NEXT: v_pk_add_f16 v1, v9, v1 +; GFX9-DENORM-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-CONTRACT-LABEL: test_f16_add_mul_rhs: +; GFX10-CONTRACT: ; %bb.0: ; %.entry +; GFX10-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-CONTRACT-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX10-CONTRACT-NEXT: v_pk_fma_f16 v4, v4, v6, v8 +; GFX10-CONTRACT-NEXT: v_pk_fma_f16 v5, v5, v7, v9 +; GFX10-CONTRACT-NEXT: v_pk_fma_f16 v0, v0, v2, v4 +; GFX10-CONTRACT-NEXT: v_pk_fma_f16 v1, v1, v3, v5 +; GFX10-CONTRACT-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-DENORM-LABEL: test_f16_add_mul_rhs: +; GFX10-DENORM: ; %bb.0: ; %.entry +; GFX10-DENORM-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-DENORM-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX10-DENORM-NEXT: v_pk_mul_f16 v4, v4, v6 +; GFX10-DENORM-NEXT: v_pk_mul_f16 v5, v5, v7 +; GFX10-DENORM-NEXT: v_pk_mul_f16 v0, v0, v2 +; GFX10-DENORM-NEXT: v_pk_mul_f16 v1, v1, v3 +; GFX10-DENORM-NEXT: v_pk_add_f16 v0, v0, v4 +; GFX10-DENORM-NEXT: v_pk_add_f16 v1, v1, v5 +; GFX10-DENORM-NEXT: v_pk_add_f16 v0, v8, v0 +; GFX10-DENORM-NEXT: v_pk_add_f16 v1, v9, v1 +; GFX10-DENORM-NEXT: s_setpc_b64 s[30:31] +.entry: + %x = fmul fast <4 x half> %c, %d + %y = call fast <4 x half> @llvm.fmuladd.v4f16(<4 x half> %a, <4 x half> %b, <4 x half> %x) + %z = fadd fast <4 x half> %e, %y + ret <4 x half> %z +} + +define <4 x double> @test_f64_add_mul(<4 x double> %a, <4 x double> %b, <4 x double> %c, <4 x double> %d, <4 x double> %e) { +; GFX9-CONTRACT-LABEL: test_f64_add_mul: +; GFX9-CONTRACT: ; %bb.0: ; %.entry +; GFX9-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-CONTRACT-NEXT: buffer_load_dword v32, off, s[0:3], s32 +; GFX9-CONTRACT-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:4 +; GFX9-CONTRACT-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:8 +; GFX9-CONTRACT-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:12 +; GFX9-CONTRACT-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:16 +; GFX9-CONTRACT-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:20 +; GFX9-CONTRACT-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:24 +; GFX9-CONTRACT-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:28 +; GFX9-CONTRACT-NEXT: s_waitcnt vmcnt(6) +; GFX9-CONTRACT-NEXT: v_fma_f64 v[16:17], v[16:17], v[24:25], v[32:33] +; GFX9-CONTRACT-NEXT: s_waitcnt vmcnt(4) +; GFX9-CONTRACT-NEXT: v_fma_f64 v[18:19], v[18:19], v[26:27], v[34:35] +; GFX9-CONTRACT-NEXT: s_waitcnt vmcnt(2) +; GFX9-CONTRACT-NEXT: v_fma_f64 v[20:21], v[20:21], v[28:29], v[36:37] +; GFX9-CONTRACT-NEXT: s_waitcnt vmcnt(0) +; GFX9-CONTRACT-NEXT: v_fma_f64 v[22:23], v[22:23], v[30:31], v[38:39] +; GFX9-CONTRACT-NEXT: v_fma_f64 v[0:1], v[0:1], v[8:9], v[16:17] +; GFX9-CONTRACT-NEXT: v_fma_f64 v[2:3], v[2:3], v[10:11], v[18:19] +; GFX9-CONTRACT-NEXT: v_fma_f64 v[4:5], v[4:5], v[12:13], v[20:21] +; GFX9-CONTRACT-NEXT: v_fma_f64 v[6:7], v[6:7], v[14:15], v[22:23] +; GFX9-CONTRACT-NEXT: s_setpc_b64 s[30:31] +; +; GFX9-DENORM-LABEL: test_f64_add_mul: +; GFX9-DENORM: ; %bb.0: ; %.entry +; GFX9-DENORM-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-DENORM-NEXT: buffer_load_dword v32, off, s[0:3], s32 +; GFX9-DENORM-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:4 +; GFX9-DENORM-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:8 +; GFX9-DENORM-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:12 +; GFX9-DENORM-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:16 +; GFX9-DENORM-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:20 +; GFX9-DENORM-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:24 +; GFX9-DENORM-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:28 +; GFX9-DENORM-NEXT: s_waitcnt vmcnt(6) +; GFX9-DENORM-NEXT: v_fma_f64 v[16:17], v[16:17], v[24:25], v[32:33] +; GFX9-DENORM-NEXT: s_waitcnt vmcnt(4) +; GFX9-DENORM-NEXT: v_fma_f64 v[18:19], v[18:19], v[26:27], v[34:35] +; GFX9-DENORM-NEXT: s_waitcnt vmcnt(2) +; GFX9-DENORM-NEXT: v_fma_f64 v[20:21], v[20:21], v[28:29], v[36:37] +; GFX9-DENORM-NEXT: s_waitcnt vmcnt(0) +; GFX9-DENORM-NEXT: v_fma_f64 v[22:23], v[22:23], v[30:31], v[38:39] +; GFX9-DENORM-NEXT: v_fma_f64 v[0:1], v[0:1], v[8:9], v[16:17] +; GFX9-DENORM-NEXT: v_fma_f64 v[2:3], v[2:3], v[10:11], v[18:19] +; GFX9-DENORM-NEXT: v_fma_f64 v[4:5], v[4:5], v[12:13], v[20:21] +; GFX9-DENORM-NEXT: v_fma_f64 v[6:7], v[6:7], v[14:15], v[22:23] +; GFX9-DENORM-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-CONTRACT-LABEL: test_f64_add_mul: +; GFX10-CONTRACT: ; %bb.0: ; %.entry +; GFX10-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-CONTRACT-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX10-CONTRACT-NEXT: s_clause 0x7 +; GFX10-CONTRACT-NEXT: buffer_load_dword v32, off, s[0:3], s32 +; GFX10-CONTRACT-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:4 +; GFX10-CONTRACT-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:8 +; GFX10-CONTRACT-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:12 +; GFX10-CONTRACT-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:16 +; GFX10-CONTRACT-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:20 +; GFX10-CONTRACT-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:24 +; GFX10-CONTRACT-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:28 +; GFX10-CONTRACT-NEXT: s_waitcnt vmcnt(6) +; GFX10-CONTRACT-NEXT: v_fma_f64 v[16:17], v[16:17], v[24:25], v[32:33] +; GFX10-CONTRACT-NEXT: s_waitcnt vmcnt(4) +; GFX10-CONTRACT-NEXT: v_fma_f64 v[18:19], v[18:19], v[26:27], v[34:35] +; GFX10-CONTRACT-NEXT: s_waitcnt vmcnt(2) +; GFX10-CONTRACT-NEXT: v_fma_f64 v[20:21], v[20:21], v[28:29], v[36:37] +; GFX10-CONTRACT-NEXT: s_waitcnt vmcnt(0) +; GFX10-CONTRACT-NEXT: v_fma_f64 v[22:23], v[22:23], v[30:31], v[38:39] +; GFX10-CONTRACT-NEXT: v_fma_f64 v[0:1], v[0:1], v[8:9], v[16:17] +; GFX10-CONTRACT-NEXT: v_fma_f64 v[2:3], v[2:3], v[10:11], v[18:19] +; GFX10-CONTRACT-NEXT: v_fma_f64 v[4:5], v[4:5], v[12:13], v[20:21] +; GFX10-CONTRACT-NEXT: v_fma_f64 v[6:7], v[6:7], v[14:15], v[22:23] +; GFX10-CONTRACT-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-DENORM-LABEL: test_f64_add_mul: +; GFX10-DENORM: ; %bb.0: ; %.entry +; GFX10-DENORM-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-DENORM-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX10-DENORM-NEXT: s_clause 0x7 +; GFX10-DENORM-NEXT: buffer_load_dword v32, off, s[0:3], s32 +; GFX10-DENORM-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:4 +; GFX10-DENORM-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:8 +; GFX10-DENORM-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:12 +; GFX10-DENORM-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:16 +; GFX10-DENORM-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:20 +; GFX10-DENORM-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:24 +; GFX10-DENORM-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:28 +; GFX10-DENORM-NEXT: s_waitcnt vmcnt(6) +; GFX10-DENORM-NEXT: v_fma_f64 v[16:17], v[16:17], v[24:25], v[32:33] +; GFX10-DENORM-NEXT: s_waitcnt vmcnt(4) +; GFX10-DENORM-NEXT: v_fma_f64 v[18:19], v[18:19], v[26:27], v[34:35] +; GFX10-DENORM-NEXT: s_waitcnt vmcnt(2) +; GFX10-DENORM-NEXT: v_fma_f64 v[20:21], v[20:21], v[28:29], v[36:37] +; GFX10-DENORM-NEXT: s_waitcnt vmcnt(0) +; GFX10-DENORM-NEXT: v_fma_f64 v[22:23], v[22:23], v[30:31], v[38:39] +; GFX10-DENORM-NEXT: v_fma_f64 v[0:1], v[0:1], v[8:9], v[16:17] +; GFX10-DENORM-NEXT: v_fma_f64 v[2:3], v[2:3], v[10:11], v[18:19] +; GFX10-DENORM-NEXT: v_fma_f64 v[4:5], v[4:5], v[12:13], v[20:21] +; GFX10-DENORM-NEXT: v_fma_f64 v[6:7], v[6:7], v[14:15], v[22:23] +; GFX10-DENORM-NEXT: s_setpc_b64 s[30:31] +.entry: + %x = fmul fast <4 x double> %c, %d + %y = call fast <4 x double> @llvm.fmuladd.v4f64(<4 x double> %a, <4 x double> %b, <4 x double> %x) + %z = fadd fast <4 x double> %y, %e + ret <4 x double> %z +} + +define <4 x double> @test_f64_add_mul_rhs(<4 x double> %a, <4 x double> %b, <4 x double> %c, <4 x double> %d, <4 x double> %e) { +; GFX9-CONTRACT-LABEL: test_f64_add_mul_rhs: +; GFX9-CONTRACT: ; %bb.0: ; %.entry +; GFX9-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-CONTRACT-NEXT: buffer_load_dword v32, off, s[0:3], s32 +; GFX9-CONTRACT-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:4 +; GFX9-CONTRACT-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:8 +; GFX9-CONTRACT-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:12 +; GFX9-CONTRACT-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:16 +; GFX9-CONTRACT-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:20 +; GFX9-CONTRACT-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:24 +; GFX9-CONTRACT-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:28 +; GFX9-CONTRACT-NEXT: s_waitcnt vmcnt(6) +; GFX9-CONTRACT-NEXT: v_fma_f64 v[16:17], v[16:17], v[24:25], v[32:33] +; GFX9-CONTRACT-NEXT: s_waitcnt vmcnt(4) +; GFX9-CONTRACT-NEXT: v_fma_f64 v[18:19], v[18:19], v[26:27], v[34:35] +; GFX9-CONTRACT-NEXT: s_waitcnt vmcnt(2) +; GFX9-CONTRACT-NEXT: v_fma_f64 v[20:21], v[20:21], v[28:29], v[36:37] +; GFX9-CONTRACT-NEXT: s_waitcnt vmcnt(0) +; GFX9-CONTRACT-NEXT: v_fma_f64 v[22:23], v[22:23], v[30:31], v[38:39] +; GFX9-CONTRACT-NEXT: v_fma_f64 v[0:1], v[0:1], v[8:9], v[16:17] +; GFX9-CONTRACT-NEXT: v_fma_f64 v[2:3], v[2:3], v[10:11], v[18:19] +; GFX9-CONTRACT-NEXT: v_fma_f64 v[4:5], v[4:5], v[12:13], v[20:21] +; GFX9-CONTRACT-NEXT: v_fma_f64 v[6:7], v[6:7], v[14:15], v[22:23] +; GFX9-CONTRACT-NEXT: s_setpc_b64 s[30:31] +; +; GFX9-DENORM-LABEL: test_f64_add_mul_rhs: +; GFX9-DENORM: ; %bb.0: ; %.entry +; GFX9-DENORM-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-DENORM-NEXT: buffer_load_dword v32, off, s[0:3], s32 +; GFX9-DENORM-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:4 +; GFX9-DENORM-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:8 +; GFX9-DENORM-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:12 +; GFX9-DENORM-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:16 +; GFX9-DENORM-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:20 +; GFX9-DENORM-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:24 +; GFX9-DENORM-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:28 +; GFX9-DENORM-NEXT: s_waitcnt vmcnt(6) +; GFX9-DENORM-NEXT: v_fma_f64 v[16:17], v[16:17], v[24:25], v[32:33] +; GFX9-DENORM-NEXT: s_waitcnt vmcnt(4) +; GFX9-DENORM-NEXT: v_fma_f64 v[18:19], v[18:19], v[26:27], v[34:35] +; GFX9-DENORM-NEXT: s_waitcnt vmcnt(2) +; GFX9-DENORM-NEXT: v_fma_f64 v[20:21], v[20:21], v[28:29], v[36:37] +; GFX9-DENORM-NEXT: s_waitcnt vmcnt(0) +; GFX9-DENORM-NEXT: v_fma_f64 v[22:23], v[22:23], v[30:31], v[38:39] +; GFX9-DENORM-NEXT: v_fma_f64 v[0:1], v[0:1], v[8:9], v[16:17] +; GFX9-DENORM-NEXT: v_fma_f64 v[2:3], v[2:3], v[10:11], v[18:19] +; GFX9-DENORM-NEXT: v_fma_f64 v[4:5], v[4:5], v[12:13], v[20:21] +; GFX9-DENORM-NEXT: v_fma_f64 v[6:7], v[6:7], v[14:15], v[22:23] +; GFX9-DENORM-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-CONTRACT-LABEL: test_f64_add_mul_rhs: +; GFX10-CONTRACT: ; %bb.0: ; %.entry +; GFX10-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-CONTRACT-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX10-CONTRACT-NEXT: s_clause 0x7 +; GFX10-CONTRACT-NEXT: buffer_load_dword v32, off, s[0:3], s32 +; GFX10-CONTRACT-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:4 +; GFX10-CONTRACT-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:8 +; GFX10-CONTRACT-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:12 +; GFX10-CONTRACT-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:16 +; GFX10-CONTRACT-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:20 +; GFX10-CONTRACT-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:24 +; GFX10-CONTRACT-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:28 +; GFX10-CONTRACT-NEXT: s_waitcnt vmcnt(6) +; GFX10-CONTRACT-NEXT: v_fma_f64 v[16:17], v[16:17], v[24:25], v[32:33] +; GFX10-CONTRACT-NEXT: s_waitcnt vmcnt(4) +; GFX10-CONTRACT-NEXT: v_fma_f64 v[18:19], v[18:19], v[26:27], v[34:35] +; GFX10-CONTRACT-NEXT: s_waitcnt vmcnt(2) +; GFX10-CONTRACT-NEXT: v_fma_f64 v[20:21], v[20:21], v[28:29], v[36:37] +; GFX10-CONTRACT-NEXT: s_waitcnt vmcnt(0) +; GFX10-CONTRACT-NEXT: v_fma_f64 v[22:23], v[22:23], v[30:31], v[38:39] +; GFX10-CONTRACT-NEXT: v_fma_f64 v[0:1], v[0:1], v[8:9], v[16:17] +; GFX10-CONTRACT-NEXT: v_fma_f64 v[2:3], v[2:3], v[10:11], v[18:19] +; GFX10-CONTRACT-NEXT: v_fma_f64 v[4:5], v[4:5], v[12:13], v[20:21] +; GFX10-CONTRACT-NEXT: v_fma_f64 v[6:7], v[6:7], v[14:15], v[22:23] +; GFX10-CONTRACT-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-DENORM-LABEL: test_f64_add_mul_rhs: +; GFX10-DENORM: ; %bb.0: ; %.entry +; GFX10-DENORM-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-DENORM-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX10-DENORM-NEXT: s_clause 0x7 +; GFX10-DENORM-NEXT: buffer_load_dword v32, off, s[0:3], s32 +; GFX10-DENORM-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:4 +; GFX10-DENORM-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:8 +; GFX10-DENORM-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:12 +; GFX10-DENORM-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:16 +; GFX10-DENORM-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:20 +; GFX10-DENORM-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:24 +; GFX10-DENORM-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:28 +; GFX10-DENORM-NEXT: s_waitcnt vmcnt(6) +; GFX10-DENORM-NEXT: v_fma_f64 v[16:17], v[16:17], v[24:25], v[32:33] +; GFX10-DENORM-NEXT: s_waitcnt vmcnt(4) +; GFX10-DENORM-NEXT: v_fma_f64 v[18:19], v[18:19], v[26:27], v[34:35] +; GFX10-DENORM-NEXT: s_waitcnt vmcnt(2) +; GFX10-DENORM-NEXT: v_fma_f64 v[20:21], v[20:21], v[28:29], v[36:37] +; GFX10-DENORM-NEXT: s_waitcnt vmcnt(0) +; GFX10-DENORM-NEXT: v_fma_f64 v[22:23], v[22:23], v[30:31], v[38:39] +; GFX10-DENORM-NEXT: v_fma_f64 v[0:1], v[0:1], v[8:9], v[16:17] +; GFX10-DENORM-NEXT: v_fma_f64 v[2:3], v[2:3], v[10:11], v[18:19] +; GFX10-DENORM-NEXT: v_fma_f64 v[4:5], v[4:5], v[12:13], v[20:21] +; GFX10-DENORM-NEXT: v_fma_f64 v[6:7], v[6:7], v[14:15], v[22:23] +; GFX10-DENORM-NEXT: s_setpc_b64 s[30:31] +.entry: + %x = fmul fast <4 x double> %c, %d + %y = call fast <4 x double> @llvm.fmuladd.v4f64(<4 x double> %a, <4 x double> %b, <4 x double> %x) + %z = fadd fast <4 x double> %e, %y + ret <4 x double> %z +} + +declare <4 x double> @llvm.fmuladd.v4f64(<4 x double>, <4 x double>, <4 x double>) #0 +declare <4 x float> @llvm.fmuladd.v4f32(<4 x float>, <4 x float>, <4 x float>) #0 +declare <4 x half> @llvm.fmuladd.v4f16(<4 x half>, <4 x half>, <4 x half>) #0 +declare double @llvm.fmuladd.f64(double, double, double) #0 +declare float @llvm.fmuladd.f32(float, float, float) #0 +declare half @llvm.fmuladd.f16(half, half, half) #0 +attributes #0 = { nounwind readnone }