This is an archive of the discontinued LLVM Phabricator instance.

[AIX] Allow safe for 32bit P9 VSX extract and insert pattern matches
ClosedPublic

Authored by ZarkoCA on Feb 25 2021, 2:36 PM.

Details

Summary

In https://reviews.llvm.org/D92789 PPC64 checks were added that disallowed most
VSX pattern matching. We enable some safe ones for 32bit in this patch.

Diff Detail

Event Timeline

ZarkoCA created this revision.Feb 25 2021, 2:36 PM
ZarkoCA requested review of this revision.Feb 25 2021, 2:36 PM
Herald added a project: Restricted Project. · View Herald TranscriptFeb 25 2021, 2:36 PM
ZarkoCA updated this revision to Diff 333973.Mar 29 2021, 1:34 PM
ZarkoCA edited the summary of this revision. (Show Details)
  • Rebased and added more 32bit safe Big Endian pattern matches
  • Added test cases
ZarkoCA updated this revision to Diff 337613.Apr 14 2021, 7:37 PM

Disable BSWAP custom lowering in 32bit mode on Power9 since there currently isn't a safe way to do it.
Rebase.

nemanjai added inline comments.Apr 21 2021, 6:28 AM
llvm/lib/Target/PowerPC/PPCInstrVSX.td
4241

This doesn't match the actual predicates for this block (i.e. doesn't match line 4095).

4244

Why do we start another block here that is exactly the same set of predicates as line 4095?

llvm/test/CodeGen/PowerPC/aix-insert-extract.ll
2

Please use the script to produce the CHECK directives.

ZarkoCA updated this revision to Diff 339236.Apr 21 2021, 7:49 AM
  • Fixed rebase and corrected predicates
  • Used script to autogenerate CHECK directives
ZarkoCA marked 3 inline comments as done.Apr 21 2021, 7:50 AM
ZarkoCA added inline comments.
llvm/lib/Target/PowerPC/PPCInstrVSX.td
4244

Sorry about this, it was caused by me trying incorrectly resolving a merge failure.

nemanjai accepted this revision.Apr 22 2021, 6:40 AM

The patch is functionally fine but please address the pattern ordering nit on the commit.

llvm/lib/Target/PowerPC/PPCInstrVSX.td
4189

The new ordering is weird. We used to have handling for i64/f64 followed by f128. Now it seems that we have i64/f64, then f64 then f128 then i64 then f128.

Please just leave these here, and put all the existing and new i64/f64 above.

This revision is now accepted and ready to land.Apr 22 2021, 6:40 AM
ZarkoCA updated this revision to Diff 339704.Apr 22 2021, 10:24 AM
ZarkoCA marked an inline comment as done.

Update to fix ordering.

ZarkoCA marked an inline comment as done.Apr 22 2021, 10:33 AM
llvm/test/CodeGen/PowerPC/aix-insert-extract.ll