diff --git a/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp b/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
--- a/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
@@ -567,7 +567,7 @@
     return false;
 
   // Only move the stack update on ELFv2 ABI and PPC64.
-  if (!Subtarget.isELFv2ABI() || !Subtarget.isPPC64())
+  if ((!Subtarget.isELFv2ABI() && !Subtarget.isAIXABI()) || !Subtarget.isPPC64())
     return false;
 
   // Check the frame size first and return false if it does not fit the
diff --git a/llvm/test/CodeGen/PowerPC/CSR-fit.ll b/llvm/test/CodeGen/PowerPC/CSR-fit.ll
--- a/llvm/test/CodeGen/PowerPC/CSR-fit.ll
+++ b/llvm/test/CodeGen/PowerPC/CSR-fit.ll
@@ -3,6 +3,10 @@
 ; RUN:   -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s | FileCheck --check-prefix=CHECK-PWR8 %s
 ; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown \
 ; RUN:   -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s | FileCheck --check-prefix=CHECK-PWR9 %s
+; RUN: llc -mcpu=pwr8 -mtriple=powerpc64-ibm-aix-xcoff -vec-extabi \
+; RUN:   -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s | FileCheck --check-prefix=CHECK-AIX-PWR8 %s
+; RUN: llc -mcpu=pwr9 -mtriple=powerpc64-ibm-aix-xcoff -vec-extabi \
+; RUN:   -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s | FileCheck --check-prefix=CHECK-AIX-PWR9 %s
 
 
 declare signext i32 @callee(i32 signext) local_unnamed_addr
@@ -55,6 +59,46 @@
 ; CHECK-PWR9-NEXT:    ld r14, -144(r1) # 8-byte Folded Reload
 ; CHECK-PWR9-NEXT:    mtlr r0
 ; CHECK-PWR9-NEXT:    blr
+;
+; CHECK-AIX-PWR8-LABEL: caller1:
+; CHECK-AIX-PWR8:       # %bb.0: # %entry
+; CHECK-AIX-PWR8-NEXT:    mflr 0
+; CHECK-AIX-PWR8-NEXT:    std 14, -144(1) # 8-byte Folded Spill
+; CHECK-AIX-PWR8-NEXT:    std 15, -136(1) # 8-byte Folded Spill
+; CHECK-AIX-PWR8-NEXT:    std 0, 16(1)
+; CHECK-AIX-PWR8-NEXT:    stdu 1, -256(1)
+; CHECK-AIX-PWR8-NEXT:    #APP
+; CHECK-AIX-PWR8-NEXT:    add 3, 3, 4
+; CHECK-AIX-PWR8-NEXT:    #NO_APP
+; CHECK-AIX-PWR8-NEXT:    extsw 3, 3
+; CHECK-AIX-PWR8-NEXT:    bl .callee[PR]
+; CHECK-AIX-PWR8-NEXT:    nop
+; CHECK-AIX-PWR8-NEXT:    addi 1, 1, 256
+; CHECK-AIX-PWR8-NEXT:    ld 0, 16(1)
+; CHECK-AIX-PWR8-NEXT:    ld 15, -136(1) # 8-byte Folded Reload
+; CHECK-AIX-PWR8-NEXT:    ld 14, -144(1) # 8-byte Folded Reload
+; CHECK-AIX-PWR8-NEXT:    mtlr 0
+; CHECK-AIX-PWR8-NEXT:    blr
+;
+; CHECK-AIX-PWR9-LABEL: caller1:
+; CHECK-AIX-PWR9:       # %bb.0: # %entry
+; CHECK-AIX-PWR9-NEXT:    mflr 0
+; CHECK-AIX-PWR9-NEXT:    std 14, -144(1) # 8-byte Folded Spill
+; CHECK-AIX-PWR9-NEXT:    std 15, -136(1) # 8-byte Folded Spill
+; CHECK-AIX-PWR9-NEXT:    std 0, 16(1)
+; CHECK-AIX-PWR9-NEXT:    stdu 1, -256(1)
+; CHECK-AIX-PWR9-NEXT:    #APP
+; CHECK-AIX-PWR9-NEXT:    add 3, 3, 4
+; CHECK-AIX-PWR9-NEXT:    #NO_APP
+; CHECK-AIX-PWR9-NEXT:    extsw 3, 3
+; CHECK-AIX-PWR9-NEXT:    bl .callee[PR]
+; CHECK-AIX-PWR9-NEXT:    nop
+; CHECK-AIX-PWR9-NEXT:    addi 1, 1, 256
+; CHECK-AIX-PWR9-NEXT:    ld 0, 16(1)
+; CHECK-AIX-PWR9-NEXT:    ld 15, -136(1) # 8-byte Folded Reload
+; CHECK-AIX-PWR9-NEXT:    ld 14, -144(1) # 8-byte Folded Reload
+; CHECK-AIX-PWR9-NEXT:    mtlr 0
+; CHECK-AIX-PWR9-NEXT:    blr
 entry:
   %0 = tail call i32 asm "add $0, $1, $2", "=r,r,r,~{r14},~{r15}"(i32 %a, i32 %b)
   %call = tail call signext i32 @callee(i32 signext %0)
@@ -109,6 +153,46 @@
 ; CHECK-PWR9-NEXT:    lfd f14, -144(r1) # 8-byte Folded Reload
 ; CHECK-PWR9-NEXT:    mtlr r0
 ; CHECK-PWR9-NEXT:    blr
+;
+; CHECK-AIX-PWR8-LABEL: caller2:
+; CHECK-AIX-PWR8:       # %bb.0: # %entry
+; CHECK-AIX-PWR8-NEXT:    mflr 0
+; CHECK-AIX-PWR8-NEXT:    stfd 14, -144(1) # 8-byte Folded Spill
+; CHECK-AIX-PWR8-NEXT:    stfd 15, -136(1) # 8-byte Folded Spill
+; CHECK-AIX-PWR8-NEXT:    std 0, 16(1)
+; CHECK-AIX-PWR8-NEXT:    stdu 1, -256(1)
+; CHECK-AIX-PWR8-NEXT:    #APP
+; CHECK-AIX-PWR8-NEXT:    add 3, 3, 4
+; CHECK-AIX-PWR8-NEXT:    #NO_APP
+; CHECK-AIX-PWR8-NEXT:    extsw 3, 3
+; CHECK-AIX-PWR8-NEXT:    bl .callee[PR]
+; CHECK-AIX-PWR8-NEXT:    nop
+; CHECK-AIX-PWR8-NEXT:    addi 1, 1, 256
+; CHECK-AIX-PWR8-NEXT:    ld 0, 16(1)
+; CHECK-AIX-PWR8-NEXT:    lfd 15, -136(1) # 8-byte Folded Reload
+; CHECK-AIX-PWR8-NEXT:    lfd 14, -144(1) # 8-byte Folded Reload
+; CHECK-AIX-PWR8-NEXT:    mtlr 0
+; CHECK-AIX-PWR8-NEXT:    blr
+;
+; CHECK-AIX-PWR9-LABEL: caller2:
+; CHECK-AIX-PWR9:       # %bb.0: # %entry
+; CHECK-AIX-PWR9-NEXT:    mflr 0
+; CHECK-AIX-PWR9-NEXT:    stfd 14, -144(1) # 8-byte Folded Spill
+; CHECK-AIX-PWR9-NEXT:    stfd 15, -136(1) # 8-byte Folded Spill
+; CHECK-AIX-PWR9-NEXT:    std 0, 16(1)
+; CHECK-AIX-PWR9-NEXT:    stdu 1, -256(1)
+; CHECK-AIX-PWR9-NEXT:    #APP
+; CHECK-AIX-PWR9-NEXT:    add 3, 3, 4
+; CHECK-AIX-PWR9-NEXT:    #NO_APP
+; CHECK-AIX-PWR9-NEXT:    extsw 3, 3
+; CHECK-AIX-PWR9-NEXT:    bl .callee[PR]
+; CHECK-AIX-PWR9-NEXT:    nop
+; CHECK-AIX-PWR9-NEXT:    addi 1, 1, 256
+; CHECK-AIX-PWR9-NEXT:    ld 0, 16(1)
+; CHECK-AIX-PWR9-NEXT:    lfd 15, -136(1) # 8-byte Folded Reload
+; CHECK-AIX-PWR9-NEXT:    lfd 14, -144(1) # 8-byte Folded Reload
+; CHECK-AIX-PWR9-NEXT:    mtlr 0
+; CHECK-AIX-PWR9-NEXT:    blr
 entry:
   %0 = tail call i32 asm "add $0, $1, $2", "=r,r,r,~{f14},~{f15}"(i32 %a, i32 %b)
   %call = tail call signext i32 @callee(i32 signext %0)
@@ -167,6 +251,50 @@
 ; CHECK-PWR9-NEXT:    ld r0, 16(r1)
 ; CHECK-PWR9-NEXT:    mtlr r0
 ; CHECK-PWR9-NEXT:    blr
+;
+; CHECK-AIX-PWR8-LABEL: caller3:
+; CHECK-AIX-PWR8:       # %bb.0: # %entry
+; CHECK-AIX-PWR8-NEXT:    mflr 0
+; CHECK-AIX-PWR8-NEXT:    std 0, 16(1)
+; CHECK-AIX-PWR8-NEXT:    stdu 1, -320(1)
+; CHECK-AIX-PWR8-NEXT:    li 5, 128
+; CHECK-AIX-PWR8-NEXT:    stxvd2x 20, 1, 5 # 16-byte Folded Spill
+; CHECK-AIX-PWR8-NEXT:    li 5, 144
+; CHECK-AIX-PWR8-NEXT:    stxvd2x 21, 1, 5 # 16-byte Folded Spill
+; CHECK-AIX-PWR8-NEXT:    #APP
+; CHECK-AIX-PWR8-NEXT:    add 3, 3, 4
+; CHECK-AIX-PWR8-NEXT:    #NO_APP
+; CHECK-AIX-PWR8-NEXT:    extsw 3, 3
+; CHECK-AIX-PWR8-NEXT:    bl .callee[PR]
+; CHECK-AIX-PWR8-NEXT:    nop
+; CHECK-AIX-PWR8-NEXT:    li 4, 144
+; CHECK-AIX-PWR8-NEXT:    lxvd2x 21, 1, 4 # 16-byte Folded Reload
+; CHECK-AIX-PWR8-NEXT:    li 4, 128
+; CHECK-AIX-PWR8-NEXT:    lxvd2x 20, 1, 4 # 16-byte Folded Reload
+; CHECK-AIX-PWR8-NEXT:    addi 1, 1, 320
+; CHECK-AIX-PWR8-NEXT:    ld 0, 16(1)
+; CHECK-AIX-PWR8-NEXT:    mtlr 0
+; CHECK-AIX-PWR8-NEXT:    blr
+;
+; CHECK-AIX-PWR9-LABEL: caller3:
+; CHECK-AIX-PWR9:       # %bb.0: # %entry
+; CHECK-AIX-PWR9-NEXT:    mflr 0
+; CHECK-AIX-PWR9-NEXT:    std 0, 16(1)
+; CHECK-AIX-PWR9-NEXT:    stdu 1, -304(1)
+; CHECK-AIX-PWR9-NEXT:    stxv 20, 112(1) # 16-byte Folded Spill
+; CHECK-AIX-PWR9-NEXT:    stxv 21, 128(1) # 16-byte Folded Spill
+; CHECK-AIX-PWR9-NEXT:    #APP
+; CHECK-AIX-PWR9-NEXT:    add 3, 3, 4
+; CHECK-AIX-PWR9-NEXT:    #NO_APP
+; CHECK-AIX-PWR9-NEXT:    extsw 3, 3
+; CHECK-AIX-PWR9-NEXT:    bl .callee[PR]
+; CHECK-AIX-PWR9-NEXT:    nop
+; CHECK-AIX-PWR9-NEXT:    lxv 21, 128(1) # 16-byte Folded Reload
+; CHECK-AIX-PWR9-NEXT:    lxv 20, 112(1) # 16-byte Folded Reload
+; CHECK-AIX-PWR9-NEXT:    addi 1, 1, 304
+; CHECK-AIX-PWR9-NEXT:    ld 0, 16(1)
+; CHECK-AIX-PWR9-NEXT:    mtlr 0
+; CHECK-AIX-PWR9-NEXT:    blr
 entry:
   %0 = tail call i32 asm "add $0, $1, $2", "=r,r,r,~{v20},~{v21}"(i32 %a, i32 %b)
   %call = tail call signext i32 @callee(i32 signext %0)
@@ -225,6 +353,50 @@
 ; CHECK-PWR9-NEXT:    ld r0, 16(r1)
 ; CHECK-PWR9-NEXT:    mtlr r0
 ; CHECK-PWR9-NEXT:    blr
+;
+; CHECK-AIX-PWR8-LABEL: caller4:
+; CHECK-AIX-PWR8:       # %bb.0: # %entry
+; CHECK-AIX-PWR8-NEXT:    mflr 0
+; CHECK-AIX-PWR8-NEXT:    std 0, 16(1)
+; CHECK-AIX-PWR8-NEXT:    stdu 1, -320(1)
+; CHECK-AIX-PWR8-NEXT:    li 5, 128
+; CHECK-AIX-PWR8-NEXT:    stxvd2x 20, 1, 5 # 16-byte Folded Spill
+; CHECK-AIX-PWR8-NEXT:    li 5, 144
+; CHECK-AIX-PWR8-NEXT:    stxvd2x 21, 1, 5 # 16-byte Folded Spill
+; CHECK-AIX-PWR8-NEXT:    #APP
+; CHECK-AIX-PWR8-NEXT:    add 3, 3, 4
+; CHECK-AIX-PWR8-NEXT:    #NO_APP
+; CHECK-AIX-PWR8-NEXT:    extsw 3, 3
+; CHECK-AIX-PWR8-NEXT:    bl .callee[PR]
+; CHECK-AIX-PWR8-NEXT:    nop
+; CHECK-AIX-PWR8-NEXT:    li 4, 144
+; CHECK-AIX-PWR8-NEXT:    lxvd2x 21, 1, 4 # 16-byte Folded Reload
+; CHECK-AIX-PWR8-NEXT:    li 4, 128
+; CHECK-AIX-PWR8-NEXT:    lxvd2x 20, 1, 4 # 16-byte Folded Reload
+; CHECK-AIX-PWR8-NEXT:    addi 1, 1, 320
+; CHECK-AIX-PWR8-NEXT:    ld 0, 16(1)
+; CHECK-AIX-PWR8-NEXT:    mtlr 0
+; CHECK-AIX-PWR8-NEXT:    blr
+;
+; CHECK-AIX-PWR9-LABEL: caller4:
+; CHECK-AIX-PWR9:       # %bb.0: # %entry
+; CHECK-AIX-PWR9-NEXT:    mflr 0
+; CHECK-AIX-PWR9-NEXT:    std 0, 16(1)
+; CHECK-AIX-PWR9-NEXT:    stdu 1, -304(1)
+; CHECK-AIX-PWR9-NEXT:    stxv 20, 112(1) # 16-byte Folded Spill
+; CHECK-AIX-PWR9-NEXT:    stxv 21, 128(1) # 16-byte Folded Spill
+; CHECK-AIX-PWR9-NEXT:    #APP
+; CHECK-AIX-PWR9-NEXT:    add 3, 3, 4
+; CHECK-AIX-PWR9-NEXT:    #NO_APP
+; CHECK-AIX-PWR9-NEXT:    extsw 3, 3
+; CHECK-AIX-PWR9-NEXT:    bl .callee[PR]
+; CHECK-AIX-PWR9-NEXT:    nop
+; CHECK-AIX-PWR9-NEXT:    lxv 21, 128(1) # 16-byte Folded Reload
+; CHECK-AIX-PWR9-NEXT:    lxv 20, 112(1) # 16-byte Folded Reload
+; CHECK-AIX-PWR9-NEXT:    addi 1, 1, 304
+; CHECK-AIX-PWR9-NEXT:    ld 0, 16(1)
+; CHECK-AIX-PWR9-NEXT:    mtlr 0
+; CHECK-AIX-PWR9-NEXT:    blr
 entry:
   %0 = tail call i32 asm "add $0, $1, $2", "=r,r,r,~{vs52},~{vs53}"(i32 %a, i32 %b)
   %call = tail call signext i32 @callee(i32 signext %0)
@@ -295,6 +467,58 @@
 ; CHECK-PWR9-NEXT:    ld r0, 16(r1)
 ; CHECK-PWR9-NEXT:    mtlr r0
 ; CHECK-PWR9-NEXT:    blr
+;
+; CHECK-AIX-PWR8-LABEL: caller_mixed:
+; CHECK-AIX-PWR8:       # %bb.0: # %entry
+; CHECK-AIX-PWR8-NEXT:    mflr 0
+; CHECK-AIX-PWR8-NEXT:    std 0, 16(1)
+; CHECK-AIX-PWR8-NEXT:    stdu 1, -608(1)
+; CHECK-AIX-PWR8-NEXT:    li 5, 128
+; CHECK-AIX-PWR8-NEXT:    std 14, 320(1) # 8-byte Folded Spill
+; CHECK-AIX-PWR8-NEXT:    stfd 14, 464(1) # 8-byte Folded Spill
+; CHECK-AIX-PWR8-NEXT:    stxvd2x 20, 1, 5 # 16-byte Folded Spill
+; CHECK-AIX-PWR8-NEXT:    li 5, 144
+; CHECK-AIX-PWR8-NEXT:    stxvd2x 21, 1, 5 # 16-byte Folded Spill
+; CHECK-AIX-PWR8-NEXT:    #APP
+; CHECK-AIX-PWR8-NEXT:    add 3, 3, 4
+; CHECK-AIX-PWR8-NEXT:    #NO_APP
+; CHECK-AIX-PWR8-NEXT:    extsw 3, 3
+; CHECK-AIX-PWR8-NEXT:    bl .callee[PR]
+; CHECK-AIX-PWR8-NEXT:    nop
+; CHECK-AIX-PWR8-NEXT:    li 4, 144
+; CHECK-AIX-PWR8-NEXT:    lfd 14, 464(1) # 8-byte Folded Reload
+; CHECK-AIX-PWR8-NEXT:    ld 14, 320(1) # 8-byte Folded Reload
+; CHECK-AIX-PWR8-NEXT:    lxvd2x 21, 1, 4 # 16-byte Folded Reload
+; CHECK-AIX-PWR8-NEXT:    li 4, 128
+; CHECK-AIX-PWR8-NEXT:    lxvd2x 20, 1, 4 # 16-byte Folded Reload
+; CHECK-AIX-PWR8-NEXT:    addi 1, 1, 608
+; CHECK-AIX-PWR8-NEXT:    ld 0, 16(1)
+; CHECK-AIX-PWR8-NEXT:    mtlr 0
+; CHECK-AIX-PWR8-NEXT:    blr
+;
+; CHECK-AIX-PWR9-LABEL: caller_mixed:
+; CHECK-AIX-PWR9:       # %bb.0: # %entry
+; CHECK-AIX-PWR9-NEXT:    mflr 0
+; CHECK-AIX-PWR9-NEXT:    std 0, 16(1)
+; CHECK-AIX-PWR9-NEXT:    stdu 1, -592(1)
+; CHECK-AIX-PWR9-NEXT:    std 14, 304(1) # 8-byte Folded Spill
+; CHECK-AIX-PWR9-NEXT:    stfd 14, 448(1) # 8-byte Folded Spill
+; CHECK-AIX-PWR9-NEXT:    stxv 20, 112(1) # 16-byte Folded Spill
+; CHECK-AIX-PWR9-NEXT:    stxv 21, 128(1) # 16-byte Folded Spill
+; CHECK-AIX-PWR9-NEXT:    #APP
+; CHECK-AIX-PWR9-NEXT:    add 3, 3, 4
+; CHECK-AIX-PWR9-NEXT:    #NO_APP
+; CHECK-AIX-PWR9-NEXT:    extsw 3, 3
+; CHECK-AIX-PWR9-NEXT:    bl .callee[PR]
+; CHECK-AIX-PWR9-NEXT:    nop
+; CHECK-AIX-PWR9-NEXT:    lxv 21, 128(1) # 16-byte Folded Reload
+; CHECK-AIX-PWR9-NEXT:    lxv 20, 112(1) # 16-byte Folded Reload
+; CHECK-AIX-PWR9-NEXT:    lfd 14, 448(1) # 8-byte Folded Reload
+; CHECK-AIX-PWR9-NEXT:    ld 14, 304(1) # 8-byte Folded Reload
+; CHECK-AIX-PWR9-NEXT:    addi 1, 1, 592
+; CHECK-AIX-PWR9-NEXT:    ld 0, 16(1)
+; CHECK-AIX-PWR9-NEXT:    mtlr 0
+; CHECK-AIX-PWR9-NEXT:    blr
 entry:
   %0 = tail call i32 asm "add $0, $1, $2", "=r,r,r,~{r14},~{f14},~{v20},~{vs53}"(i32 %a, i32 %b)
   %call = tail call signext i32 @callee(i32 signext %0)
diff --git a/llvm/test/CodeGen/PowerPC/not-fixed-frame-object.ll b/llvm/test/CodeGen/PowerPC/not-fixed-frame-object.ll
--- a/llvm/test/CodeGen/PowerPC/not-fixed-frame-object.ll
+++ b/llvm/test/CodeGen/PowerPC/not-fixed-frame-object.ll
@@ -1,6 +1,10 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown \
 ; RUN:   -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s | FileCheck %s
+; RUN: llc -mcpu=pwr9 -mtriple=powerpc64-ibm-aix-xcoff -vec-extabi \
+; RUN:   -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s | FileCheck \
+; RUN:   --check-prefix=CHECK-AIX %s
+
 
 define dso_local signext i32 @caller(i32 signext %a, i32 signext %b, i32 signext %c) local_unnamed_addr {
 ; CHECK-LABEL: caller:
@@ -81,6 +85,65 @@
 ; CHECK-NEXT:    ld r15, -136(r1) # 8-byte Folded Reload
 ; CHECK-NEXT:    ld r14, -144(r1) # 8-byte Folded Reload
 ; CHECK-NEXT:    blr
+;
+; CHECK-AIX-LABEL: caller:
+; CHECK-AIX:       # %bb.0: # %entry
+; CHECK-AIX-NEXT:    mflr 0
+; CHECK-AIX-NEXT:    std 14, -144(1) # 8-byte Folded Spill
+; CHECK-AIX-NEXT:    std 15, -136(1) # 8-byte Folded Spill
+; CHECK-AIX-NEXT:    std 16, -128(1) # 8-byte Folded Spill
+; CHECK-AIX-NEXT:    std 17, -120(1) # 8-byte Folded Spill
+; CHECK-AIX-NEXT:    std 18, -112(1) # 8-byte Folded Spill
+; CHECK-AIX-NEXT:    std 19, -104(1) # 8-byte Folded Spill
+; CHECK-AIX-NEXT:    std 20, -96(1) # 8-byte Folded Spill
+; CHECK-AIX-NEXT:    std 21, -88(1) # 8-byte Folded Spill
+; CHECK-AIX-NEXT:    std 22, -80(1) # 8-byte Folded Spill
+; CHECK-AIX-NEXT:    std 23, -72(1) # 8-byte Folded Spill
+; CHECK-AIX-NEXT:    std 24, -64(1) # 8-byte Folded Spill
+; CHECK-AIX-NEXT:    std 25, -56(1) # 8-byte Folded Spill
+; CHECK-AIX-NEXT:    std 26, -48(1) # 8-byte Folded Spill
+; CHECK-AIX-NEXT:    std 27, -40(1) # 8-byte Folded Spill
+; CHECK-AIX-NEXT:    std 28, -32(1) # 8-byte Folded Spill
+; CHECK-AIX-NEXT:    std 29, -24(1) # 8-byte Folded Spill
+; CHECK-AIX-NEXT:    std 30, -16(1) # 8-byte Folded Spill
+; CHECK-AIX-NEXT:    std 31, -8(1) # 8-byte Folded Spill
+; CHECK-AIX-NEXT:    std 0, 16(1)
+; CHECK-AIX-NEXT:    stdu 1, -272(1)
+; CHECK-AIX-NEXT:    std 5, 112(1) # 8-byte Folded Spill
+; CHECK-AIX-NEXT:    std 3, 120(1) # 8-byte Folded Spill
+; CHECK-AIX-NEXT:    mr 0, 4
+; CHECK-AIX-NEXT:    ld 3, 120(1) # 8-byte Folded Reload
+; CHECK-AIX-NEXT:    #APP
+; CHECK-AIX-NEXT:    add 3, 3, 0
+; CHECK-AIX-NEXT:    #NO_APP
+; CHECK-AIX-NEXT:    ld 4, 120(1) # 8-byte Folded Reload
+; CHECK-AIX-NEXT:    ld 6, 112(1) # 8-byte Folded Reload
+; CHECK-AIX-NEXT:    extsw 3, 3
+; CHECK-AIX-NEXT:    mr 5, 0
+; CHECK-AIX-NEXT:    bl .callee[PR]
+; CHECK-AIX-NEXT:    nop
+; CHECK-AIX-NEXT:    addi 1, 1, 272
+; CHECK-AIX-NEXT:    ld 0, 16(1)
+; CHECK-AIX-NEXT:    ld 31, -8(1) # 8-byte Folded Reload
+; CHECK-AIX-NEXT:    ld 30, -16(1) # 8-byte Folded Reload
+; CHECK-AIX-NEXT:    ld 29, -24(1) # 8-byte Folded Reload
+; CHECK-AIX-NEXT:    mtlr 0
+; CHECK-AIX-NEXT:    ld 28, -32(1) # 8-byte Folded Reload
+; CHECK-AIX-NEXT:    ld 27, -40(1) # 8-byte Folded Reload
+; CHECK-AIX-NEXT:    ld 26, -48(1) # 8-byte Folded Reload
+; CHECK-AIX-NEXT:    ld 25, -56(1) # 8-byte Folded Reload
+; CHECK-AIX-NEXT:    ld 24, -64(1) # 8-byte Folded Reload
+; CHECK-AIX-NEXT:    ld 23, -72(1) # 8-byte Folded Reload
+; CHECK-AIX-NEXT:    ld 22, -80(1) # 8-byte Folded Reload
+; CHECK-AIX-NEXT:    ld 21, -88(1) # 8-byte Folded Reload
+; CHECK-AIX-NEXT:    ld 20, -96(1) # 8-byte Folded Reload
+; CHECK-AIX-NEXT:    ld 19, -104(1) # 8-byte Folded Reload
+; CHECK-AIX-NEXT:    ld 18, -112(1) # 8-byte Folded Reload
+; CHECK-AIX-NEXT:    ld 17, -120(1) # 8-byte Folded Reload
+; CHECK-AIX-NEXT:    ld 16, -128(1) # 8-byte Folded Reload
+; CHECK-AIX-NEXT:    ld 15, -136(1) # 8-byte Folded Reload
+; CHECK-AIX-NEXT:    ld 14, -144(1) # 8-byte Folded Reload
+; CHECK-AIX-NEXT:    blr
 entry:
   %0 = tail call i32 asm "add $0, $1, $2", "=r,r,r,~{r14},~{r15},~{r16},~{r17},~{r18},~{r19},~{r20},~{r21},~{r22},~{r23},~{r24},~{r25},~{r26},~{r27},~{r28},~{r29},~{r30},~{r31},~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13}"(i32 %a, i32 %b)
   %call = tail call signext i32 @callee(i32 signext %0, i32 signext %a, i32 signext %b, i32 signext %c)
diff --git a/llvm/test/CodeGen/PowerPC/ppc-redzone-alignment-bug.ll b/llvm/test/CodeGen/PowerPC/ppc-redzone-alignment-bug.ll
--- a/llvm/test/CodeGen/PowerPC/ppc-redzone-alignment-bug.ll
+++ b/llvm/test/CodeGen/PowerPC/ppc-redzone-alignment-bug.ll
@@ -1,6 +1,7 @@
 ; Note the formula for negative number alignment calculation should be y = x & ~(n-1) rather than y = (x + (n-1)) & ~(n-1).
 ; after patch https://reviews.llvm.org/D34337, we could save 16 bytes in the best case.
 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 < %s | FileCheck %s -check-prefix=CHECK-BE
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-ibm-aix-xcoff -vec-extabi -mcpu=pwr8 < %s | FileCheck %s -check-prefix=CHECK-BE
 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 < %s | FileCheck %s -check-prefix=CHECK-LE
 
 define signext i32 @bar(i32 signext %ii) {
diff --git a/llvm/test/CodeGen/PowerPC/vsxD-Form-spills.ll b/llvm/test/CodeGen/PowerPC/vsxD-Form-spills.ll
--- a/llvm/test/CodeGen/PowerPC/vsxD-Form-spills.ll
+++ b/llvm/test/CodeGen/PowerPC/vsxD-Form-spills.ll
@@ -1,5 +1,7 @@
 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 < %s | FileCheck %s
 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr9 < %s | FileCheck -check-prefix=CHECK-PWR9 %s
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-ibm-aix-xcoff -vec-extabi -mcpu=pwr8 < %s | FileCheck -check-prefix=CHECK-AIX %s
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-ibm-aix-xcoff -vec-extabi -mcpu=pwr9 < %s | FileCheck -check-prefix=CHECK-AIX-PWR9 %s
 
 define <4 x i32> @testSpill(<4 x i32> %a, <4 x i32> %b) {
 
@@ -37,6 +39,40 @@
 ; CHECK-PWR9:    mtlr 0
 ; CHECK-PWR9-NEXT:    blr
 
+; CHECK-AIX-LABEL: testSpill:
+; CHECK-AIX-DAG:    li [[REG48:[0-9]+]], 128
+; CHECK-AIX-DAG:    li [[REG64:[0-9]+]], 144
+; CHECK-AIX-DAG:    li [[REG80:[0-9]+]], 160
+; CHECK-AIX-DAG:    li [[REG96:[0-9]+]], 176
+; CHECK-AIX-DAG:    stxvd2x 60, 1, [[REG48]] # 16-byte Folded Spill
+; CHECK-AIX-DAG:    stxvd2x 61, 1, [[REG64]] # 16-byte Folded Spill
+; CHECK-AIX-DAG:    stxvd2x 62, 1, [[REG80]] # 16-byte Folded Spill
+; CHECK-AIX-DAG:    stxvd2x 63, 1, [[REG96]] # 16-byte Folded Spill
+; CHECK-AIX:        L..BB0_3
+; CHECK-AIX-DAG:    li [[REG96_LD:[0-9]+]], 176
+; CHECK-AIX-DAG:    li [[REG80_LD:[0-9]+]], 160
+; CHECK-AIX-DAG:    li [[REG64_LD:[0-9]+]], 144
+; CHECK-AIX-DAG:    li [[REG48_LD:[0-9]+]], 128
+; CHECK-AIX-DAG:    lxvd2x 63, 1, [[REG96_LD]] # 16-byte Folded Reload
+; CHECK-AIX-DAG:    lxvd2x 62, 1, [[REG80_LD]] # 16-byte Folded Reload
+; CHECK-AIX-DAG:    lxvd2x 61, 1, [[REG64_LD]] # 16-byte Folded Reload
+; CHECK-AIX-DAG:    lxvd2x 60, 1, [[REG48_LD]] # 16-byte Folded Reload
+; CHECK-AIX:    mtlr 0
+; CHECK-AIX-NEXT:    blr
+
+; CHECK-AIX-PWR9-LABEL: testSpill:
+; CHECK-AIX-PWR9-DAG:    stxv 62, 144(1) # 16-byte Folded Spill
+; CHECK-AIX-PWR9-DAG:    stxv 63, 160(1) # 16-byte Folded Spill
+; CHECK-AIX-PWR9-DAG:    stxv 60, 112(1) # 16-byte Folded Spill
+; CHECK-AIX-PWR9-DAG:    stxv 61, 128(1) # 16-byte Folded Spill
+; CHECK-AIX-PWR9-NOT:    NOT
+; CHECK-AIX-PWR9-DAG:    lxv 63, 160(1) # 16-byte Folded Reload
+; CHECK-AIX-PWR9-DAG:    lxv 62, 144(1) # 16-byte Folded Reload
+; CHECK-AIX-PWR9-DAG:    lxv 61, 128(1) # 16-byte Folded Reload
+; CHECK-AIX-PWR9-DAG:    lxv 60, 112(1) # 16-byte Folded Reload
+; CHECK-AIX-PWR9:    mtlr 0
+; CHECK-AIX-PWR9-NEXT:    blr
+
 entry:
   %0 = tail call i32 @llvm.ppc.altivec.vcmpgtsw.p(i32 2, <4 x i32> %a, <4 x i32> %b)
   %tobool = icmp eq i32 %0, 0