Index: lib/CodeGen/MachineSink.cpp
===================================================================
--- lib/CodeGen/MachineSink.cpp
+++ lib/CodeGen/MachineSink.cpp
@@ -19,6 +19,7 @@
 #include "llvm/CodeGen/Passes.h"
 #include "llvm/ADT/SetVector.h"
 #include "llvm/ADT/SmallSet.h"
+#include "llvm/ADT/SparseBitVector.h"
 #include "llvm/ADT/Statistic.h"
 #include "llvm/Analysis/AliasAnalysis.h"
 #include "llvm/CodeGen/MachineBlockFrequencyInfo.h"
@@ -70,6 +71,8 @@
     // will be split.
     SetVector<std::pair<MachineBasicBlock*,MachineBasicBlock*> > ToSplit;
 
+    SparseBitVector<> RegsToClearKillFlags;
+
   public:
     static char ID; // Pass identification
     MachineSinking() : MachineFunctionPass(ID) {
@@ -167,9 +170,9 @@
   MRI->replaceRegWith(DstReg, SrcReg);
   MI->eraseFromParent();
 
-  // Conservatively, clear any kill flags, since it's possible that they are no
-  // longer correct.
-  MRI->clearKillFlags(SrcReg);
+  // Conservatively, record registers to clear any kill flags later,
+  // since it's possible that they are no longer correct.
+  RegsToClearKillFlags.set(SrcReg);
 
   ++NumCoalesces;
   return true;
@@ -287,6 +290,22 @@
     if (!MadeChange) break;
     EverMadeChange = true;
   }
+
+  // Conservatively, clear any kill flags for recorded registers,
+  unsigned NumVirtRegs = MRI->getNumVirtRegs();
+  unsigned LastVirtReg = TargetRegisterInfo::index2VirtReg(NumVirtRegs - 1);
+  if (EverMadeChange) {
+    for (SparseBitVector<>::iterator I = RegsToClearKillFlags.begin(),
+         E = RegsToClearKillFlags.end();
+         I != E;
+         ++I) {
+      if (TargetRegisterInfo::isVirtualRegister(*I) && *I > LastVirtReg)
+         continue;
+
+      MRI->clearKillFlags(*I);
+    }
+  }
+
   return EverMadeChange;
 }
 
@@ -761,7 +780,7 @@
   // used registers.
   for (MachineOperand &MO : MI->operands()) {
     if (MO.isReg() && MO.isUse())
-      MRI->clearKillFlags(MO.getReg());
+      RegsToClearKillFlags.set(MO.getReg());
   }
 
   return true;