Index: llvm/lib/CodeGen/MachineVerifier.cpp =================================================================== --- llvm/lib/CodeGen/MachineVerifier.cpp +++ llvm/lib/CodeGen/MachineVerifier.cpp @@ -1728,6 +1728,11 @@ } } +static bool tiedOpsRewritten(const MachineFunction *MF) { + auto Prop = MachineFunctionProperties::Property::TiedOpsRewritten; + return MF->getProperties().hasProperty(Prop); +} + void MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum) { const MachineInstr *MI = MO->getParent(); @@ -1829,8 +1834,7 @@ // TiedOpsRewritten property to verify two-address constraints, this // property will be set in twoaddressinstruction pass. unsigned DefIdx; - if (MF->getProperties().hasProperty( - MachineFunctionProperties::Property::TiedOpsRewritten) && + if (tiedOpsRewritten(MF) && MO->isUse() && MI->isRegTiedToDefOperand(MONum, &DefIdx) && Reg != MI->getOperand(DefIdx).getReg()) report("Two-address instruction operands must be identical", MO, MONum); @@ -2741,6 +2745,22 @@ hasDef = true; if (MOI->isEarlyClobber()) isEarlyClobber = true; + + if (tiedOpsRewritten(MF) && MOI->isTied() && Reg.isVirtual()) { + unsigned DefOpNum = std::distance(MI->operands_begin(), &*MOI); + unsigned UseOpNum = MI->findTiedOperandIdx(DefOpNum); + const MachineOperand &UseOp = MI->getOperand(UseOpNum); + // Both ends of a tied def must be the same interval. Exceptions: + // - use is undef, implicit or noreg (not a real read) + // - live interval has subranges (purely because this is complicated + // and we haven't implemented the precise check yet) + if (!UseOp.isUndef() && !UseOp.isImplicit() && UseOp.getReg() != 0 && + LaneMask.none() && !LR.liveAt(VNI->def.getBaseIndex())) { + report("tied def w/o use in same live range", MI); + report_context(LR, Reg, LaneMask); + report_context(*VNI); + } + } } if (!hasDef) {