diff --git a/llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp b/llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp --- a/llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp +++ b/llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp @@ -161,9 +161,18 @@ cl::desc("Narrow LSR search space by filtering non-optimal formulae" " with the same ScaledReg and Scale")); -static cl::opt EnableBackedgeIndexing( - "lsr-backedge-indexing", cl::Hidden, cl::init(true), - cl::desc("Enable the generation of cross iteration indexed memops")); +static cl::opt PreferredAddresingMode( + "lsr-preferred-addressing-mode", cl::Hidden, cl::init(TTI::AMK_None), + cl::desc("A flag that overrides the target's preferred addressing mode."), + cl::values(clEnumValN(TTI::AMK_None, + "none", + "Don't prefer any addressing mode"), + clEnumValN(TTI::AMK_PreIndexed, + "preindexed", + "Prefer pre-indexed addressing mode"), + clEnumValN(TTI::AMK_PostIndexed, + "postindexed", + "Prefer post-indexed addressing mode"))); static cl::opt ComplexityLimit( "lsr-complexity-limit", cl::Hidden, @@ -3810,9 +3819,7 @@ // means that a single pre-indexed access can be generated to become the new // base pointer for each iteration of the loop, resulting in no extra add/sub // instructions for pointer updating. - bool FavorPreIndexed = EnableBackedgeIndexing && - AMK == TTI::AMK_PreIndexed; - if (FavorPreIndexed && LU.Kind == LSRUse::Address) { + if (AMK == TTI::AMK_PreIndexed && LU.Kind == LSRUse::Address) { if (auto *GAR = dyn_cast(G)) { if (auto *StepRec = dyn_cast(GAR->getStepRecurrence(SE))) { @@ -5561,7 +5568,8 @@ const TargetTransformInfo &TTI, AssumptionCache &AC, TargetLibraryInfo &TLI, MemorySSAUpdater *MSSAU) : IU(IU), SE(SE), DT(DT), LI(LI), AC(AC), TLI(TLI), TTI(TTI), L(L), - MSSAU(MSSAU), AMK(TTI.getPreferredAddressingMode(L, &SE)) { + MSSAU(MSSAU), AMK(PreferredAddresingMode.getNumOccurrences() > 0 ? + PreferredAddresingMode : TTI.getPreferredAddressingMode(L, &SE)) { // If LoopSimplify form is not available, stay out of trouble. if (!L->isLoopSimplifyForm()) return; diff --git a/llvm/test/CodeGen/ARM/dsp-loop-indexing.ll b/llvm/test/CodeGen/ARM/dsp-loop-indexing.ll --- a/llvm/test/CodeGen/ARM/dsp-loop-indexing.ll +++ b/llvm/test/CodeGen/ARM/dsp-loop-indexing.ll @@ -1,8 +1,19 @@ -; RUN: llc -mtriple=thumbv7em -mattr=+fp-armv8 %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-DEFAULT -; RUN: llc -mtriple=thumbv8m.main -mattr=+fp-armv8,+dsp %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-DEFAULT -; RUN: llc -mtriple=thumbv8m.main -mattr=+fp-armv8,+dsp -lsr-backedge-indexing=false %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=DISABLED -; RUN: llc -mtriple=thumbv8 %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=DISABLED -; RUN: llc -mtriple=thumbv8m.main -mattr=+fp-armv8,+dsp -lsr-complexity-limit=2147483647 %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-COMPLEX +; RUN: llc -mtriple=thumbv7em -mattr=+fp-armv8 %s -o - | \ +; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-DEFAULT + +; RUN: llc -mtriple=thumbv8m.main -mattr=+fp-armv8,+dsp %s -o - | \ +; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-DEFAULT + +; -lsr-backedge-indexing=false + +; RUN: llc -mtriple=thumbv8m.main -mattr=+fp-armv8,+dsp -lsr-preferred-addressing-mode=postindexed %s -o - | \ +; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=DISABLED + +; RUN: llc -mtriple=thumbv8 %s -o - | \ +; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=DISABLED + +; RUN: llc -mtriple=thumbv8m.main -mattr=+fp-armv8,+dsp -lsr-complexity-limit=2147483647 %s -o - | \ +; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-COMPLEX ; CHECK-LABEL: test_qadd_2 ; CHECK: @ %loop diff --git a/llvm/test/CodeGen/ARM/loop-indexing.ll b/llvm/test/CodeGen/ARM/loop-indexing.ll --- a/llvm/test/CodeGen/ARM/loop-indexing.ll +++ b/llvm/test/CodeGen/ARM/loop-indexing.ll @@ -1,9 +1,23 @@ -; RUN: llc --mtriple=thumbv7em -mattr=+fp-armv8 -O3 %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-DEFAULT --check-prefix=CHECK-T2 -; RUN: llc -mtriple=thumbv8m.main -mattr=+fp-armv8,+dsp -O3 %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-DEFAULT --check-prefix=CHECK-T2 -; RUN: llc -mtriple=thumbv8m.main -mattr=+fp-armv8,+dsp -lsr-backedge-indexing=false %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=DISABLED +; RUN: llc --mtriple=thumbv7em -mattr=+fp-armv8 -O3 %s -o - | \ +; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-DEFAULT --check-prefix=CHECK-T2 + +; RUN: llc --mtriple=thumbv7em -mattr=+fp-armv8 -O3 -lsr-preferred-addressing-mode=none %s -o - | \ +; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=DISABLED + +; RUN: llc -mtriple=thumbv8m.main -mattr=+fp-armv8,+dsp -O3 %s -o - | \ +; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-DEFAULT --check-prefix=CHECK-T2 + +; RUN: llc -mtriple=thumbv8m.main -mattr=+fp-armv8,+dsp -lsr-preferred-addressing-mode=postindexed %s -o - | \ +; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=DISABLED + +; RUN: llc -mtriple=thumbv8m.main -mattr=+fp-armv8,+dsp -lsr-preferred-addressing-mode=preindexed %s -o - | \ +; RUN: FileCheck %s --check-prefixes=CHECK,CHECK-T2 + ; RUN: llc -mtriple=thumbv8m.base %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=DISABLED ; RUN: llc -mtriple=thumbv8 %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=DISABLED -; RUN: llc -mtriple=thumbv8m.main -mattr=+fp-armv8,+dsp -O3 -lsr-complexity-limit=2147483647 %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-COMPLEX --check-prefix=CHECK-T2 + +; RUN: llc -mtriple=thumbv8m.main -mattr=+fp-armv8,+dsp -O3 -lsr-complexity-limit=2147483647 %s -o - | \ +; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-COMPLEX --check-prefix=CHECK-T2 ; Tests to check that post increment addressing modes are used instead of ; updating base pointers with add instructions.