diff --git a/llvm/lib/Target/AMDGPU/SMInstructions.td b/llvm/lib/Target/AMDGPU/SMInstructions.td --- a/llvm/lib/Target/AMDGPU/SMInstructions.td +++ b/llvm/lib/Target/AMDGPU/SMInstructions.td @@ -62,6 +62,8 @@ let UseNamedOperandTable = ps.UseNamedOperandTable; let SMRD = ps.SMRD; + let TSFlags = ps.TSFlags; + bit is_buffer = ps.is_buffer; // encoding @@ -227,24 +229,29 @@ let ScalarStore = 1; let hasSideEffects = 1; let maybeAtomic = 1; + + let IsAtomicNoRet = !not(isRet); + let IsAtomicRet = isRet; } class SM_Pseudo_Atomic : + bit isRet, + string opNameWithSuffix = opName # !if(isImm, + !if(isRet, "_IMM_RTN", "_IMM"), + !if(isRet, "_SGPR_RTN", "_SGPR"))> : SM_Atomic_Pseudo { + isRet>, + AtomicNoRet { let offset_is_imm = isImm; - let PseudoInstr = opName # !if(isImm, - !if(isRet, "_IMM_RTN", "_IMM"), - !if(isRet, "_SGPR_RTN", "_SGPR")); + let PseudoInstr = opNameWithSuffix; let Constraints = !if(isRet, "$sdst = $sdata", ""); let DisableEncoding = !if(isRet, "$sdata", ""); @@ -589,7 +596,8 @@ //===----------------------------------------------------------------------===// class SMEM_Atomic_Real_vi op, SM_Atomic_Pseudo ps> - : SMEM_Real_vi { + : SMEM_Real_vi , + AtomicNoRet { bits<7> sdata; @@ -973,7 +981,8 @@ defm S_ATC_PROBE_BUFFER : SM_Real_Probe_gfx10 <0x27, "S_ATC_PROBE_BUFFER">; class SMEM_Atomic_Real_gfx10 op, SM_Atomic_Pseudo ps> - : SMEM_Real_gfx10 { + : SMEM_Real_gfx10 , + AtomicNoRet { bits<7> sdata; bit dlc;