diff --git a/clang/lib/Basic/Targets/RISCV.h b/clang/lib/Basic/Targets/RISCV.h --- a/clang/lib/Basic/Targets/RISCV.h +++ b/clang/lib/Basic/Targets/RISCV.h @@ -31,6 +31,7 @@ bool HasD = false; bool HasC = false; bool HasB = false; + bool HasP = false; bool HasV = false; bool HasZba = false; bool HasZbb = false; @@ -43,6 +44,9 @@ bool HasZbr = false; bool HasZbs = false; bool HasZbt = false; + bool HasZpn = false; + bool HasZpsfoperand = false; + bool HasZprvsfextra = false; bool HasZfh = false; bool HasZvamo = false; bool HasZvlsseg = false; diff --git a/clang/lib/Basic/Targets/RISCV.cpp b/clang/lib/Basic/Targets/RISCV.cpp --- a/clang/lib/Basic/Targets/RISCV.cpp +++ b/clang/lib/Basic/Targets/RISCV.cpp @@ -178,6 +178,9 @@ Builder.defineMacro("__riscv_bitmanip"); } + if (HasP) + Builder.defineMacro("__riscv_p", "93000"); + if (HasV) { Builder.defineMacro("__riscv_v", "10000"); Builder.defineMacro("__riscv_vector"); @@ -216,6 +219,15 @@ if (HasZbt) Builder.defineMacro("__riscv_zbt", "93000"); + if (HasZpn) + Builder.defineMacro("__riscv_zpn", "93000"); + + if (HasZpsfoperand) + Builder.defineMacro("__riscv_zpsfoperand", "93000"); + + if (HasZprvsfextra) + Builder.defineMacro("__riscv_zprvsfextra", "93000"); + if (HasZfh) Builder.defineMacro("__riscv_zfh", "1000"); @@ -263,6 +275,7 @@ .Case("d", HasD) .Case("c", HasC) .Case("experimental-b", HasB) + .Case("experimental-p", HasP) .Case("experimental-v", HasV) .Case("experimental-zba", HasZba) .Case("experimental-zbb", HasZbb) @@ -275,6 +288,9 @@ .Case("experimental-zbr", HasZbr) .Case("experimental-zbs", HasZbs) .Case("experimental-zbt", HasZbt) + .Case("experimental-zpn", HasZpn) + .Case("experimental-zpsfoperand", HasZpsfoperand) + .Case("experimental-zprvsfextra", HasZprvsfextra) .Case("experimental-zfh", HasZfh) .Case("experimental-zvamo", HasZvamo) .Case("experimental-zvlsseg", HasZvlsseg) @@ -297,6 +313,8 @@ HasC = true; else if (Feature == "+experimental-b") HasB = true; + else if (Feature == "+experimental-p") + HasP = true; else if (Feature == "+experimental-v") HasV = true; else if (Feature == "+experimental-zba") @@ -321,6 +339,12 @@ HasZbs = true; else if (Feature == "+experimental-zbt") HasZbt = true; + else if (Feature == "+experimental-zpn") + HasZpn = true; + else if (Feature == "+experimental-zpsfoperand") + HasZpsfoperand = true; + else if (Feature == "+experimental-zprvsfextra") + HasZprvsfextra = true; else if (Feature == "+experimental-zfh") HasZfh = true; else if (Feature == "+experimental-zvamo") diff --git a/clang/lib/Driver/ToolChains/Arch/RISCV.cpp b/clang/lib/Driver/ToolChains/Arch/RISCV.cpp --- a/clang/lib/Driver/ToolChains/Arch/RISCV.cpp +++ b/clang/lib/Driver/ToolChains/Arch/RISCV.cpp @@ -62,6 +62,9 @@ Ext == "zbe" || Ext == "zbf" || Ext == "zbm" || Ext == "zbp" || Ext == "zbr" || Ext == "zbs" || Ext == "zbt" || Ext == "zbproposedc") return RISCVExtensionVersion{"0", "93"}; + if (Ext == "p" || Ext == "zpn" || Ext == "zpsfoperand" || + Ext == "zprvsfextra") + return RISCVExtensionVersion{"0", "93"}; if (Ext == "v" || Ext == "zvamo" || Ext == "zvlsseg") return RISCVExtensionVersion{"0", "10"}; if (Ext == "zfh") @@ -427,6 +430,13 @@ Features.push_back("+experimental-zbs"); Features.push_back("+experimental-zbt"); break; + case 'p': + Features.push_back("+experimental-p"); + Features.push_back("+experimental-zpn"); + Features.push_back("+experimental-zpsfoperand"); + if (HasRV64) + Features.push_back("+experimental-zprvsfextra"); + break; case 'v': Features.push_back("+experimental-v"); Features.push_back("+experimental-zvamo"); diff --git a/clang/test/Driver/riscv-arch.c b/clang/test/Driver/riscv-arch.c --- a/clang/test/Driver/riscv-arch.c +++ b/clang/test/Driver/riscv-arch.c @@ -369,6 +369,82 @@ // RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-EXPERIMENTAL-ZBA %s // RV32-EXPERIMENTAL-ZBA: "-target-feature" "+experimental-zba" +// RUN: %clang -target riscv32-unknown-elf -march=rv32ip -### %s -c 2>&1 | \ +// RUN: FileCheck -check-prefix=RV32-EXPERIMENTAL-P-NOFLAG %s +// RV32-EXPERIMENTAL-P-NOFLAG: error: invalid arch name 'rv32ip' +// RV32-EXPERIMENTAL-P-NOFLAG: requires '-menable-experimental-extensions' + +// RUN: %clang -target riscv32-unknown-elf -march=rv32ip -menable-experimental-extensions -### %s -c 2>&1 | \ +// RUN: FileCheck -check-prefix=RV32-EXPERIMENTAL-P-NOVERS %s +// RV32-EXPERIMENTAL-P-NOVERS: error: invalid arch name 'rv32ip' +// RV32-EXPERIMENTAL-P-NOVERS: experimental extension requires explicit version number + +// RUN: %clang -target riscv32-unknown-elf -march=rv32ip0p1 -menable-experimental-extensions -### %s -c 2>&1 | \ +// RUN: FileCheck -check-prefix=RV32-EXPERIMENTAL-P-BADVERS %s +// RV32-EXPERIMENTAL-P-BADVERS: error: invalid arch name 'rv32ip0p1' +// RV32-EXPERIMENTAL-P-BADVERS: unsupported version number 0.1 for experimental extension + +// RUN: %clang -target riscv32-unknown-elf -march=rv32ip0p93 -menable-experimental-extensions -### %s -c 2>&1 | \ +// RUN: FileCheck -check-prefix=RV32-EXPERIMENTAL-P-GOODVERS %s +// RV32-EXPERIMENTAL-P-GOODVERS: "-target-feature" "+experimental-p" + +// RUN: %clang -target riscv32-unknown-elf -march=rv32izpn -### %s -c 2>&1 | \ +// RUN: FileCheck -check-prefix=RV32-EXPERIMENTAL-ZPN-NOFLAG %s +// RV32-EXPERIMENTAL-ZPN-NOFLAG: error: invalid arch name 'rv32izpn' +// RV32-EXPERIMENTAL-ZPN-NOFLAG: requires '-menable-experimental-extensions' + +// RUN: %clang -target riscv32-unknown-elf -march=rv32izpn -menable-experimental-extensions -### %s -c 2>&1 | \ +// RUN: FileCheck -check-prefix=RV32-EXPERIMENTAL-ZPN-NOVERS %s +// RV32-EXPERIMENTAL-ZPN-NOVERS: error: invalid arch name 'rv32izpn' +// RV32-EXPERIMENTAL-ZPN-NOVERS: experimental extension requires explicit version number + +// RUN: %clang -target riscv32-unknown-elf -march=rv32izpn0p1 -menable-experimental-extensions -### %s -c 2>&1 | \ +// RUN: FileCheck -check-prefix=RV32-EXPERIMENTAL-ZPN-BADVERS %s +// RV32-EXPERIMENTAL-ZPN-BADVERS: error: invalid arch name 'rv32izpn0p1' +// RV32-EXPERIMENTAL-ZPN-BADVERS: unsupported version number 0.1 for experimental extension + +// RUN: %clang -target riscv32-unknown-elf -march=rv32izpn0p93 -menable-experimental-extensions -### %s -c 2>&1 | \ +// RUN: FileCheck -check-prefix=RV32-EXPERIMENTAL-ZPN-GOODVERS %s +// RV32-EXPERIMENTAL-ZPN-GOODVERS: "-target-feature" "+experimental-zpn" + +// RUN: %clang -target riscv32-unknown-elf -march=rv32izpsfoperand -### %s -c 2>&1 | \ +// RUN: FileCheck -check-prefix=RV32-EXPERIMENTAL-ZPSFOPERAND-NOFLAG %s +// RV32-EXPERIMENTAL-ZPSFOPERAND-NOFLAG: error: invalid arch name 'rv32izpsfoperand' +// RV32-EXPERIMENTAL-ZPSFOPERAND-NOFLAG: requires '-menable-experimental-extensions' + +// RUN: %clang -target riscv32-unknown-elf -march=rv32izpsfoperand -menable-experimental-extensions -### %s -c 2>&1 | \ +// RUN: FileCheck -check-prefix=RV32-EXPERIMENTAL-ZPSFOPERAND-NOVERS %s +// RV32-EXPERIMENTAL-ZPSFOPERAND-NOVERS: error: invalid arch name 'rv32izpsfoperand' +// RV32-EXPERIMENTAL-ZPSFOPERAND-NOVERS: experimental extension requires explicit version number + +// RUN: %clang -target riscv32-unknown-elf -march=rv32izpsfoperand0p1 -menable-experimental-extensions -### %s -c 2>&1 | \ +// RUN: FileCheck -check-prefix=RV32-EXPERIMENTAL-ZPSFOPERAND-BADVERS %s +// RV32-EXPERIMENTAL-ZPSFOPERAND-BADVERS: error: invalid arch name 'rv32izpsfoperand0p1' +// RV32-EXPERIMENTAL-ZPSFOPERAND-BADVERS: unsupported version number 0.1 for experimental extension + +// RUN: %clang -target riscv32-unknown-elf -march=rv32izpsfoperand0p93 -menable-experimental-extensions -### %s -c 2>&1 | \ +// RUN: FileCheck -check-prefix=RV32-EXPERIMENTAL-ZPSFOPERAND-GOODVERS %s +// RV32-EXPERIMENTAL-ZPSFOPERAND-GOODVERS: "-target-feature" "+experimental-zpsfoperand" + +// RUN: %clang -target riscv64-unknown-elf -march=rv64izprvsfextra -### %s -c 2>&1 | \ +// RUN: FileCheck -check-prefix=RV64-EXPERIMENTAL-ZPRVSFEXTRA-NOFLAG %s +// RV64-EXPERIMENTAL-ZPRVSFEXTRA-NOFLAG: error: invalid arch name 'rv64izprvsfextra' +// RV64-EXPERIMENTAL-ZPRVSFEXTRA-NOFLAG: requires '-menable-experimental-extensions' + +// RUN: %clang -target riscv64-unknown-elf -march=rv64izprvsfextra -menable-experimental-extensions -### %s -c 2>&1 | \ +// RUN: FileCheck -check-prefix=RV64-EXPERIMENTAL-ZPRVSFEXTRA-NOVERS %s +// RV64-EXPERIMENTAL-ZPRVSFEXTRA-NOVERS: error: invalid arch name 'rv64izprvsfextra' +// RV64-EXPERIMENTAL-ZPRVSFEXTRA-NOVERS: experimental extension requires explicit version number + +// RUN: %clang -target riscv64-unknown-elf -march=rv64izprvsfextra0p1 -menable-experimental-extensions -### %s -c 2>&1 | \ +// RUN: FileCheck -check-prefix=RV64-EXPERIMENTAL-ZPRVSFEXTRA-BADVERS %s +// RV64-EXPERIMENTAL-ZPRVSFEXTRA-BADVERS: error: invalid arch name 'rv64izprvsfextra0p1' +// RV64-EXPERIMENTAL-ZPRVSFEXTRA-BADVERS: unsupported version number 0.1 for experimental extension + +// RUN: %clang -target riscv64-unknown-elf -march=rv64izprvsfextra0p93 -menable-experimental-extensions -### %s -c 2>&1 | \ +// RUN: FileCheck -check-prefix=RV64-EXPERIMENTAL-ZPRVSFEXTRA-GOODVERS %s +// RV64-EXPERIMENTAL-ZPRVSFEXTRA-GOODVERS: "-target-feature" "+experimental-zprvsfextra" + // RUN: %clang -target riscv32-unknown-elf -march=rv32iv -### %s -c 2>&1 | \ // RUN: FileCheck -check-prefix=RV32-EXPERIMENTAL-V-NOFLAG %s // RV32-EXPERIMENTAL-V-NOFLAG: error: invalid arch name 'rv32iv' diff --git a/clang/test/Preprocessor/riscv-target-features.c b/clang/test/Preprocessor/riscv-target-features.c --- a/clang/test/Preprocessor/riscv-target-features.c +++ b/clang/test/Preprocessor/riscv-target-features.c @@ -218,6 +218,46 @@ // CHECK-ZBT-NOT: __riscv_b // CHECK-ZBT-EXT: __riscv_zbt 93000 +// RUN: %clang -target riscv32-unknown-linux-gnu -menable-experimental-extensions \ +// RUN: -march=rv32ip0p93 -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-32P-EXT %s +// CHECK-32P-EXT: __riscv_p 93000 +// CHECK-32P-EXT: __riscv_zpn 93000 +// CHECK-32P-EXT: __riscv_zpsfoperand 93000 +// CHECK-32P-NOT: __riscv_zprvsfextra + +// RUN: %clang -target riscv64-unknown-linux-gnu -menable-experimental-extensions \ +// RUN: -march=rv64ip0p93 -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-64P-EXT %s +// CHECK-64P-EXT: __riscv_p 93000 +// CHECK-64P-EXT: __riscv_zpn 93000 +// CHECK-64P-EXT: __riscv_zprvsfextra 93000 +// CHECK-64P-EXT: __riscv_zpsfoperand 93000 + +// RUN: %clang -target riscv32-unknown-linux-gnu -menable-experimental-extensions \ +// RUN: -march=rv32izpn0p93 -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-ZPN-EXT %s +// RUN: %clang -target riscv64-unknown-linux-gnu -menable-experimental-extensions \ +// RUN: -march=rv64izpn0p93 -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-ZPN-EXT %s +// CHECK-ZPN-NOT: __riscv_p +// CHECK-ZPN-EXT: __riscv_zpn 93000 + +// RUN: %clang -target riscv32-unknown-linux-gnu -menable-experimental-extensions \ +// RUN: -march=rv32izpsfoperand0p93 -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-ZPSFOPERAND-EXT %s +// RUN: %clang -target riscv64-unknown-linux-gnu -menable-experimental-extensions \ +// RUN: -march=rv64izpsfoperand0p93 -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-ZPSFOPERAND-EXT %s +// CHECK-ZPSFOPERAND-NOT: __riscv_p +// CHECK-ZPSFOPERAND-EXT: __riscv_zpsfoperand 93000 + +// RUN: %clang -target riscv64-unknown-linux-gnu -menable-experimental-extensions \ +// RUN: -march=rv64izprvsfextra0p93 -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-ZPRVSFEXTRA-EXT %s +// CHECK-ZPRVSFEXTRA-NOT: __riscv_p +// CHECK-ZPRVSFEXTRA-EXT: __riscv_zprvsfextra 93000 + // RUN: %clang -target riscv32-unknown-linux-gnu -menable-experimental-extensions \ // RUN: -march=rv32iv0p10 -x c -E -dM %s \ // RUN: -o - | FileCheck --check-prefix=CHECK-V-EXT %s diff --git a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp --- a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp +++ b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp @@ -504,6 +504,35 @@ return (isRV64() && isUInt<5>(Imm)) || isUInt<4>(Imm); } + bool isUImmLog2XLenBytes() const { + int64_t Imm; + RISCVMCExpr::VariantKind VK = RISCVMCExpr::VK_RISCV_None; + if (!isImm()) + return false; + if (!evaluateConstantImm(getImm(), Imm, VK) || + VK != RISCVMCExpr::VK_RISCV_None) + return false; + return (isRV64() && isUInt<3>(Imm)) || isUInt<2>(Imm); + } + + bool isUImm3() const { + int64_t Imm; + RISCVMCExpr::VariantKind VK = RISCVMCExpr::VK_RISCV_None; + if (!isImm()) + return false; + bool IsConstantImm = evaluateConstantImm(getImm(), Imm, VK); + return IsConstantImm && isUInt<3>(Imm) && VK == RISCVMCExpr::VK_RISCV_None; + } + + bool isUImm4() const { + int64_t Imm; + RISCVMCExpr::VariantKind VK = RISCVMCExpr::VK_RISCV_None; + if (!isImm()) + return false; + bool IsConstantImm = evaluateConstantImm(getImm(), Imm, VK); + return IsConstantImm && isUInt<4>(Imm) && VK == RISCVMCExpr::VK_RISCV_None; + } + bool isUImm5() const { int64_t Imm; RISCVMCExpr::VariantKind VK = RISCVMCExpr::VK_RISCV_None; @@ -909,6 +938,18 @@ &RISCVMCRegisterClasses[RegClassID]); } +static bool isGPRPair(MCRegister Reg) { + assert(Reg >= RISCV::X0 && Reg <= RISCV::X31 && "Invalid register"); + if ((Reg - RISCV::X0) % 2 || Reg == RISCV::X0) + return false; + return true; +} + +static MCRegister convertGPRToGPRPair(MCRegister Reg) { + assert(isGPRPair(Reg) && "Invalid register"); + return (Reg - RISCV::X0) / 2 - 1 + RISCV::X2_X3; +} + unsigned RISCVAsmParser::validateTargetOperandClass(MCParsedAsmOperand &AsmOp, unsigned Kind) { RISCVOperand &Op = static_cast(AsmOp); @@ -916,6 +957,7 @@ return Match_InvalidOperand; MCRegister Reg = Op.getReg(); + bool IsRegGPR = RISCVMCRegisterClasses[RISCV::GPRRegClassID].contains(Reg); bool IsRegFPR64 = RISCVMCRegisterClasses[RISCV::FPR64RegClassID].contains(Reg); bool IsRegFPR64C = @@ -943,6 +985,13 @@ return Match_InvalidOperand; return Match_Success; } + + // GPRPair is specified by first register of even/odd pair of registers. + if (IsRegGPR && Kind == MCK_GPRPair && !isRV64() && isGPRPair(Reg)) { + Op.Reg.RegNum = convertGPRToGPRPair(Reg); + return Match_Success; + } + return Match_InvalidOperand; } @@ -1044,6 +1093,14 @@ if (isRV64()) return generateImmOutOfRangeError(Operands, ErrorInfo, 0, (1 << 5) - 1); return generateImmOutOfRangeError(Operands, ErrorInfo, 0, (1 << 4) - 1); + case Match_InvalidUImmLog2XLenBytes: + if (isRV64()) + return generateImmOutOfRangeError(Operands, ErrorInfo, 0, (1 << 3) - 1); + return generateImmOutOfRangeError(Operands, ErrorInfo, 0, (1 << 2) - 1); + case Match_InvalidUImm3: + return generateImmOutOfRangeError(Operands, ErrorInfo, 0, (1 << 3) - 1); + case Match_InvalidUImm4: + return generateImmOutOfRangeError(Operands, ErrorInfo, 0, (1 << 4) - 1); case Match_InvalidUImm5: return generateImmOutOfRangeError(Operands, ErrorInfo, 0, (1 << 5) - 1); case Match_InvalidSImm5: diff --git a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp --- a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp +++ b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp @@ -248,6 +248,17 @@ return MCDisassembler::Success; } +static DecodeStatus DecodeGPRPairRegisterClass(MCInst &Inst, uint64_t RegNo, + uint64_t Address, + const void *Decoder) { + if (RegNo >= 32 || RegNo & 1 || RegNo == 0) + return MCDisassembler::Fail; + + MCRegister Reg = RISCV::X2_X3 + (RegNo / 2) - 1; + Inst.addOperand(MCOperand::createReg(Reg)); + return MCDisassembler::Success; +} + // Add implied SP operand for instructions *SP compressed instructions. The SP // operand isn't explicitly encoded in the instruction. static void addImplySP(MCInst &Inst, int64_t Address, const void *Decoder) { @@ -427,6 +438,22 @@ return MCDisassembler::Fail; } Insn = support::endian::read32le(Bytes.data()); + + if (STI.getFeatureBits()[RISCV::FeatureExtZpsfoperand]) { + if (!STI.getFeatureBits()[RISCV::Feature64Bit]) { + LLVM_DEBUG( + dbgs() + << "Trying RISCV32POnly_32 table (SIMD 32-bit Instruction):\n"); + // Calling the auto-generated decoder function. + Result = decodeInstruction(DecoderTableRISCV32POnly_32, MI, Insn, + Address, this, STI); + if (Result != MCDisassembler::Fail) { + Size = 4; + return Result; + } + } + } + LLVM_DEBUG(dbgs() << "Trying RISCV32 table :\n"); Result = decodeInstruction(DecoderTable32, MI, Insn, Address, this, STI); Size = 4; diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h --- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h +++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h @@ -111,7 +111,8 @@ namespace RISCVOp { enum OperandType : unsigned { OPERAND_FIRST_RISCV_IMM = MCOI::OPERAND_FIRST_TARGET, - OPERAND_UIMM4 = OPERAND_FIRST_RISCV_IMM, + OPERAND_UIMM3 = OPERAND_FIRST_RISCV_IMM, + OPERAND_UIMM4, OPERAND_UIMM5, OPERAND_UIMM12, OPERAND_SIMM12, diff --git a/llvm/lib/Target/RISCV/RISCV.td b/llvm/lib/Target/RISCV/RISCV.td --- a/llvm/lib/Target/RISCV/RISCV.td +++ b/llvm/lib/Target/RISCV/RISCV.td @@ -159,6 +159,37 @@ AssemblerPredicate<(all_of FeatureStdExtB), "'B' (Bit Manipulation Instructions)">; +def FeatureExtZpn + : SubtargetFeature<"experimental-zpn", "HasStdExtZpn", "true", + "'Zpn' (Normal 'P' Instructions)">; +def HasStdExtZpn : Predicate<"Subtarget->hasStdExtZpn()">, + AssemblerPredicate<(all_of FeatureExtZpn), + "'Zpn' (Normal 'P' Instructions)">; + +def FeatureExtZpsfoperand + : SubtargetFeature<"experimental-zpsfoperand", "HasStdExtZpsfoperand", "true", + "'Zpsfoperand' (Paired-register operand 'P' Instructions)">; +def HasStdExtZpsfoperand : Predicate<"Subtarget->hasStdExtZpsfoperand()">, + AssemblerPredicate<(all_of FeatureExtZpsfoperand), + "'Zpsfoperand' (Paired-register operand 'P' Instructions)">; + +def FeatureExtZprvsfextra + : SubtargetFeature<"experimental-zprvsfextra", "HasStdExtZprvsfextra", "true", + "'Zprvsfextra' (RV64 only 'P' Instructions)">; +def HasStdExtZprvsfextra : Predicate<"Subtarget->hasStdExtZprvsfextra()">, + AssemblerPredicate<(all_of FeatureExtZprvsfextra), + "'Zprvsfextra' (RV64 only 'P' Instructions)">; + +def FeatureStdExtP + : SubtargetFeature<"experimental-p", "HasStdExtP", "true", + "'P' (Packed-SIMD Instructions)", + [FeatureExtZpsfoperand, + FeatureExtZpn, + FeatureExtZprvsfextra]>; +def HasStdExtP : Predicate<"Subtarget->hasStdExtP()">, + AssemblerPredicate<(all_of FeatureStdExtP), + "'P' (Packed-SIMD Instructions)">; + def FeatureNoRVCHints : SubtargetFeature<"no-rvc-hints", "EnableRVCHintInstrs", "false", "Disable RVC Hint Instructions.">; diff --git a/llvm/lib/Target/RISCV/RISCVInstrFormats.td b/llvm/lib/Target/RISCV/RISCVInstrFormats.td --- a/llvm/lib/Target/RISCV/RISCVInstrFormats.td +++ b/llvm/lib/Target/RISCV/RISCVInstrFormats.td @@ -127,6 +127,7 @@ def OPC_NMSUB : RISCVOpcode<0b1001011>; def OPC_NMADD : RISCVOpcode<0b1001111>; def OPC_OP_FP : RISCVOpcode<0b1010011>; +def OPC_OP_P : RISCVOpcode<0b1110111>; def OPC_OP_V : RISCVOpcode<0b1010111>; def OPC_BRANCH : RISCVOpcode<0b1100011>; def OPC_JALR : RISCVOpcode<0b1100111>; diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp --- a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp +++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp @@ -833,6 +833,9 @@ switch (OpType) { default: llvm_unreachable("Unexpected operand type"); + case RISCVOp::OPERAND_UIMM3: + Ok = isUInt<3>(Imm); + break; case RISCVOp::OPERAND_UIMM4: Ok = isUInt<4>(Imm); break; diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.td b/llvm/lib/Target/RISCV/RISCVInstrInfo.td --- a/llvm/lib/Target/RISCV/RISCVInstrInfo.td +++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.td @@ -1296,5 +1296,6 @@ include "RISCVInstrInfoD.td" include "RISCVInstrInfoC.td" include "RISCVInstrInfoB.td" +include "RISCVInstrInfoP.td" include "RISCVInstrInfoV.td" include "RISCVInstrInfoZfh.td" diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoP.td b/llvm/lib/Target/RISCV/RISCVInstrInfoP.td new file mode 100644 --- /dev/null +++ b/llvm/lib/Target/RISCV/RISCVInstrInfoP.td @@ -0,0 +1,955 @@ +//===-- RISCVInstrInfoP.td - RISC-V 'P' instructions -------*- tablegen -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +/// +/// This file describes the RISC-V instructions from the standard 'P' SIMD +/// extension, version 0.9. +/// This version is still experimental as the 'P' extension hasn't been +/// ratified yet. +/// +//===----------------------------------------------------------------------===// + +//===----------------------------------------------------------------------===// +// Operand and SDNode transformation definitions. +//===----------------------------------------------------------------------===// + +def uimm3 : Operand, ImmLeaf(Imm);}]> { + let ParserMatchClass = UImmAsmOperand<3>; + let DecoderMethod = "decodeUImmOperand<3>"; + let OperandType = "OPERAND_UIMM3"; + let OperandNamespace = "RISCVOp"; +} + +def uimm4 : Operand, ImmLeaf(Imm);}]> { + let ParserMatchClass = UImmAsmOperand<4>; + let DecoderMethod = "decodeUImmOperand<4>"; + let OperandType = "OPERAND_UIMM4"; + let OperandNamespace = "RISCVOp"; +} + +def UImmLog2XLenBytesAsmOperand : AsmOperandClass { + let Name = "UImmLog2XLenBytes"; + let RenderMethod = "addImmOperands"; + let DiagnosticType = "InvalidUImmLog2XLenBytes"; +} + +def uimmlog2xlenbytes : Operand, ImmLeafis64Bit()) + return isUInt<3>(Imm); + return isUInt<2>(Imm); +}]> { + let ParserMatchClass = UImmLog2XLenBytesAsmOperand; + let DecoderMethod = "decodeUImmOperand<3>"; + let MCOperandPredicate = [{ + int64_t Imm; + if (!MCOp.evaluateAsConstantImm(Imm)) + return false; + if (STI.getTargetTriple().isArch64Bit()) + return isUInt<3>(Imm); + return isUInt<2>(Imm); + }]; +} + +//===----------------------------------------------------------------------===// +// Instruction class templates +//===----------------------------------------------------------------------===// + +let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in +class RVPUnary funct7, bits<5> funct5, bits<3> funct3, string opcodestr> + : RVInstR { + let Inst{24-20} = funct5; +} + +let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in +class RVPBinary funct7, bits<3> funct3, string opcodestr> + : RVInstR; + +let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in +class RVPTernary funct7, bits<3> funct3, string opcodestr> + : RVInstR { + let Constraints = "$rs3 = $rd"; +} + +let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in +class RVPShiftI3 funct7, bits<2> funct2, + bits<3> funct3, string opcodestr> + : RVInstI { + bits<3> shamt; + + let Inst{31-25} = funct7; + let Inst{24-23} = funct2; + let Inst{22-20} = shamt; +} + +let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in +class RVPShiftI4 funct7, bits<1> funct1, + bits<3> funct3, string opcodestr> + : RVInstI { + bits<4> shamt; + + let Inst{31-25} = funct7; + let Inst{24} = funct1; + let Inst{23-20} = shamt; +} + +let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in +class RVPShiftI5 funct7, bits<3> funct3, string opcodestr> + : RVInstI { + bits<5> shamt; + + let Inst{31-25} = funct7; + let Inst{24-20} = shamt; +} + +let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in +class RVPShiftUImmLog2XLen funct6, bits<3> funct3, string opcodestr> + : RVInstI { + bits<6> shamt; + + let Inst{31-26} = funct6; + let Inst{25-20} = shamt; +} + +let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in +class RVPBPICK funct2, bits<3> funct3, string opcodestr> + : RVInstR4 { + let Inst{31-30} = funct2; + let Inst{29-25} = rs3; + let Inst{14-12} = funct3; +} + +let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in +class RVPINSB funct7, bits<2> funct2, bits<3> funct3, string opcodestr> + : RVInstI { + bits<3> shamt; + + let Constraints = "$rs2 = $rd"; + let Inst{31-25} = funct7; + let Inst{24-23} = funct2; + let Inst{22-20} = shamt; +} + +let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in +class RVPALU64Pair funct7, bits<3> funct3, string opcodestr> + : RVInstR; + +multiclass RVPALU64 funct7, bits<3> funct3, string opcodestr> { + let DecoderNamespace = "RISCV32POnly_", Predicates = [HasStdExtZpsfoperand, IsRV32] in + def "32" : RVPALU64Pair; + let Predicates = [HasStdExtZpsfoperand, IsRV64] in + def "64" : RVPBinary; +} + +let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in +class RVPSMAL64Pair funct7, bits<3> funct3, string opcodestr> + : RVInstR; + +multiclass RVPSMAL64 funct7, bits<3> funct3, string opcodestr> { + let DecoderNamespace = "RISCV32POnly_", Predicates = [HasStdExtZpsfoperand, IsRV32] in + def "32" : RVPSMAL64Pair; + let Predicates = [HasStdExtZpsfoperand, IsRV64] in + def "64" : RVPBinary; +} + +let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in +class RVPMUL64Pair funct7, bits<3> funct3, string opcodestr> + : RVInstR; + +multiclass RVPMUL64 funct7, bits<3> funct3, string opcodestr> { + let DecoderNamespace = "RISCV32POnly_", Predicates = [HasStdExtZpsfoperand, IsRV32] in + def "32" : RVPMUL64Pair; + let Predicates = [HasStdExtZpsfoperand, IsRV64] in + def "64" : RVPBinary; +} + + +let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in +class RVPMA64Pair funct7, bits<3> funct3, string opcodestr> + : RVInstR { + let Constraints = "$rs3 = $rd"; +} + +multiclass RVPMA64 funct7, bits<3> funct3, string opcodestr> { + let DecoderNamespace = "RISCV32POnly_", Predicates = [HasStdExtZpsfoperand, IsRV32] in + def "32" : RVPMA64Pair; + let Predicates = [HasStdExtZpsfoperand, IsRV64] in + def "64" : RVPTernary; +} + +let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in +class RVPWEXTPair funct7, bits<3> funct3, string opcodestr> + : RVInstR; + +multiclass RVPWEXT funct7, bits<3> funct3, string opcodestr> { + let DecoderNamespace = "RISCV32POnly_", Predicates = [HasStdExtZpsfoperand, IsRV32] in + def "32" : RVPWEXTPair; + let Predicates = [HasStdExtZpsfoperand, IsRV64] in + def "64" : RVPBinary; +} + +let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in +class RVPWEXTPairI funct7, bits<3> funct3, string opcodestr> + : RVInstI { + bits<5> shamt; + + let Inst{31-25} = funct7; + let Inst{24-20} = shamt; +} + +multiclass RVPWEXTI funct7, bits<3> funct3, string opcodestr> { + let DecoderNamespace = "RISCV32POnly_", Predicates = [HasStdExtZpsfoperand, IsRV32] in + def "32" : RVPWEXTPairI; + let Predicates = [HasStdExtZpsfoperand, IsRV64] in + def "64" : RVPShiftI5; +} + +//===----------------------------------------------------------------------===// +// Instructions +//===----------------------------------------------------------------------===// + +// Unary Instructions + +let Predicates = [HasStdExtZpn] in { +def CLRS8 : RVPUnary<0b1010111, 0b00000, 0b000, "clrs8">, + Sched<[]>; +def CLRS16 : RVPUnary<0b1010111, 0b01000, 0b000, "clrs16">, + Sched<[]>; +def CLRS32 : RVPUnary<0b1010111, 0b11000, 0b000, "clrs32">, + Sched<[]>; +def CLO8 : RVPUnary<0b1010111, 0b00011, 0b000, "clo8">, + Sched<[]>; +def CLO16 : RVPUnary<0b1010111, 0b01011, 0b000, "clo16">, + Sched<[]>; +def CLO32 : RVPUnary<0b1010111, 0b11011, 0b000, "clo32">, + Sched<[]>; +def CLZ8 : RVPUnary<0b1010111, 0b00001, 0b000, "clz8">, + Sched<[]>; +def CLZ16 : RVPUnary<0b1010111, 0b01001, 0b000, "clz16">, + Sched<[]>; +def CLZ32 : RVPUnary<0b1010111, 0b11001, 0b000, "clz32">, + Sched<[]>; +def KABS8 : RVPUnary<0b1010110, 0b10000, 0b000, "kabs8">, + Sched<[]>; +def KABS16 : RVPUnary<0b1010110, 0b10001, 0b000, "kabs16">, + Sched<[]>; +def KABSW : RVPUnary<0b1010110, 0b10100, 0b000, "kabsw">, + Sched<[]>; +def SUNPKD810 : RVPUnary<0b1010110, 0b01000, 0b000, "sunpkd810">, + Sched<[]>; +def SUNPKD820 : RVPUnary<0b1010110, 0b01001, 0b000, "sunpkd820">, + Sched<[]>; +def SUNPKD830 : RVPUnary<0b1010110, 0b01010, 0b000, "sunpkd830">, + Sched<[]>; +def SUNPKD831 : RVPUnary<0b1010110, 0b01011, 0b000, "sunpkd831">, + Sched<[]>; +def SUNPKD832 : RVPUnary<0b1010110, 0b10011, 0b000, "sunpkd832">, + Sched<[]>; +def SWAP8 : RVPUnary<0b1010110, 0b11000, 0b000, "swap8">, + Sched<[]>; +def SWAP16 : RVPUnary<0b1010110, 0b11001, 0b000, "swap16">, + Sched<[]>; +def ZUNPKD810 : RVPUnary<0b1010110, 0b01100, 0b000, "zunpkd810">, + Sched<[]>; +def ZUNPKD820 : RVPUnary<0b1010110, 0b01101, 0b000, "zunpkd820">, + Sched<[]>; +def ZUNPKD830 : RVPUnary<0b1010110, 0b01110, 0b000, "zunpkd830">, + Sched<[]>; +def ZUNPKD831 : RVPUnary<0b1010110, 0b01111, 0b000, "zunpkd831">, + Sched<[]>; +def ZUNPKD832 : RVPUnary<0b1010110, 0b10111, 0b000, "zunpkd832">, + Sched<[]>; +} // Predicates = [HasStdExtZpn] + +let Predicates = [HasStdExtZprvsfextra, IsRV64] in +def KABS32 : RVPUnary<0b1010110, 0b10010, 0b000, "kabs32">, + Sched<[]>; + +// Binary Instructions + +let Predicates = [HasStdExtZpn] in { +def ADD8 : RVPBinary<0b0100100, 0b000, "add8">, + Sched<[]>; +def ADD16 : RVPBinary<0b0100000, 0b000, "add16">, + Sched<[]>; +def AVE : RVPBinary<0b1110000, 0b000, "ave">, + Sched<[]>; +def BITREV : RVPBinary<0b1110011, 0b000, "bitrev">, + Sched<[]>; +def CMPEQ8 : RVPBinary<0b0100111, 0b000, "cmpeq8">, + Sched<[]>; +def CMPEQ16 : RVPBinary<0b0100110, 0b000, "cmpeq16">, + Sched<[]>; +def CRAS16 : RVPBinary<0b0100010, 0b000, "cras16">, + Sched<[]>; +def CRSA16 : RVPBinary<0b0100011, 0b000, "crsa16">, + Sched<[]>; +def KADD8 : RVPBinary<0b0001100, 0b000, "kadd8">, + Sched<[]>; +def KADD16 : RVPBinary<0b0001000, 0b000, "kadd16">, + Sched<[]>; +def KADDH : RVPBinary<0b0000010, 0b001, "kaddh">, + Sched<[]>; +def KADDW : RVPBinary<0b0000000, 0b001, "kaddw">, + Sched<[]>; +def KCRAS16 : RVPBinary<0b0001010, 0b000, "kcras16">, + Sched<[]>; +def KCRSA16 : RVPBinary<0b0001011, 0b000, "kcrsa16">, + Sched<[]>; +def KDMBB : RVPBinary<0b0000101, 0b001, "kdmbb">, + Sched<[]>; +def KDMBT : RVPBinary<0b0001101, 0b001, "kdmbt">, + Sched<[]>; +def KDMTT : RVPBinary<0b0010101, 0b001, "kdmtt">, + Sched<[]>; +def KHM8 : RVPBinary<0b1000111, 0b000, "khm8">, + Sched<[]>; +def KHMX8 : RVPBinary<0b1001111, 0b000, "khmx8">, + Sched<[]>; +def KHM16 : RVPBinary<0b1000011, 0b000, "khm16">, + Sched<[]>; +def KHMX16 : RVPBinary<0b1001011, 0b000, "khmx16">, + Sched<[]>; +def KHMBB : RVPBinary<0b0000110, 0b001, "khmbb">, + Sched<[]>; +def KHMBT : RVPBinary<0b0001110, 0b001, "khmbt">, + Sched<[]>; +def KHMTT : RVPBinary<0b0010110, 0b001, "khmtt">, + Sched<[]>; +def KMDA : RVPBinary<0b0011100, 0b001, "kmda">, + Sched<[]>; +def KMXDA : RVPBinary<0b0011101, 0b001, "kmxda">, + Sched<[]>; +def KMMWB2 : RVPBinary<0b1000111, 0b001, "kmmwb2">, + Sched<[]>; +def KMMWB2U : RVPBinary<0b1001111, 0b001, "kmmwb2.u">, + Sched<[]>; +def KMMWT2 : RVPBinary<0b1010111, 0b001, "kmmwt2">, + Sched<[]>; +def KMMWT2U : RVPBinary<0b1011111, 0b001, "kmmwt2.u">, + Sched<[]>; +def KSLLW : RVPBinary<0b0010011, 0b001, "ksllw">, + Sched<[]>; +def KSLL8 : RVPBinary<0b0110110, 0b000, "ksll8">, + Sched<[]>; +def KSLL16 : RVPBinary<0b0110010, 0b000, "ksll16">, + Sched<[]>; +def KSLRA8 : RVPBinary<0b0101111, 0b000, "kslra8">, + Sched<[]>; +def KSLRA8U : RVPBinary<0b0110111, 0b000, "kslra8.u">, + Sched<[]>; +def KSLRA16 : RVPBinary<0b0101011, 0b000, "kslra16">, + Sched<[]>; +def KSLRA16U : RVPBinary<0b0110011, 0b000, "kslra16.u">, + Sched<[]>; +def KSLRAW : RVPBinary<0b0110111, 0b001, "kslraw">, + Sched<[]>; +def KSLRAWU : RVPBinary<0b0111111, 0b001, "kslraw.u">, + Sched<[]>; +def KSTAS16 : RVPBinary<0b0001010, 0b011, "kstas16">, + Sched<[]>; +def KSTSA16 : RVPBinary<0b0001011, 0b011, "kstsa16">, + Sched<[]>; +def KSUB8 : RVPBinary<0b0001101, 0b000, "ksub8">, + Sched<[]>; +def KSUB16 : RVPBinary<0b0001001, 0b000, "ksub16">, + Sched<[]>; +def KSUBH : RVPBinary<0b0000011, 0b001, "ksubh">, + Sched<[]>; +def KSUBW : RVPBinary<0b0000001, 0b001, "ksubw">, + Sched<[]>; +def KWMMUL : RVPBinary<0b0110001, 0b001, "kwmmul">, + Sched<[]>; +def KWMMULU : RVPBinary<0b0111001, 0b001, "kwmmul.u">, + Sched<[]>; +def MAXW : RVPBinary<0b1111001, 0b000, "maxw">, + Sched<[]>; +def MINW : RVPBinary<0b1111000, 0b000, "minw">, + Sched<[]>; +def PBSAD : RVPBinary<0b1111110, 0b000, "pbsad">, + Sched<[]>; +def PKBB16 : RVPBinary<0b0000111, 0b001, "pkbb16">, + Sched<[]>; +def PKBT16 : RVPBinary<0b0001111, 0b001, "pkbt16">, + Sched<[]>; +def PKTT16 : RVPBinary<0b0010111, 0b001, "pktt16">, + Sched<[]>; +def PKTB16 : RVPBinary<0b0011111, 0b001, "pktb16">, + Sched<[]>; +def RADD8 : RVPBinary<0b0000100, 0b000, "radd8">, + Sched<[]>; +def RADD16 : RVPBinary<0b0000000, 0b000, "radd16">, + Sched<[]>; +def RADDW : RVPBinary<0b0010000, 0b001, "raddw">, + Sched<[]>; +def RCRAS16 : RVPBinary<0b0000010, 0b000, "rcras16">, + Sched<[]>; +def RCRSA16 : RVPBinary<0b0000011, 0b000, "rcrsa16">, + Sched<[]>; +def RSTAS16 : RVPBinary<0b0000010, 0b011, "rstas16">, + Sched<[]>; +def RSTSA16 : RVPBinary<0b0000011, 0b011, "rstsa16">, + Sched<[]>; +def RSUB8 : RVPBinary<0b0000101, 0b000, "rsub8">, + Sched<[]>; +def RSUB16 : RVPBinary<0b0000001, 0b000, "rsub16">, + Sched<[]>; +def RSUBW : RVPBinary<0b0010001, 0b001, "rsubw">, + Sched<[]>; +def SCMPLE8 : RVPBinary<0b0001111, 0b000, "scmple8">, + Sched<[]>; +def SCMPLE16 : RVPBinary<0b0001110, 0b000, "scmple16">, + Sched<[]>; +def SCMPLT8 : RVPBinary<0b0000111, 0b000, "scmplt8">, + Sched<[]>; +def SCMPLT16 : RVPBinary<0b0000110, 0b000, "scmplt16">, + Sched<[]>; +def SLL8 : RVPBinary<0b0101110, 0b000, "sll8">, + Sched<[]>; +def SLL16 : RVPBinary<0b0101010, 0b000, "sll16">, + Sched<[]>; +def SMAX8 : RVPBinary<0b1000101, 0b000, "smax8">, + Sched<[]>; +def SMAX16 : RVPBinary<0b1000001, 0b000, "smax16">, + Sched<[]>; +def SMBB16 : RVPBinary<0b0000100, 0b001, "smbb16">, + Sched<[]>; +def SMBT16 : RVPBinary<0b0001100, 0b001, "smbt16">, + Sched<[]>; +def SMTT16 : RVPBinary<0b0010100, 0b001, "smtt16">, + Sched<[]>; +def SMDS : RVPBinary<0b0101100, 0b001, "smds">, + Sched<[]>; +def SMDRS : RVPBinary<0b0110100, 0b001, "smdrs">, + Sched<[]>; +def SMXDS : RVPBinary<0b0111100, 0b001, "smxds">, + Sched<[]>; +def SMIN8 : RVPBinary<0b1000100, 0b000, "smin8">, + Sched<[]>; +def SMIN16 : RVPBinary<0b1000000, 0b000, "smin16">, + Sched<[]>; +def SMMUL : RVPBinary<0b0100000, 0b001, "smmul">, + Sched<[]>; +def SMMULU : RVPBinary<0b0101000, 0b001, "smmul.u">, + Sched<[]>; +def SMMWB : RVPBinary<0b0100010, 0b001, "smmwb">, + Sched<[]>; +def SMMWBU : RVPBinary<0b0101010, 0b001, "smmwb.u">, + Sched<[]>; +def SMMWT : RVPBinary<0b0110010, 0b001, "smmwt">, + Sched<[]>; +def SMMWTU : RVPBinary<0b0111010, 0b001, "smmwt.u">, + Sched<[]>; +def SRAU : RVPBinary<0b0010010, 0b001, "sra.u">, + Sched<[]>; +def SRA8 : RVPBinary<0b0101100, 0b000, "sra8">, + Sched<[]>; +def SRA8U : RVPBinary<0b0110100, 0b000, "sra8.u">, + Sched<[]>; +def SRA16 : RVPBinary<0b0101000, 0b000, "sra16">, + Sched<[]>; +def SRA16U : RVPBinary<0b0110000, 0b000, "sra16.u">, + Sched<[]>; +def SRL8 : RVPBinary<0b0101101, 0b000, "srl8">, + Sched<[]>; +def SRL8U : RVPBinary<0b0110101, 0b000, "srl8.u">, + Sched<[]>; +def SRL16 : RVPBinary<0b0101001, 0b000, "srl16">, + Sched<[]>; +def SRL16U : RVPBinary<0b0110001, 0b000, "srl16.u">, + Sched<[]>; +def STAS16 : RVPBinary<0b0100010, 0b011, "stas16">, + Sched<[]>; +def STSA16 : RVPBinary<0b0100011, 0b011, "stsa16">, + Sched<[]>; +def SUB8 : RVPBinary<0b0100101, 0b000, "sub8">, + Sched<[]>; +def SUB16 : RVPBinary<0b0100001, 0b000, "sub16">, + Sched<[]>; +def UCMPLE8 : RVPBinary<0b0011111, 0b000, "ucmple8">, + Sched<[]>; +def UCMPLE16 : RVPBinary<0b0011110, 0b000, "ucmple16">, + Sched<[]>; +def UCMPLT8 : RVPBinary<0b0010111, 0b000, "ucmplt8">, + Sched<[]>; +def UCMPLT16 : RVPBinary<0b0010110, 0b000, "ucmplt16">, + Sched<[]>; +def UKADD8 : RVPBinary<0b0011100, 0b000, "ukadd8">, + Sched<[]>; +def UKADD16 : RVPBinary<0b0011000, 0b000, "ukadd16">, + Sched<[]>; +def UKADDH : RVPBinary<0b0001010, 0b001, "ukaddh">, + Sched<[]>; +def UKADDW : RVPBinary<0b0001000, 0b001, "ukaddw">, + Sched<[]>; +def UKCRAS16 : RVPBinary<0b0011010, 0b000, "ukcras16">, + Sched<[]>; +def UKCRSA16 : RVPBinary<0b0011011, 0b000, "ukcrsa16">, + Sched<[]>; +def UKSTAS16 : RVPBinary<0b0011010, 0b011, "ukstas16">, + Sched<[]>; +def UKSTSA16 : RVPBinary<0b0011011, 0b011, "ukstsa16">, + Sched<[]>; +def UKSUB8 : RVPBinary<0b0011101, 0b000, "uksub8">, + Sched<[]>; +def UKSUB16 : RVPBinary<0b0011001, 0b000, "uksub16">, + Sched<[]>; +def UKSUBH : RVPBinary<0b0001011, 0b001, "uksubh">, + Sched<[]>; +def UKSUBW : RVPBinary<0b0001001, 0b001, "uksubw">, + Sched<[]>; +def UMAX8 : RVPBinary<0b1001101, 0b000, "umax8">, + Sched<[]>; +def UMAX16 : RVPBinary<0b1001001, 0b000, "umax16">, + Sched<[]>; +def UMIN8 : RVPBinary<0b1001100, 0b000, "umin8">, + Sched<[]>; +def UMIN16 : RVPBinary<0b1001000, 0b000, "umin16">, + Sched<[]>; +def URADD8 : RVPBinary<0b0010100, 0b000, "uradd8">, + Sched<[]>; +def URADD16 : RVPBinary<0b0010000, 0b000, "uradd16">, + Sched<[]>; +def URADDW : RVPBinary<0b0011000, 0b001, "uraddw">, + Sched<[]>; +def URCRAS16 : RVPBinary<0b0010010, 0b000, "urcras16">, + Sched<[]>; +def URCRSA16 : RVPBinary<0b0010011, 0b000, "urcrsa16">, + Sched<[]>; +def URSTAS16 : RVPBinary<0b0010010, 0b011, "urstas16">, + Sched<[]>; +def URSTSA16 : RVPBinary<0b0010011, 0b011, "urstsa16">, + Sched<[]>; +def URSUB8 : RVPBinary<0b0010101, 0b000, "ursub8">, + Sched<[]>; +def URSUB16 : RVPBinary<0b0010001, 0b000, "ursub16">, + Sched<[]>; +def URSUBW : RVPBinary<0b0011001, 0b001, "ursubw">, + Sched<[]>; +} // Predicates = [HasStdExtZpn] + +let Predicates = [HasStdExtZprvsfextra, IsRV64] in { +def ADD32 : RVPBinary<0b0100000, 0b010, "add32">, + Sched<[]>; +def CRAS32 : RVPBinary<0b0100010, 0b010, "cras32">, + Sched<[]>; +def CRSA32 : RVPBinary<0b0100011, 0b010, "crsa32">, + Sched<[]>; +def KADD32 : RVPBinary<0b0001000, 0b010, "kadd32">, + Sched<[]>; +def KCRAS32 : RVPBinary<0b0001010, 0b010, "kcras32">, + Sched<[]>; +def KCRSA32 : RVPBinary<0b0001011, 0b010, "kcrsa32">, + Sched<[]>; +def KDMBB16 : RVPBinary<0b1101101, 0b001, "kdmbb16">, + Sched<[]>; +def KDMBT16 : RVPBinary<0b1110101, 0b001, "kdmbt16">, + Sched<[]>; +def KDMTT16 : RVPBinary<0b1111101, 0b001, "kdmtt16">, + Sched<[]>; +def KHMBB16 : RVPBinary<0b1101110, 0b001, "khmbb16">, + Sched<[]>; +def KHMBT16 : RVPBinary<0b1110110, 0b001, "khmbt16">, + Sched<[]>; +def KHMTT16 : RVPBinary<0b1111110, 0b001, "khmtt16">, + Sched<[]>; +def KMDA32 : RVPBinary<0b0011100, 0b010, "kmda32">, + Sched<[]>; +def KMXDA32 : RVPBinary<0b0011101, 0b010, "kmxda32">, + Sched<[]>; +def KSLL32 : RVPBinary<0b0110010, 0b010, "ksll32">, + Sched<[]>; +def KSLRA32 : RVPBinary<0b0101011, 0b010, "kslra32">, + Sched<[]>; +def KSLRA32U : RVPBinary<0b0110011, 0b010, "kslra32.u">, + Sched<[]>; +def KSTAS32 : RVPBinary<0b0001000, 0b011, "kstas32">, + Sched<[]>; +def KSTSA32 : RVPBinary<0b0001001, 0b011, "kstsa32">, + Sched<[]>; +def KSUB32 : RVPBinary<0b0001001, 0b010, "ksub32">, + Sched<[]>; +def PKBB32 : RVPBinary<0b0000111, 0b010, "pkbb32">, + Sched<[]>; +def PKBT32 : RVPBinary<0b0001111, 0b010, "pkbt32">, + Sched<[]>; +def PKTT32 : RVPBinary<0b0010111, 0b010, "pktt32">, + Sched<[]>; +def PKTB32 : RVPBinary<0b0011111, 0b010, "pktb32">, + Sched<[]>; +def RADD32 : RVPBinary<0b0000000, 0b010, "radd32">, + Sched<[]>; +def RCRAS32 : RVPBinary<0b0000010, 0b010, "rcras32">, + Sched<[]>; +def RCRSA32 : RVPBinary<0b0000011, 0b010, "rcrsa32">, + Sched<[]>; +def RSTAS32 : RVPBinary<0b0000000, 0b011, "rstas32">, + Sched<[]>; +def RSTSA32 : RVPBinary<0b0000001, 0b011, "rstsa32">, + Sched<[]>; +def RSUB32 : RVPBinary<0b0000001, 0b010, "rsub32">, + Sched<[]>; +def SLL32 : RVPBinary<0b0101010, 0b010, "sll32">, + Sched<[]>; +def SMAX32 : RVPBinary<0b1001001, 0b010, "smax32">, + Sched<[]>; +def SMBB32 : RVPBinary<0b0000100, 0b010, "smbb32">, + Sched<[]>; +def SMBT32 : RVPBinary<0b0001100, 0b010, "smbt32">, + Sched<[]>; +def SMTT32 : RVPBinary<0b0010100, 0b010, "smtt32">, + Sched<[]>; +def SMDS32 : RVPBinary<0b0101100, 0b010, "smds32">, + Sched<[]>; +def SMDRS32 : RVPBinary<0b0110100, 0b010, "smdrs32">, + Sched<[]>; +def SMXDS32 : RVPBinary<0b0111100, 0b010, "smxds32">, + Sched<[]>; +def SMIN32 : RVPBinary<0b1001000, 0b010, "smin32">, + Sched<[]>; +def SRA32 : RVPBinary<0b0101000, 0b010, "sra32">, + Sched<[]>; +def SRA32U : RVPBinary<0b0110000, 0b010, "sra32.u">, + Sched<[]>; +def SRL32 : RVPBinary<0b0101001, 0b010, "srl32">, + Sched<[]>; +def SRL32U : RVPBinary<0b0110001, 0b010, "srl32.u">, + Sched<[]>; +def STAS32 : RVPBinary<0b0100000, 0b011, "stas32">, + Sched<[]>; +def STSA32 : RVPBinary<0b0100001, 0b011, "stsa32">, + Sched<[]>; +def SUB32 : RVPBinary<0b0100001, 0b010, "sub32">, + Sched<[]>; +def UKADD32 : RVPBinary<0b0011000, 0b010, "ukadd32">, + Sched<[]>; +def UKCRAS32 : RVPBinary<0b0011010, 0b010, "ukcras32">, + Sched<[]>; +def UKCRSA32 : RVPBinary<0b0011011, 0b010, "ukcrsa32">, + Sched<[]>; +def UKSTAS32 : RVPBinary<0b0011000, 0b011, "ukstas32">, + Sched<[]>; +def UKSTSA32 : RVPBinary<0b0011001, 0b011, "ukstsa32">, + Sched<[]>; +def UKSUB32 : RVPBinary<0b0011001, 0b010, "uksub32">, + Sched<[]>; +def UMAX32 : RVPBinary<0b1010001, 0b010, "umax32">, + Sched<[]>; +def UMIN32 : RVPBinary<0b1010000, 0b010, "umin32">, + Sched<[]>; +def URADD32 : RVPBinary<0b0010000, 0b010, "uradd32">, + Sched<[]>; +def URCRAS32 : RVPBinary<0b0010010, 0b010, "urcras32">, + Sched<[]>; +def URCRSA32 : RVPBinary<0b0010011, 0b010, "urcrsa32">, + Sched<[]>; +def URSTAS32 : RVPBinary<0b0010000, 0b011, "urstas32">, + Sched<[]>; +def URSTSA32 : RVPBinary<0b0010001, 0b011, "urstsa32">, + Sched<[]>; +def URSUB32 : RVPBinary<0b0010001, 0b010, "ursub32">, + Sched<[]>; +} // Predicates = [HasStdExtZprvsfextra, IsRV64] + +// Ternary Instructions + +let Predicates = [HasStdExtZpn] in { +def KDMABB : RVPTernary<0b1101001, 0b001, "kdmabb">, + Sched<[]>; +def KDMABT : RVPTernary<0b1110001, 0b001, "kdmabt">, + Sched<[]>; +def KDMATT : RVPTernary<0b1111001, 0b001, "kdmatt">, + Sched<[]>; +def KMABB : RVPTernary<0b0101101, 0b001, "kmabb">, + Sched<[]>; +def KMABT : RVPTernary<0b0110101, 0b001, "kmabt">, + Sched<[]>; +def KMATT : RVPTernary<0b0111101, 0b001, "kmatt">, + Sched<[]>; +def KMADA : RVPTernary<0b0100100, 0b001, "kmada">, + Sched<[]>; +def KMAXDA : RVPTernary<0b0100101, 0b001, "kmaxda">, + Sched<[]>; +def KMADS : RVPTernary<0b0101110, 0b001, "kmads">, + Sched<[]>; +def KMADRS : RVPTernary<0b0110110, 0b001, "kmadrs">, + Sched<[]>; +def KMAXDS : RVPTernary<0b0111110, 0b001, "kmaxds">, + Sched<[]>; +def KMMAC : RVPTernary<0b0110000, 0b001, "kmmac">, + Sched<[]>; +def KMMACU : RVPTernary<0b0111000, 0b001, "kmmac.u">, + Sched<[]>; +def KMMAWB : RVPTernary<0b0100011, 0b001, "kmmawb">, + Sched<[]>; +def KMMAWBU : RVPTernary<0b0101011, 0b001, "kmmawb.u">, + Sched<[]>; +def KMMAWB2 : RVPTernary<0b1100111, 0b001, "kmmawb2">, + Sched<[]>; +def KMMAWB2U : RVPTernary<0b1101111, 0b001, "kmmawb2.u">, + Sched<[]>; +def KMMAWT : RVPTernary<0b0110011, 0b001, "kmmawt">, + Sched<[]>; +def KMMAWTU : RVPTernary<0b0111011, 0b001, "kmmawt.u">, + Sched<[]>; +def KMMAWT2 : RVPTernary<0b1110111, 0b001, "kmmawt2">, + Sched<[]>; +def KMMAWT2U : RVPTernary<0b1111111, 0b001, "kmmawt2.u">, + Sched<[]>; +def KMMSB : RVPTernary<0b0100001, 0b001, "kmmsb">, + Sched<[]>; +def KMMSBU : RVPTernary<0b0101001, 0b001, "kmmsb.u">, + Sched<[]>; +def KMSDA : RVPTernary<0b0100110, 0b001, "kmsda">, + Sched<[]>; +def KMSXDA : RVPTernary<0b0100111, 0b001, "kmsxda">, + Sched<[]>; +def MADDR32 : RVPTernary<0b1100010, 0b001, "maddr32">, + Sched<[]>; +def MSUBR32 : RVPTernary<0b1100011, 0b001, "msubr32">, + Sched<[]>; +def PBSADA : RVPTernary<0b1111111, 0b000, "pbsada">, + Sched<[]>; +def SMAQA : RVPTernary<0b1100100, 0b000, "smaqa">, + Sched<[]>; +def SMAQASU : RVPTernary<0b1100101, 0b000, "smaqa.su">, + Sched<[]>; +def UMAQA : RVPTernary<0b1100110, 0b000, "umaqa">, + Sched<[]>; +} // Predicates = [HasStdExtZpn] + +let Predicates = [HasStdExtZprvsfextra, IsRV64] in { +def KDMABB16 : RVPTernary<0b1101100, 0b001, "kdmabb16">, + Sched<[]>; +def KDMABT16 : RVPTernary<0b1110100, 0b001, "kdmabt16">, + Sched<[]>; +def KDMATT16 : RVPTernary<0b1111100, 0b001, "kdmatt16">, + Sched<[]>; +def KMABB32 : RVPTernary<0b0101101, 0b010, "kmabb32">, + Sched<[]>; +def KMABT32 : RVPTernary<0b0110101, 0b010, "kmabt32">, + Sched<[]>; +def KMATT32 : RVPTernary<0b0111101, 0b010, "kmatt32">, + Sched<[]>; +def KMADA32 : RVPTernary<0b0100100, 0b010, "kmada32">, + Sched<[]>; +def KMAXDA32 : RVPTernary<0b0100101, 0b010, "kmaxda32">, + Sched<[]>; +def KMADS32 : RVPTernary<0b0101110, 0b010, "kmads32">, + Sched<[]>; +def KMADRS32 : RVPTernary<0b0110110, 0b010, "kmadrs32">, + Sched<[]>; +def KMAXDS32 : RVPTernary<0b0111110, 0b010, "kmaxds32">, + Sched<[]>; +def KMSDA32 : RVPTernary<0b0100110, 0b010, "kmsda32">, + Sched<[]>; +def KMSXDA32 : RVPTernary<0b0100111, 0b010, "kmsxda32">, + Sched<[]>; +} // Predicates = [HasStdExtZprvsfextra, IsRV64] + +// Shift Instructions + +let Predicates = [HasStdExtZpn] in { +def KSLLI8 : RVPShiftI3<0b0111110, 0b01, 0b000, "kslli8">, + Sched<[]>; +def SCLIP8 : RVPShiftI3<0b1000110, 0b00, 0b000, "sclip8">, + Sched<[]>; +def SLLI8 : RVPShiftI3<0b0111110, 0b00, 0b000, "slli8">, + Sched<[]>; +def SRAI8 : RVPShiftI3<0b0111100, 0b00, 0b000, "srai8">, + Sched<[]>; +def SRAI8U : RVPShiftI3<0b0111100, 0b01, 0b000, "srai8.u">, + Sched<[]>; +def SRLI8 : RVPShiftI3<0b0111101, 0b00, 0b000, "srli8">, + Sched<[]>; +def SRLI8U : RVPShiftI3<0b0111101, 0b01, 0b000, "srli8.u">, + Sched<[]>; +def UCLIP8 : RVPShiftI3<0b1000110, 0b10, 0b000, "uclip8">, + Sched<[]>; +} // Predicates = [HasStdExtZpn] + +let Predicates = [HasStdExtZpn] in { +def KSLLI16 : RVPShiftI4<0b0111010, 0b1, 0b000, "kslli16">, + Sched<[]>; +def SCLIP16 : RVPShiftI4<0b1000010, 0b0, 0b000, "sclip16">, + Sched<[]>; +def SLLI16 : RVPShiftI4<0b0111010, 0b0, 0b000, "slli16">, + Sched<[]>; +def SRAI16 : RVPShiftI4<0b0111000, 0b0, 0b000, "srai16">, + Sched<[]>; +def SRAI16U : RVPShiftI4<0b0111000, 0b1, 0b000, "srai16.u">, + Sched<[]>; +def SRLI16 : RVPShiftI4<0b0111001, 0b0, 0b000, "srli16">, + Sched<[]>; +def SRLI16U : RVPShiftI4<0b0111001, 0b1, 0b000, "srli16.u">, + Sched<[]>; +def UCLIP16 : RVPShiftI4<0b1000010, 0b1, 0b000, "uclip16">, + Sched<[]>; +} // Predicates = [HasStdExtZpn] + +let Predicates = [HasStdExtZpn] in { +def KSLLIW : RVPShiftI5<0b0011011, 0b001, "kslliw">, + Sched<[]>; +def SCLIP32 : RVPShiftI5<0b1110010, 0b000, "sclip32">, + Sched<[]>; +def UCLIP32 : RVPShiftI5<0b1111010, 0b000, "uclip32">, + Sched<[]>; +} // Predicates = [HasStdExtZpn] + +let Predicates = [HasStdExtZprvsfextra, IsRV64] in { +def KSLLI32 : RVPShiftI5<0b1000010, 0b010, "kslli32">, + Sched<[]>; +def SLLI32 : RVPShiftI5<0b0111010, 0b010, "slli32">, + Sched<[]>; +def SRAI32 : RVPShiftI5<0b0111000, 0b010, "srai32">, + Sched<[]>; +def SRAI32U : RVPShiftI5<0b1000000, 0b010, "srai32.u">, + Sched<[]>; +def SRAIWU : RVPShiftI5<0b0011010, 0b001, "sraiw.u">, + Sched<[]>; +def SRLI32 : RVPShiftI5<0b0111001, 0b010, "srli32">, + Sched<[]>; +def SRLI32U : RVPShiftI5<0b1000001, 0b010, "srli32.u">, + Sched<[]>; +} // Predicates = [HasStdExtZprvsfextra, IsRV64] + +let Predicates = [HasStdExtZpn] in { +def SRAIU : RVPShiftUImmLog2XLen<0b110101, 0b001, "srai.u">, + Sched<[]>; +def BITREVI : RVPShiftUImmLog2XLen<0b111010, 0b000, "bitrevi">, + Sched<[]>; +} // Predicates = [HasStdExtZpn] + +let Predicates = [HasStdExtZpn] in +def BPICK : RVPBPICK<0b11, 0b010, "bpick">, + Sched<[]>; + +let Predicates = [HasStdExtZpn] in +def INSB : RVPINSB<0b1010110, 0b00, 0b000, "insb">, + Sched<[]>; + +// 64-bit Instructions + +defm ADD64 : RVPALU64<0b1100000, 0b001, "add64">, + Sched<[]>; +defm KADD64 : RVPALU64<0b1001000, 0b001, "kadd64">, + Sched<[]>; +defm KSUB64 : RVPALU64<0b1001001, 0b001, "ksub64">, + Sched<[]>; +defm RADD64 : RVPALU64<0b1000000, 0b001, "radd64">, + Sched<[]>; +defm RSUB64 : RVPALU64<0b1000001, 0b001, "rsub64">, + Sched<[]>; +defm SUB64 : RVPALU64<0b1100001, 0b001, "sub64">, + Sched<[]>; +defm UKADD64 : RVPALU64<0b1011000, 0b001, "ukadd64">, + Sched<[]>; +defm UKSUB64 : RVPALU64<0b1011001, 0b001, "uksub64">, + Sched<[]>; +defm URADD64 : RVPALU64<0b1010000, 0b001, "uradd64">, + Sched<[]>; +defm URSUB64 : RVPALU64<0b1010001, 0b001, "ursub64">, + Sched<[]>; + +defm SMAL : RVPSMAL64<0b0101111, 0b001, "smal">, + Sched<[]>; + +defm MULR64 : RVPMUL64<0b1111000, 0b001, "mulr64">, + Sched<[]>; +defm MULSR64 : RVPMUL64<0b1110000, 0b001, "mulsr64">, + Sched<[]>; +defm SMUL8 : RVPMUL64<0b1010100, 0b000, "smul8">, + Sched<[]>; +defm SMULX8 : RVPMUL64<0b1010101, 0b000, "smulx8">, + Sched<[]>; +defm SMUL16 : RVPMUL64<0b1010000, 0b000, "smul16">, + Sched<[]>; +defm SMULX16 : RVPMUL64<0b1010001, 0b000, "smulx16">, + Sched<[]>; +defm UMUL8 : RVPMUL64<0b1011100, 0b000, "umul8">, + Sched<[]>; +defm UMULX8 : RVPMUL64<0b1011101, 0b000, "umulx8">, + Sched<[]>; +defm UMUL16 : RVPMUL64<0b1011000, 0b000, "umul16">, + Sched<[]>; +defm UMULX16 : RVPMUL64<0b1011001, 0b000, "umulx16">, + Sched<[]>; + +defm KMAR64 : RVPMA64<0b1001010, 0b001, "kmar64">, + Sched<[]>; +defm KMSR64 : RVPMA64<0b1001011, 0b001, "kmsr64">, + Sched<[]>; +defm SMALBB : RVPMA64<0b1000100, 0b001, "smalbb">, + Sched<[]>; +defm SMALBT : RVPMA64<0b1001100, 0b001, "smalbt">, + Sched<[]>; +defm SMALTT : RVPMA64<0b1010100, 0b001, "smaltt">, + Sched<[]>; +defm SMALDA : RVPMA64<0b1000110, 0b001, "smalda">, + Sched<[]>; +defm SMALXDA : RVPMA64<0b1001110, 0b001, "smalxda">, + Sched<[]>; +defm SMALDS : RVPMA64<0b1000101, 0b001, "smalds">, + Sched<[]>; +defm SMALDRS : RVPMA64<0b1001101, 0b001, "smaldrs">, + Sched<[]>; +defm SMALXDS : RVPMA64<0b1010101, 0b001, "smalxds">, + Sched<[]>; +defm SMAR64 : RVPMA64<0b1000010, 0b001, "smar64">, + Sched<[]>; +defm SMSLDA : RVPMA64<0b1010110, 0b001, "smslda">, + Sched<[]>; +defm SMSLXDA : RVPMA64<0b1011110, 0b001, "smslxda">, + Sched<[]>; +defm SMSR64 : RVPMA64<0b1000011, 0b001, "smsr64">, + Sched<[]>; +defm UKMAR64 : RVPMA64<0b1011010, 0b001, "ukmar64">, + Sched<[]>; +defm UKMSR64 : RVPMA64<0b1011011, 0b001, "ukmsr64">, + Sched<[]>; +defm UMAR64 : RVPMA64<0b1010010, 0b001, "umar64">, + Sched<[]>; +defm UMSR64 : RVPMA64<0b1010011, 0b001, "umsr64">, + Sched<[]>; + +defm WEXT : RVPWEXT<0b1100111, 0b000, "wext">, + Sched<[]>; + +defm WEXTI : RVPWEXTI<0b1101111, 0b000, "wexti">, + Sched<[]>; + +//===----------------------------------------------------------------------===// +// Assembler Pseudo Instructions +//===----------------------------------------------------------------------===// + +let EmitPriority = 2, Predicates = [HasStdExtZpn] in { +def : InstAlias<"rdov $rd", (CSRRS GPR:$rd, 0x009, X0)>; +def : InstAlias<"clrov", (CSRRCI X0, 0x009, 1)>; +} diff --git a/llvm/lib/Target/RISCV/RISCVRegisterInfo.td b/llvm/lib/Target/RISCV/RISCVRegisterInfo.td --- a/llvm/lib/Target/RISCV/RISCVRegisterInfo.td +++ b/llvm/lib/Target/RISCV/RISCVRegisterInfo.td @@ -66,6 +66,9 @@ def sub_vrm4_0 : SubRegIndex<256, -1>; def sub_vrm4_1 : SubRegIndex<256, -1>; +def sub_lo : SubRegIndex<32>; +def sub_hi : SubRegIndex<32, 32>; + } // Namespace = "RISCV" // Integer registers @@ -194,6 +197,18 @@ let RegInfos = XLenRI; } +def GPRPairs : RegisterTuples<[sub_lo, sub_hi], + [(add X2, X4, X6, X8, X10, + X12, X14, X16, X18, X20, + X22, X24, X26, X28, X30), + (add X3, X5, X7, X9, X11, + X13, X15, X17, X19, X21, + X23, X25, X27, X29, X31)]>; + +def GPRPair : RegisterClass<"RISCV", [untyped], 64, (add GPRPairs)> { + let Size = 64; +} + // Floating point registers let RegAltNameIndices = [ABIRegAltName] in { def F0_H : RISCVReg16<0, "f0", ["ft0"]>, DwarfRegNum<[32]>; diff --git a/llvm/lib/Target/RISCV/RISCVSubtarget.h b/llvm/lib/Target/RISCV/RISCVSubtarget.h --- a/llvm/lib/Target/RISCV/RISCVSubtarget.h +++ b/llvm/lib/Target/RISCV/RISCVSubtarget.h @@ -51,6 +51,10 @@ bool HasStdExtZbs = false; bool HasStdExtZbt = false; bool HasStdExtZbproposedc = false; + bool HasStdExtP = false; + bool HasStdExtZpsfoperand = false; + bool HasStdExtZpn = false; + bool HasStdExtZprvsfextra = false; bool HasStdExtV = false; bool HasStdExtZvlsseg = false; bool HasStdExtZvamo = false; @@ -118,6 +122,10 @@ bool hasStdExtZbs() const { return HasStdExtZbs; } bool hasStdExtZbt() const { return HasStdExtZbt; } bool hasStdExtZbproposedc() const { return HasStdExtZbproposedc; } + bool hasStdExtP() const { return HasStdExtP; } + bool hasStdExtZpsfoperand() const { return HasStdExtZpsfoperand; } + bool hasStdExtZpn() const { return HasStdExtZpn; } + bool hasStdExtZprvsfextra() const { return HasStdExtZprvsfextra; } bool hasStdExtV() const { return HasStdExtV; } bool hasStdExtZvlsseg() const { return HasStdExtZvlsseg; } bool hasStdExtZvamo() const { return HasStdExtZvamo; } diff --git a/llvm/test/MC/RISCV/rvp/non-simd.s b/llvm/test/MC/RISCV/rvp/non-simd.s new file mode 100644 --- /dev/null +++ b/llvm/test/MC/RISCV/rvp/non-simd.s @@ -0,0 +1,285 @@ +# With P extension: +# RUN: llvm-mc -triple=riscv32 -show-encoding --mattr=+experimental-p %s \ +# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +# RUN: not llvm-mc -triple=riscv32 -show-encoding %s 2>&1 \ +# RUN: | FileCheck %s --check-prefix=CHECK-ERROR +# RUN: llvm-mc -triple=riscv32 -filetype=obj --mattr=+experimental-p %s \ +# RUN: | llvm-objdump -d --mattr=+experimental-p - \ +# RUN: | FileCheck %s --check-prefix=CHECK-INST +# RUN: llvm-mc -triple=riscv32 -filetype=obj --mattr=+experimental-p %s \ +# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +# RUN: llvm-mc -triple=riscv64 -show-encoding --mattr=+experimental-p %s \ +# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +# RUN: not llvm-mc -triple=riscv64 -show-encoding %s 2>&1 \ +# RUN: | FileCheck %s --check-prefix=CHECK-ERROR +# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-p %s \ +# RUN: | llvm-objdump -d --mattr=+experimental-p - \ +# RUN: | FileCheck %s --check-prefix=CHECK-INST +# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-p %s \ +# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +# With Zpn extension: +# RUN: llvm-mc -triple=riscv32 -show-encoding --mattr=+experimental-zpn %s \ +# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +# RUN: not llvm-mc -triple=riscv32 -show-encoding %s 2>&1 \ +# RUN: | FileCheck %s --check-prefix=CHECK-ERROR +# RUN: llvm-mc -triple=riscv32 -filetype=obj --mattr=+experimental-zpn %s \ +# RUN: | llvm-objdump -d --mattr=+experimental-zpn - \ +# RUN: | FileCheck %s --check-prefix=CHECK-INST +# RUN: llvm-mc -triple=riscv32 -filetype=obj --mattr=+experimental-zpn %s \ +# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +# RUN: llvm-mc -triple=riscv64 -show-encoding --mattr=+experimental-zpn %s \ +# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +# RUN: not llvm-mc -triple=riscv64 -show-encoding %s 2>&1 \ +# RUN: | FileCheck %s --check-prefix=CHECK-ERROR +# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-zpn %s \ +# RUN: | llvm-objdump -d --mattr=+experimental-zpn - \ +# RUN: | FileCheck %s --check-prefix=CHECK-INST +# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-zpn %s \ +# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +# Non-SIMD Q15 saturation ALU + +# CHECK-INST: kaddh a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x04] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 04 +kaddh a0, a1, a2 + +# CHECK-INST: ksubh a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x06] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 06 +ksubh a0, a1, a2 + +# CHECK-INST: khmbb a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x0c] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 0c +khmbb a0, a1, a2 + +# CHECK-INST: khmbt a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x1c] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 1c +khmbt a0, a1, a2 + +# CHECK-INST: khmtt a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x2c] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 2c +khmtt a0, a1, a2 + +# CHECK-INST: ukaddh a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x14] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 14 +ukaddh a0, a1, a2 + +# CHECK-INST: uksubh a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x16] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 16 +uksubh a0, a1, a2 + +# Non-SIMD Q31 saturation ALU + +# CHECK-INST: kaddw a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x00] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 00 +kaddw a0, a1, a2 + +# CHECK-INST: ukaddw a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x10] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 10 +ukaddw a0, a1, a2 + +# CHECK-INST: ksubw a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x02] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 02 +ksubw a0, a1, a2 + +# CHECK-INST: uksubw a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x12] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 12 +uksubw a0, a1, a2 + +# CHECK-INST: kdmbb a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x0a] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 0a +kdmbb a0, a1, a2 + +# CHECK-INST: kdmbt a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x1a] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 1a +kdmbt a0, a1, a2 + +# CHECK-INST: kdmtt a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x2a] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 2a +kdmtt a0, a1, a2 + +# CHECK-INST: kslraw a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x6e] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 6e +kslraw a0, a1, a2 + +# CHECK-INST: kslraw.u a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x7e] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 7e +kslraw.u a0, a1, a2 + +# CHECK-INST: ksllw a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x26] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 26 +ksllw a0, a1, a2 + +# CHECK-INST: kslliw a0, a1, 31 +# CHECK-ENCODING: [0x77,0x95,0xf5,0x37] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 f5 37 +kslliw a0, a1, 31 + +# CHECK-INST: kdmabb a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0xd2] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 d2 +kdmabb a0, a1, a2 + +# CHECK-INST: kdmabt a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0xe2] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 e2 +kdmabt a0, a1, a2 + +# CHECK-INST: kdmatt a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0xf2] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 f2 +kdmatt a0, a1, a2 + +# CHECK-INST: kabsw a0, a1 +# CHECK-ENCODING: [0x77,0x85,0x45,0xad] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 45 ad +kabsw a0, a1 + +# 32-bit Computation + +# CHECK-INST: raddw a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x20] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 20 +raddw a0, a1, a2 + +# CHECK-INST: uraddw a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x30] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 30 +uraddw a0, a1, a2 + +# CHECK-INST: rsubw a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x22] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 22 +rsubw a0, a1, a2 + +# CHECK-INST: ursubw a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x32] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 32 +ursubw a0, a1, a2 + +# CHECK-INST: maxw a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0xf2] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 f2 +maxw a0, a1, a2 + +# CHECK-INST: minw a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0xf0] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 f0 +minw a0, a1, a2 + +# Overflow/Saturation status manipulation + +# CHECK-INST: rdov a5 +# CHECK-ENCODING: [0xf3,0x27,0x90,0x00] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: f3 27 90 00 csrr a5, vxsat +rdov a5 + +# CHECK-INST: clrov +# CHECK-ENCODING: [0x73,0xf0,0x90,0x00] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 73 f0 90 00 csrci vxsat, 1 +clrov + +# Miscellaneous + +# CHECK-INST: ave a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0xe0] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 e0 +ave a0, a1, a2 + +# CHECK-INST: sra.u a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x24] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 24 +sra.u a0, a1, a2 + +# CHECK-INST: srai.u a0, a1, 9 +# CHECK-ENCODING: [0x77,0x95,0x95,0xd4] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 95 d4 +srai.u a0, a1, 9 + +# CHECK-INST: bitrev a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0xe6] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 e6 +bitrev a0, a1, a2 + +# CHECK-INST: bitrevi a0, a1, 7 +# CHECK-ENCODING: [0x77,0x85,0x75,0xe8] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 75 e8 +bitrevi a0, a1, 7 + +# CHECK-INST: bpick a0, a1, a2, a3 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0xda] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 da +bpick a0, a1, a2, a3 + +# CHECK-INST: insb a0, a1, 3 +# CHECK-ENCODING: [0x77,0x85,0x35,0xac] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 35 ac +insb a0, a1, 3 + +# CHECK-INST: maddr32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0xc4] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 c4 +maddr32 a0, a1, a2 + +# CHECK-INST: msubr32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0xc6] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 c6 +msubr32 a0, a1, a2 diff --git a/llvm/test/MC/RISCV/rvp/partial-simd.s b/llvm/test/MC/RISCV/rvp/partial-simd.s new file mode 100644 --- /dev/null +++ b/llvm/test/MC/RISCV/rvp/partial-simd.s @@ -0,0 +1,389 @@ +# With P extension: +# RUN: llvm-mc -triple=riscv32 -show-encoding --mattr=+experimental-p %s \ +# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +# RUN: not llvm-mc -triple=riscv32 -show-encoding %s 2>&1 \ +# RUN: | FileCheck %s --check-prefix=CHECK-ERROR +# RUN: llvm-mc -triple=riscv32 -filetype=obj --mattr=+experimental-p %s \ +# RUN: | llvm-objdump -d --mattr=+experimental-p - \ +# RUN: | FileCheck %s --check-prefix=CHECK-INST +# RUN: llvm-mc -triple=riscv32 -filetype=obj --mattr=+experimental-p %s \ +# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +# RUN: llvm-mc -triple=riscv64 -show-encoding --mattr=+experimental-p %s \ +# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +# RUN: not llvm-mc -triple=riscv64 -show-encoding %s 2>&1 \ +# RUN: | FileCheck %s --check-prefix=CHECK-ERROR +# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-p %s \ +# RUN: | llvm-objdump -d --mattr=+experimental-p - \ +# RUN: | FileCheck %s --check-prefix=CHECK-INST +# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-p %s \ +# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +# With Zpn extension: +# RUN: llvm-mc -triple=riscv32 -show-encoding --mattr=+experimental-zpn %s \ +# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +# RUN: not llvm-mc -triple=riscv32 -show-encoding %s 2>&1 \ +# RUN: | FileCheck %s --check-prefix=CHECK-ERROR +# RUN: llvm-mc -triple=riscv32 -filetype=obj --mattr=+experimental-zpn %s \ +# RUN: | llvm-objdump -d --mattr=+experimental-zpn - \ +# RUN: | FileCheck %s --check-prefix=CHECK-INST +# RUN: llvm-mc -triple=riscv32 -filetype=obj --mattr=+experimental-zpn %s \ +# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +# RUN: llvm-mc -triple=riscv64 -show-encoding --mattr=+experimental-zpn %s \ +# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +# RUN: not llvm-mc -triple=riscv64 -show-encoding %s 2>&1 \ +# RUN: | FileCheck %s --check-prefix=CHECK-ERROR +# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-zpn %s \ +# RUN: | llvm-objdump -d --mattr=+experimental-zpn - \ +# RUN: | FileCheck %s --check-prefix=CHECK-INST +# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-zpn %s \ +# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +# 16-bit Packing + +# CHECK-INST: pkbb16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x0e] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 0e +pkbb16 a0, a1, a2 + +# CHECK-INST: pkbt16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x1e] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 1e +pkbt16 a0, a1, a2 + +# CHECK-INST: pktb16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x3e] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 3e +pktb16 a0, a1, a2 + +# CHECK-INST: pktt16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x2e] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 2e +pktt16 a0, a1, a2 + +# Signed MSW 32x32 Multiply and Add + +# CHECK-INST: smmul a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x40] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 40 +smmul a0, a1, a2 + +# CHECK-INST: smmul.u a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x50] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 50 +smmul.u a0, a1, a2 + +# CHECK-INST: kmmac a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x60] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 60 +kmmac a0, a1, a2 + +# CHECK-INST: kmmac.u a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x70] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 70 +kmmac.u a0, a1, a2 + +# CHECK-INST: kmmsb a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x42] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 42 +kmmsb a0, a1, a2 + +# CHECK-INST: kmmsb.u a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x52] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 52 +kmmsb.u a0, a1, a2 + +# CHECK-INST: kwmmul a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x62] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 62 +kwmmul a0, a1, a2 + +# CHECK-INST: kwmmul.u a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x72] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 72 +kwmmul.u a0, a1, a2 + +# Signed MSW 32x16 Multiply and Add + +# CHECK-INST: smmwb a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x44] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 44 +smmwb a0, a1, a2 + +# CHECK-INST: smmwb.u a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x54] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 54 +smmwb.u a0, a1, a2 + +# CHECK-INST: smmwt a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x64] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 64 +smmwt a0, a1, a2 + +# CHECK-INST: smmwt.u a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x74] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 74 +smmwt.u a0, a1, a2 + +# CHECK-INST: kmmawb a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x46] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 46 +kmmawb a0, a1, a2 + +# CHECK-INST: kmmawb.u a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x56] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 56 +kmmawb.u a0, a1, a2 + +# CHECK-INST: kmmawt a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x66] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 66 +kmmawt a0, a1, a2 + +# CHECK-INST: kmmawt.u a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x76] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 76 +kmmawt.u a0, a1, a2 + +# CHECK-INST: kmmwb2 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x8e] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 8e +kmmwb2 a0, a1, a2 + +# CHECK-INST: kmmwb2.u a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x9e] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 9e +kmmwb2.u a0, a1, a2 + +# CHECK-INST: kmmwt2 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0xae] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 ae +kmmwt2 a0, a1, a2 + +# CHECK-INST: kmmwt2.u a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0xbe] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 be +kmmwt2.u a0, a1, a2 + +# CHECK-INST: kmmawb2 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0xce] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 ce +kmmawb2 a0, a1, a2 + +# CHECK-INST: kmmawb2.u a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0xde] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 de +kmmawb2.u a0, a1, a2 + +# CHECK-INST: kmmawt2 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0xee] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 ee +kmmawt2 a0, a1, a2 + +# CHECK-INST: kmmawt2.u a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0xfe] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 fe +kmmawt2.u a0, a1, a2 + +# Signed 16-bit Multiply with 32-bit Add/Subtract + +# CHECK-INST: smbb16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x08] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 08 +smbb16 a0, a1, a2 + +# CHECK-INST: smbt16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x18] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 18 +smbt16 a0, a1, a2 + +# CHECK-INST: smtt16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x28] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 28 +smtt16 a0, a1, a2 + +# CHECK-INST: kmda a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x38] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 38 +kmda a0, a1, a2 + +# CHECK-INST: kmxda a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x3a] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 3a +kmxda a0, a1, a2 + +# CHECK-INST: smds a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x58] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 58 +smds a0, a1, a2 + +# CHECK-INST: smdrs a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x68] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 68 +smdrs a0, a1, a2 + +# CHECK-INST: smxds a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x78] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 78 +smxds a0, a1, a2 + +# CHECK-INST: kmabb a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x5a] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 5a +kmabb a0, a1, a2 + +# CHECK-INST: kmabt a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x6a] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 6a +kmabt a0, a1, a2 + +# CHECK-INST: kmatt a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x7a] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 7a +kmatt a0, a1, a2 + +# CHECK-INST: kmada a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x48] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 48 +kmada a0, a1, a2 + +# CHECK-INST: kmaxda a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x4a] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 4a +kmaxda a0, a1, a2 + +# CHECK-INST: kmads a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x5c] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 5c +kmads a0, a1, a2 + +# CHECK-INST: kmadrs a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x6c] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 6c +kmadrs a0, a1, a2 + +# CHECK-INST: kmaxds a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x7c] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 7c +kmaxds a0, a1, a2 + +# CHECK-INST: kmsda a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x4c] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 4c +kmsda a0, a1, a2 + +# CHECK-INST: kmsxda a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0x4e] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 4e +kmsxda a0, a1, a2 + +# Miscellaneous + +# CHECK-INST: sclip32 a0, a1, 21 +# CHECK-ENCODING: [0x77,0x85,0x55,0xe5] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 55 e5 +sclip32 a0, a1, 21 + +# CHECK-INST: uclip32 a0, a1, 19 +# CHECK-ENCODING: [0x77,0x85,0x35,0xf5] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 35 f5 +uclip32 a0, a1, 19 + +# CHECK-INST: clrs32 a0, a1 +# CHECK-ENCODING: [0x77,0x85,0x85,0xaf] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 85 af +clrs32 a0, a1 + +# CHECK-INST: clz32 a0, a1 +# CHECK-ENCODING: [0x77,0x85,0x95,0xaf] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 95 af +clz32 a0, a1 + +# CHECK-INST: clo32 a0, a1 +# CHECK-ENCODING: [0x77,0x85,0xb5,0xaf] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 b5 af +clo32 a0, a1 + +# CHECK-INST: pbsad a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0xfc] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 fc +pbsad a0, a1, a2 + +# CHECK-INST: pbsada a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0xfe] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 fe +pbsada a0, a1, a2 + +# 8-bit Multiply with 32-bit Add + +# CHECK-INST: smaqa a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0xc8] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 c8 +smaqa a0, a1, a2 + +# CHECK-INST: umaqa a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0xcc] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 cc +umaqa a0, a1, a2 + +# CHECK-INST: smaqa.su a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0xca] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 ca +smaqa.su a0, a1, a2 diff --git a/llvm/test/MC/RISCV/rvp/rv32p-invalid.s b/llvm/test/MC/RISCV/rvp/rv32p-invalid.s new file mode 100644 --- /dev/null +++ b/llvm/test/MC/RISCV/rvp/rv32p-invalid.s @@ -0,0 +1,77 @@ +# RUN: not llvm-mc -triple riscv32 -mattr=+experimental-p < %s 2>&1 \ +# RUN: | FileCheck %s --check-prefix=CHECK-ERROR + +# 16-bit shift + +# CHECK-ERROR: immediate must be an integer in the range [0, 15] +srai16 a0, a1, 21 + +# CHECK-ERROR: immediate must be an integer in the range [0, 15] +srai16.u a0, a1, 21 + +# CHECK-ERROR: immediate must be an integer in the range [0, 15] +srli16 a0, a1, 21 + +# CHECK-ERROR: immediate must be an integer in the range [0, 15] +srli16.u a0, a1, 21 + +# CHECK-ERROR: immediate must be an integer in the range [0, 15] +slli16 a0, a1, 21 + +# CHECK-ERROR: immediate must be an integer in the range [0, 15] +kslli16 a0, a1, 21 + +# 8-bit shift + +# CHECK-ERROR: immediate must be an integer in the range [0, 7] +srai8 a0, a1, 8 + +# CHECK-ERROR: immediate must be an integer in the range [0, 7] +srai8.u a0, a1, 9 + +# CHECK-ERROR: immediate must be an integer in the range [0, 7] +srli8 a0, a1, 8 + +# CHECK-ERROR: immediate must be an integer in the range [0, 7] +srli8.u a0, a1, 9 + +# CHECK-ERROR: immediate must be an integer in the range [0, 7] +slli8 a0, a1, 8 + +# CHECK-ERROR: immediate must be an integer in the range [0, 7] +kslli8 a0, a1, 9 + +# Misc + +# CHECK-ERROR: immediate must be an integer in the range [0, 7] +sclip8 a0, a1, 8 + +# CHECK-ERROR: immediate must be an integer in the range [0, 7] +uclip8 a0, a1, 8 + +# CHECK-ERROR: immediate must be an integer in the range [0, 15] +sclip16 a0, a1, 21 + +# CHECK-ERROR: immediate must be an integer in the range [0, 15] +uclip16 a0, a1, 21 + +# CHECK-ERROR: immediate must be an integer in the range [0, 31] +sclip32 a0, a1, 37 + +# CHECK-ERROR: immediate must be an integer in the range [0, 31] +uclip32 a0, a1, 37 + +# CHECK-ERROR: immediate must be an integer in the range [0, 31] +kslliw a0, a1, 37 + +# CHECK-ERROR: immediate must be an integer in the range [0, 31] +srai.u a0, a1, 35 + +# CHECK-ERROR: immediate must be an integer in the range [0, 31] +bitrevi a0, a1, 35 + +# CHECK-ERROR: immediate must be an integer in the range [0, 3] +insb a0, a1, 5 + +# CHECK-ERROR: immediate must be an integer in the range [0, 31] +wexti a0, a2, 33 diff --git a/llvm/test/MC/RISCV/rvp/rv32zpsfoperand.s b/llvm/test/MC/RISCV/rvp/rv32zpsfoperand.s new file mode 100644 --- /dev/null +++ b/llvm/test/MC/RISCV/rvp/rv32zpsfoperand.s @@ -0,0 +1,271 @@ +# RUN: llvm-mc -triple=riscv32 -show-encoding --mattr=+experimental-zpsfoperand %s \ +# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +# RUN: not llvm-mc -triple=riscv32 -show-encoding %s 2>&1 \ +# RUN: | FileCheck %s --check-prefix=CHECK-ERROR +# RUN: llvm-mc -triple=riscv32 -filetype=obj --mattr=+experimental-zpsfoperand %s \ +# RUN: | llvm-objdump -d --mattr=+experimental-zpsfoperand - \ +# RUN: | FileCheck %s --check-prefix=CHECK-INST +# RUN: llvm-mc -triple=riscv32 -filetype=obj --mattr=+experimental-zpsfoperand %s \ +# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +# Signed 16-bit Multiply with 64-bit Add/Subtract + +# CHECK-INST: smal a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0x5e] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 5e +smal a0, a2, a4 + +# SIMD 64-bit Add/Subtract + +# CHECK-INST: add64 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0xc0] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 c0 +add64 a0, a2, a4 + +# CHECK-INST: kadd64 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0x90] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 90 +kadd64 a0, a2, a4 + +# CHECK-INST: ksub64 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0x92] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 92 +ksub64 a0, a2, a4 + +# CHECK-INST: radd64 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0x80] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 80 +radd64 a0, a2, a4 + +# CHECK-INST: rsub64 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0x82] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 82 +rsub64 a0, a2, a4 + +# CHECK-INST: sub64 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0xc2] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 c2 +sub64 a0, a2, a4 + +# CHECK-INST: ukadd64 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0xb0] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 b0 +ukadd64 a0, a2, a4 + +# CHECK-INST: uksub64 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0xb2] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 b2 +uksub64 a0, a2, a4 + +# CHECK-INST: uradd64 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0xa0] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 a0 +uradd64 a0, a2, a4 + +# CHECK-INST: ursub64 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0xa2] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 a2 +ursub64 a0, a2, a4 + +# 32-bit Multiply 64-bit Add/Subtract + +# CHECK-INST: smar64 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0x84] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 84 +smar64 a0, a2, a4 + +# CHECK-INST: smsr64 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0x86] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 86 +smsr64 a0, a2, a4 + +# CHECK-INST: umar64 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0xa4] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 a4 +umar64 a0, a2, a4 + +# CHECK-INST: umsr64 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0xa6] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 a6 +umsr64 a0, a2, a4 + +# CHECK-INST: kmar64 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0x94] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 94 +kmar64 a0, a2, a4 + +# CHECK-INST: kmsr64 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0x96] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 96 +kmsr64 a0, a2, a4 + +# CHECK-INST: ukmar64 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0xb4] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 b4 +ukmar64 a0, a2, a4 + +# CHECK-INST: ukmsr64 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0xb6] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 b6 +ukmsr64 a0, a2, a4 + +# Signed 16-bit Multiply 64-bit Add/Subtract + +# CHECK-INST: smalbb a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0x88] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 88 +smalbb a0, a2, a4 + +# CHECK-INST: smalbt a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0x98] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 98 +smalbt a0, a2, a4 + +# CHECK-INST: smaltt a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0xa8] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 a8 +smaltt a0, a2, a4 + +# CHECK-INST: smalda a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0x8c] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 8c +smalda a0, a2, a4 + +# CHECK-INST: smalxda a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0x9c] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 9c +smalxda a0, a2, a4 + +# CHECK-INST: smalds a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0x8a] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 8a +smalds a0, a2, a4 + +# CHECK-INST: smaldrs a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0x9a] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 9a +smaldrs a0, a2, a4 + +# CHECK-INST: smalxds a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0xaa] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 aa +smalxds a0, a2, a4 + +# CHECK-INST: smslda a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0xac] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 ac +smslda a0, a2, a4 + +# CHECK-INST: smslxda a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0xbc] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 bc +smslxda a0, a2, a4 + +# 32-bit Computation + +# CHECK-INST: mulr64 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0xf0] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 f0 +mulr64 a0, a2, a4 + +# CHECK-INST: mulsr64 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0xe0] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 e0 +mulsr64 a0, a2, a4 + +# SIMD 16-bit Multiply + +# CHECK-INST: smul16 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x05,0xe6,0xa0] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 05 e6 a0 +smul16 a0, a2, a4 + +# CHECK-INST: smulx16 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x05,0xe6,0xa2] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 05 e6 a2 +smulx16 a0, a2, a4 + +# CHECK-INST: umul16 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x05,0xe6,0xb0] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 05 e6 b0 +umul16 a0, a2, a4 + +# CHECK-INST: umulx16 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x05,0xe6,0xb2] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 05 e6 b2 +umulx16 a0, a2, a4 + +# SIMD 8-bit Multiply + +# CHECK-INST: smul8 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x05,0xe6,0xa8] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 05 e6 a8 +smul8 a0, a2, a4 + +# CHECK-INST: smulx8 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x05,0xe6,0xaa] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 05 e6 aa +smulx8 a0, a2, a4 + +# CHECK-INST: umul8 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x05,0xe6,0xb8] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 05 e6 b8 +umul8 a0, a2, a4 + +# CHECK-INST: umulx8 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x05,0xe6,0xba] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 05 e6 ba +umulx8 a0, a2, a4 + +# Miscellaneous + +# CHECK-INST: wext a0, a2, a4 +# CHECK-ENCODING: [0x77,0x05,0xe6,0xce] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 05 e6 ce +wext a0, a2, a4 + +# CHECK-INST: wexti a0, a2, 7 +# CHECK-ENCODING: [0x77,0x05,0x76,0xde] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 05 76 de +wexti a0, a2, 7 diff --git a/llvm/test/MC/RISCV/rvp/rv64p-invalid.s b/llvm/test/MC/RISCV/rvp/rv64p-invalid.s new file mode 100644 --- /dev/null +++ b/llvm/test/MC/RISCV/rvp/rv64p-invalid.s @@ -0,0 +1,97 @@ +# RUN: not llvm-mc -triple riscv64 -mattr=+experimental-p < %s 2>&1 \ +# RUN: | FileCheck %s --check-prefix=CHECK-ERROR + +# 16-bit shift + +# CHECK-ERROR: immediate must be an integer in the range [0, 15] +srai16 a0, a1, 21 + +# CHECK-ERROR: immediate must be an integer in the range [0, 15] +srai16.u a0, a1, 21 + +# CHECK-ERROR: immediate must be an integer in the range [0, 15] +srli16 a0, a1, 21 + +# CHECK-ERROR: immediate must be an integer in the range [0, 15] +srli16.u a0, a1, 21 + +# CHECK-ERROR: immediate must be an integer in the range [0, 15] +slli16 a0, a1, 21 + +# CHECK-ERROR: immediate must be an integer in the range [0, 15] +kslli16 a0, a1, 21 + +# 8-bit shift + +# CHECK-ERROR: immediate must be an integer in the range [0, 7] +srai8 a0, a1, 8 + +# CHECK-ERROR: immediate must be an integer in the range [0, 7] +srai8.u a0, a1, 9 + +# CHECK-ERROR: immediate must be an integer in the range [0, 7] +srli8 a0, a1, 8 + +# CHECK-ERROR: immediate must be an integer in the range [0, 7] +srli8.u a0, a1, 9 + +# CHECK-ERROR: immediate must be an integer in the range [0, 7] +slli8 a0, a1, 8 + +# CHECK-ERROR: immediate must be an integer in the range [0, 7] +kslli8 a0, a1, 9 + +# Misc + +# CHECK-ERROR: immediate must be an integer in the range [0, 7] +sclip8 a0, a1, 8 + +# CHECK-ERROR: immediate must be an integer in the range [0, 7] +uclip8 a0, a1, 8 + +# CHECK-ERROR: immediate must be an integer in the range [0, 15] +sclip16 a0, a1, 21 + +# CHECK-ERROR: immediate must be an integer in the range [0, 15] +uclip16 a0, a1, 21 + +# CHECK-ERROR: immediate must be an integer in the range [0, 31] +sclip32 a0, a1, 37 + +# CHECK-ERROR: immediate must be an integer in the range [0, 31] +uclip32 a0, a1, 37 + +# CHECK-ERROR: immediate must be an integer in the range [0, 31] +kslliw a0, a1, 37 + +# CHECK-ERROR: immediate must be an integer in the range [0, 63] +srai.u a0, a1, 70 + +# CHECK-ERROR: immediate must be an integer in the range [0, 63] +bitrevi a0, a1, 70 + +# CHECK-ERROR: immediate must be an integer in the range [0, 7] +insb a0, a1, 11 + +# CHECK-ERROR: immediate must be an integer in the range [0, 31] +wexti a0, a1, 33 + +# RV64 only + +# CHECK-ERROR: immediate must be an integer in the range [0, 31] +srai32 a0, a1, 37 + +# CHECK-ERROR: immediate must be an integer in the range [0, 31] +srai32.u a0, a1, 37 + +# CHECK-ERROR: immediate must be an integer in the range [0, 31] +srli32 a0, a1, 37 + +# CHECK-ERROR: immediate must be an integer in the range [0, 31] +srli32.u a0, a1, 37 + +# CHECK-ERROR: immediate must be an integer in the range [0, 31] +slli32 a0, a1, 37 + +# CHECK-ERROR: immediate must be an integer in the range [0, 31] +kslli32 a0, a1, 37 diff --git a/llvm/test/MC/RISCV/rvp/rv64p.s b/llvm/test/MC/RISCV/rvp/rv64p.s new file mode 100644 --- /dev/null +++ b/llvm/test/MC/RISCV/rvp/rv64p.s @@ -0,0 +1,525 @@ +# With P extension: +# RUN: llvm-mc -triple=riscv64 -show-encoding --mattr=+experimental-p %s \ +# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +# RUN: not llvm-mc -triple=riscv64 -show-encoding %s 2>&1 \ +# RUN: | FileCheck %s --check-prefix=CHECK-ERROR +# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-p %s \ +# RUN: | llvm-objdump -d --mattr=+experimental-p - \ +# RUN: | FileCheck %s --check-prefix=CHECK-INST +# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-p %s \ +# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +# With Zprvsfextra extension: +# RUN: llvm-mc -triple=riscv64 -show-encoding --mattr=+experimental-p %s \ +# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +# RUN: not llvm-mc -triple=riscv64 -show-encoding %s 2>&1 \ +# RUN: | FileCheck %s --check-prefix=CHECK-ERROR +# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-p %s \ +# RUN: | llvm-objdump -d --mattr=+experimental-p - \ +# RUN: | FileCheck %s --check-prefix=CHECK-INST +# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-p %s \ +# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +# RV64P only + +# SIMD 32-bit Add/Subtract + +# CHECK-INST: add32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x40] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 40 +add32 a0, a1, a2 + +# CHECK-INST: radd32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x00] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 00 +radd32 a0, a1, a2 + +# CHECK-INST: uradd32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x20] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 20 +uradd32 a0, a1, a2 + +# CHECK-INST: add32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x10] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 10 +kadd32 a0, a1, a2 + +# CHECK-INST: add32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x30] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 30 +ukadd32 a0, a1, a2 + +# CHECK-INST: sub32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x42] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 42 +sub32 a0, a1, a2 + +# CHECK-INST: rsub32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x02] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 02 +rsub32 a0, a1, a2 + +# CHECK-INST: ursub32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x22] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 22 +ursub32 a0, a1, a2 + +# CHECK-INST: sub32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x12] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 12 +ksub32 a0, a1, a2 + +# CHECK-INST: sub32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x32] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 32 +uksub32 a0, a1, a2 + +# CHECK-INST: cras32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x44] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 44 +cras32 a0, a1, a2 + +# CHECK-INST: rcras32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x04] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 04 +rcras32 a0, a1, a2 + +# CHECK-INST: urcras32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x24] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 24 +urcras32 a0, a1, a2 + +# CHECK-INST: kcras32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x14] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 14 +kcras32 a0, a1, a2 + +# CHECK-INST: ukcras32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x34] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 34 +ukcras32 a0, a1, a2 + +# CHECK-INST: crsa32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x46] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 46 +crsa32 a0, a1, a2 + +# CHECK-INST: rcrsa32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x06] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 06 +rcrsa32 a0, a1, a2 + +urcrsa32 a0, a1, a2 +# CHECK-INST: urcrsa32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x26] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 26 + +# CHECK-INST: kcrsa32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x16] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 16 +kcrsa32 a0, a1, a2 + +# CHECK-INST: ukcrsa32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x36] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 36 +ukcrsa32 a0, a1, a2 + +# CHECK-INST: stas32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xb5,0xc5,0x40] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 b5 c5 40 +stas32 a0, a1, a2 + +# CHECK-INST: rstas32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xb5,0xc5,0x00] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 b5 c5 00 +rstas32 a0, a1, a2 + +# CHECK-INST: urstas32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xb5,0xc5,0x20] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 b5 c5 20 +urstas32 a0, a1, a2 + +# CHECK-INST: kstas32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xb5,0xc5,0x10] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 b5 c5 10 +kstas32 a0, a1, a2 + +# CHECK-INST: ukstas32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xb5,0xc5,0x30] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 b5 c5 30 +ukstas32 a0, a1, a2 + +# CHECK-INST: stsa32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xb5,0xc5,0x42] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 b5 c5 42 +stsa32 a0, a1, a2 + +# CHECK-INST: rstsa32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xb5,0xc5,0x02] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 b5 c5 02 +rstsa32 a0, a1, a2 + +# CHECK-INST: urstsa32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xb5,0xc5,0x22] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 b5 c5 22 +urstsa32 a0, a1, a2 + +# CHECK-INST: kstsa32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xb5,0xc5,0x12] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 b5 c5 12 +kstsa32 a0, a1, a2 + +# CHECK-INST: ukstsa32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xb5,0xc5,0x32] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 b5 c5 32 +ukstsa32 a0, a1, a2 + +# SIMD 32-bit Shift + +# CHECK-INST: sra32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x50] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 50 +sra32 a0, a1, a2 + +# CHECK-INST: srai32 a0, a1, 19 +# CHECK-ENCODING: [0x77,0xa5,0x35,0x71] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 35 71 +srai32 a0, a1, 19 + +# CHECK-INST: sra32.u a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x60] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 60 +sra32.u a0, a1, a2 + +# CHECK-INST: srai32.u a0, a1, 16 +# CHECK-ENCODING: [0x77,0xa5,0x05,0x81] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 05 81 +srai32.u a0, a1, 16 + +# CHECK-INST: srl32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x52] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 52 +srl32 a0, a1, a2 + +# CHECK-INST: srli32 a0, a1, 9 +# CHECK-ENCODING: [0x77,0xa5,0x95,0x72] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 95 72 +srli32 a0, a1, 9 + +# CHECK-INST: srl32.u a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x62] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 62 +srl32.u a0, a1, a2 + +# CHECK-INST: srli32.u a0, a1, 15 +# CHECK-ENCODING: [0x77,0xa5,0xf5,0x82] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 f5 82 +srli32.u a0, a1, 15 + +# CHECK-INST: sll32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x54] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 54 +sll32 a0, a1, a2 + +# CHECK-INST: slli32 a0, a1, 23 +# CHECK-ENCODING: [0x77,0xa5,0x75,0x75] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 75 75 +slli32 a0, a1, 23 + +# CHECK-INST: ksll32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x64] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 64 +ksll32 a0, a1, a2 + +# CHECK-INST: kslli32 a0, a1, 29 +# CHECK-ENCODING: [0x77,0xa5,0xd5,0x85] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 d5 85 +kslli32 a0, a1, 29 + +# CHECK-INST: kslra32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x56] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 56 +kslra32 a0, a1, a2 + +# CHECK-INST: kslra32.u a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x66] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 66 +kslra32.u a0, a1, a2 + +# SIMD 32-bit Miscellaneous + +# CHECK-INST: smin32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x90] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 90 +smin32 a0, a1, a2 + +# CHECK-INST: umin32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0xa0] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 a0 +umin32 a0, a1, a2 + +# CHECK-INST: smax32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x92] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 92 +smax32 a0, a1, a2 + +# CHECK-INST: umax32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0xa2] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 a2 +umax32 a0, a1, a2 + +# CHECK-INST: kabs32 a0, a1 +# CHECK-ENCODING: [0x77,0x85,0x25,0xad] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 85 25 ad +kabs32 a0, a1 + +# SIMD Q15 saturating Multiply + +# CHECK-INST: khmbb16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0xdc] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 dc +khmbb16 a0, a1, a2 + +# CHECK-INST: khmbt16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0xec] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 ec +khmbt16 a0, a1, a2 + +# CHECK-INST: khmtt16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0xfc] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 fc +khmtt16 a0, a1, a2 + +# CHECK-INST: kdmbb16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0xda] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 da +kdmbb16 a0, a1, a2 + +# CHECK-INST: kdmbt16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0xea] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 ea +kdmbt16 a0, a1, a2 + +# CHECK-INST: kdmtt16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0xfa] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 fa +kdmtt16 a0, a1, a2 + +# CHECK-INST: kdmabb16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0xd8] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 d8 +kdmabb16 a0, a1, a2 + +# CHECK-INST: kdmabt16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0xe8] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 e8 +kdmabt16 a0, a1, a2 + +# CHECK-INST: kdmatt16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x95,0xc5,0xf8] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 95 c5 f8 +kdmatt16 a0, a1, a2 + +# 32-bit Multiply + +# CHECK-INST: smbb32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x08] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 08 +smbb32 a0, a1, a2 + +# CHECK-INST: smbt32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x18] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 18 +smbt32 a0, a1, a2 + +# CHECK-INST: smtt32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x28] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 28 +smtt32 a0, a1, a2 + +# 32-bit Multiply & Add + +# CHECK-INST: kmabb32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x5a] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 5a +kmabb32 a0, a1, a2 + +# CHECK-INST: kmabt32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x6a] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 6a +kmabt32 a0, a1, a2 + +# CHECK-INST: kmatt32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x7a] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 7a +kmatt32 a0, a1, a2 + +# CHECK-INST: kmda32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x38] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 38 +kmda32 a0, a1, a2 + +# CHECK-INST: kmxda32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x3a] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 3a +kmxda32 a0, a1, a2 + +# CHECK-INST: kmada32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x48] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 48 +kmada32 a0, a1, a2 + +# CHECK-INST: kmaxda32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x4a] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 4a +kmaxda32 a0, a1, a2 + +# CHECK-INST: kmads32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x5c] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 5c +kmads32 a0, a1, a2 + +# CHECK-INST: kmadrs32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x6c] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 6c +kmadrs32 a0, a1, a2 + +# CHECK-INST: kmaxds32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x7c] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 7c +kmaxds32 a0, a1, a2 + +# CHECK-INST: kmsda32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x4c] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 4c +kmsda32 a0, a1, a2 + +# CHECK-INST: kmsxda32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x4e] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 4e +kmsxda32 a0, a1, a2 + +# CHECK-INST: smds32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x58] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 58 +smds32 a0, a1, a2 + +# CHECK-INST: smdrs32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x68] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 68 +smdrs32 a0, a1, a2 + +# CHECK-INST: smxds32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x78] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 78 +smxds32 a0, a1, a2 + +# Non-SIMD 32-bit Shift + +# CHECK-INST: sraiw.u a0, a1, 17 +# CHECK-ENCODING: [0x77,0x95,0x15,0x35] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 95 15 35 +sraiw.u a0, a1, 17 + +# 32-bit Packing + +# CHECK-INST: pkbb32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x0e] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 0e +pkbb32 a0, a1, a2 + +# CHECK-INST: pkbt32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x1e] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 1e +pkbt32 a0, a1, a2 + +# CHECK-INST: pktb32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x3e] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 3e +pktb32 a0, a1, a2 + +# CHECK-INST: pktt32 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xa5,0xc5,0x2e] +# CHECK-ERROR: instruction requires the following: 'Zprvsfextra' (RV64 only 'P' Instructions) +# CHECK-UNKNOWN: 77 a5 c5 2e +pktt32 a0, a1, a2 diff --git a/llvm/test/MC/RISCV/rvp/rv64zpsfoperand.s b/llvm/test/MC/RISCV/rvp/rv64zpsfoperand.s new file mode 100644 --- /dev/null +++ b/llvm/test/MC/RISCV/rvp/rv64zpsfoperand.s @@ -0,0 +1,283 @@ +# With P extension: +# RUN: llvm-mc -triple=riscv64 -show-encoding --mattr=+experimental-p %s \ +# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +# RUN: not llvm-mc -triple=riscv64 -show-encoding %s 2>&1 \ +# RUN: | FileCheck %s --check-prefix=CHECK-ERROR +# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-p %s \ +# RUN: | llvm-objdump -d --mattr=+experimental-p - \ +# RUN: | FileCheck %s --check-prefix=CHECK-INST +# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-p %s \ +# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +# With Zpsfoperand extension: +# RUN: llvm-mc -triple=riscv64 -show-encoding --mattr=+experimental-zpsfoperand %s \ +# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +# RUN: not llvm-mc -triple=riscv64 -show-encoding %s 2>&1 \ +# RUN: | FileCheck %s --check-prefix=CHECK-ERROR +# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-zpsfoperand %s \ +# RUN: | llvm-objdump -d --mattr=+experimental-zpsfoperand - \ +# RUN: | FileCheck %s --check-prefix=CHECK-INST +# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-zpsfoperand %s \ +# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +# Signed 16-bit Multiply with 64-bit Add/Subtract + +# CHECK-INST: smal a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0x5e] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 5e +smal a0, a2, a4 + +# SIMD 64-bit Add/Subtract + +# CHECK-INST: add64 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0xc0] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 c0 +add64 a0, a2, a4 + +# CHECK-INST: kadd64 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0x90] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 90 +kadd64 a0, a2, a4 + +# CHECK-INST: ksub64 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0x92] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 92 +ksub64 a0, a2, a4 + +# CHECK-INST: radd64 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0x80] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 80 +radd64 a0, a2, a4 + +# CHECK-INST: rsub64 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0x82] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 82 +rsub64 a0, a2, a4 + +# CHECK-INST: sub64 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0xc2] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 c2 +sub64 a0, a2, a4 + +# CHECK-INST: ukadd64 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0xb0] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 b0 +ukadd64 a0, a2, a4 + +# CHECK-INST: uksub64 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0xb2] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 b2 +uksub64 a0, a2, a4 + +# CHECK-INST: uradd64 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0xa0] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 a0 +uradd64 a0, a2, a4 + +# CHECK-INST: ursub64 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0xa2] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 a2 +ursub64 a0, a2, a4 + +# 32-bit Multiply 64-bit Add/Subtract + +# CHECK-INST: smar64 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0x84] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 84 +smar64 a0, a2, a4 + +# CHECK-INST: smsr64 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0x86] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 86 +smsr64 a0, a2, a4 + +# CHECK-INST: umar64 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0xa4] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 a4 +umar64 a0, a2, a4 + +# CHECK-INST: umsr64 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0xa6] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 a6 +umsr64 a0, a2, a4 + +# CHECK-INST: kmar64 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0x94] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 94 +kmar64 a0, a2, a4 + +# CHECK-INST: kmsr64 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0x96] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 96 +kmsr64 a0, a2, a4 + +# CHECK-INST: ukmar64 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0xb4] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 b4 +ukmar64 a0, a2, a4 + +# CHECK-INST: ukmsr64 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0xb6] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 b6 +ukmsr64 a0, a2, a4 + +# Signed 16-bit Multiply 64-bit Add/Subtract + +# CHECK-INST: smalbb a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0x88] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 88 +smalbb a0, a2, a4 + +# CHECK-INST: smalbt a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0x98] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 98 +smalbt a0, a2, a4 + +# CHECK-INST: smaltt a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0xa8] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 a8 +smaltt a0, a2, a4 + +# CHECK-INST: smalda a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0x8c] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 8c +smalda a0, a2, a4 + +# CHECK-INST: smalxda a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0x9c] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 9c +smalxda a0, a2, a4 + +# CHECK-INST: smalds a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0x8a] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 8a +smalds a0, a2, a4 + +# CHECK-INST: smaldrs a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0x9a] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 9a +smaldrs a0, a2, a4 + +# CHECK-INST: smalxds a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0xaa] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 aa +smalxds a0, a2, a4 + +# CHECK-INST: smslda a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0xac] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 ac +smslda a0, a2, a4 + +# CHECK-INST: smslxda a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0xbc] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 bc +smslxda a0, a2, a4 + +# 32-bit Computation + +# CHECK-INST: mulr64 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0xf0] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 f0 +mulr64 a0, a2, a4 + +# CHECK-INST: mulsr64 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x15,0xe6,0xe0] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 15 e6 e0 +mulsr64 a0, a2, a4 + +# SIMD 16-bit Multiply + +# CHECK-INST: smul16 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x05,0xe6,0xa0] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 05 e6 a0 +smul16 a0, a2, a4 + +# CHECK-INST: smulx16 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x05,0xe6,0xa2] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 05 e6 a2 +smulx16 a0, a2, a4 + +# CHECK-INST: umul16 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x05,0xe6,0xb0] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 05 e6 b0 +umul16 a0, a2, a4 + +# CHECK-INST: umulx16 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x05,0xe6,0xb2] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 05 e6 b2 +umulx16 a0, a2, a4 + +# SIMD 8-bit Multiply + +# CHECK-INST: smul8 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x05,0xe6,0xa8] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 05 e6 a8 +smul8 a0, a2, a4 + +# CHECK-INST: smulx8 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x05,0xe6,0xaa] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 05 e6 aa +smulx8 a0, a2, a4 + +# CHECK-INST: umul8 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x05,0xe6,0xb8] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 05 e6 b8 +umul8 a0, a2, a4 + +# CHECK-INST: umulx8 a0, a2, a4 +# CHECK-ENCODING: [0x77,0x05,0xe6,0xba] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 05 e6 ba +umulx8 a0, a2, a4 + +# Miscellaneous + +# CHECK-INST: wext a0, a2, a4 +# CHECK-ENCODING: [0x77,0x05,0xe6,0xce] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 05 e6 ce +wext a0, a2, a4 + +# CHECK-INST: wexti a0, a2, 7 +# CHECK-ENCODING: [0x77,0x05,0x76,0xde] +# CHECK-ERROR: instruction requires the following: 'Zpsfoperand' (Paired-register operand 'P' Instructions) +# CHECK-UNKNOWN: 77 05 76 de +wexti a0, a2, 7 diff --git a/llvm/test/MC/RISCV/rvp/simd-alu.s b/llvm/test/MC/RISCV/rvp/simd-alu.s new file mode 100644 --- /dev/null +++ b/llvm/test/MC/RISCV/rvp/simd-alu.s @@ -0,0 +1,285 @@ +# With P extension: +# RUN: llvm-mc -triple=riscv32 -show-encoding --mattr=+experimental-p %s \ +# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +# RUN: not llvm-mc -triple=riscv32 -show-encoding %s 2>&1 \ +# RUN: | FileCheck %s --check-prefix=CHECK-ERROR +# RUN: llvm-mc -triple=riscv32 -filetype=obj --mattr=+experimental-p %s \ +# RUN: | llvm-objdump -d --mattr=+experimental-p - \ +# RUN: | FileCheck %s --check-prefix=CHECK-INST +# RUN: llvm-mc -triple=riscv32 -filetype=obj --mattr=+experimental-p %s \ +# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +# RUN: llvm-mc -triple=riscv64 -show-encoding --mattr=+experimental-p %s \ +# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +# RUN: not llvm-mc -triple=riscv64 -show-encoding %s 2>&1 \ +# RUN: | FileCheck %s --check-prefix=CHECK-ERROR +# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-p %s \ +# RUN: | llvm-objdump -d --mattr=+experimental-p - \ +# RUN: | FileCheck %s --check-prefix=CHECK-INST +# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-p %s \ +# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +# With Zpn extension: +# RUN: llvm-mc -triple=riscv32 -show-encoding --mattr=+experimental-zpn %s \ +# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +# RUN: not llvm-mc -triple=riscv32 -show-encoding %s 2>&1 \ +# RUN: | FileCheck %s --check-prefix=CHECK-ERROR +# RUN: llvm-mc -triple=riscv32 -filetype=obj --mattr=+experimental-zpn %s \ +# RUN: | llvm-objdump -d --mattr=+experimental-zpn - \ +# RUN: | FileCheck %s --check-prefix=CHECK-INST +# RUN: llvm-mc -triple=riscv32 -filetype=obj --mattr=+experimental-zpn %s \ +# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +# RUN: llvm-mc -triple=riscv64 -show-encoding --mattr=+experimental-zpn %s \ +# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +# RUN: not llvm-mc -triple=riscv64 -show-encoding %s 2>&1 \ +# RUN: | FileCheck %s --check-prefix=CHECK-ERROR +# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-zpn %s \ +# RUN: | llvm-objdump -d --mattr=+experimental-zpn - \ +# RUN: | FileCheck %s --check-prefix=CHECK-INST +# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-zpn %s \ +# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +# SIMD 16-bit Add/Subtract + +# CHECK-INST: add16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x40] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 40 +add16 a0, a1, a2 + +# CHECK-INST: radd16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x00] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 00 +radd16 a0, a1, a2 + +# CHECK-INST: uradd16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x20] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 20 +uradd16 a0, a1, a2 + +# CHECK-INST: kadd16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x10] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 10 +kadd16 a0, a1, a2 + +# CHECK-INST: ukadd16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x30] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 30 +ukadd16 a0, a1, a2 + +# CHECK-INST: sub16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x42] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 42 +sub16 a0, a1, a2 + +# CHECK-INST: rsub16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x02] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 02 +rsub16 a0, a1, a2 + +# CHECK-INST: ursub16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x22] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 22 +ursub16 a0, a1, a2 + +# CHECK-INST: ksub16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x12] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 12 +ksub16 a0, a1, a2 + +# CHECK-INST: uksub16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x32] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 32 +uksub16 a0, a1, a2 + +# CHECK-INST: cras16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x44] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 44 +cras16 a0, a1, a2 + +# CHECK-INST: rcras16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x04] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 04 +rcras16 a0, a1, a2 + +# CHECK-INST: urcras16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x24] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 24 +urcras16 a0, a1, a2 + +# CHECK-INST: kcras16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x14] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 14 +kcras16 a0, a1, a2 + +# CHECK-INST: ukcras16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x34] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 34 +ukcras16 a0, a1, a2 + +# CHECK-INST: crsa16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x46] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 46 +crsa16 a0, a1, a2 + +# CHECK-INST: rcrsa16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x06] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 06 +rcrsa16 a0, a1, a2 + +# CHECK-INST: urcrsa16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x26] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 26 +urcrsa16 a0, a1, a2 + +# CHECK-INST: kcrsa16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x16] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 16 +kcrsa16 a0, a1, a2 + +# CHECK-INST: ukcrsa16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x36] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 36 +ukcrsa16 a0, a1, a2 + +# CHECK-INST: stas16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xb5,0xc5,0x44] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 b5 c5 44 +stas16 a0, a1, a2 + +# CHECK-INST: rstas16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xb5,0xc5,0x04] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 b5 c5 04 +rstas16 a0, a1, a2 + +# CHECK-INST: urstas16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xb5,0xc5,0x24] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 b5 c5 24 +urstas16 a0, a1, a2 + +# CHECK-INST: kstas16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xb5,0xc5,0x14] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 b5 c5 14 +kstas16 a0, a1, a2 + +# CHECK-INST: ukstas16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xb5,0xc5,0x34] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 b5 c5 34 +ukstas16 a0, a1, a2 + +# CHECK-INST: stsa16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xb5,0xc5,0x46] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 b5 c5 46 +stsa16 a0, a1, a2 + +# CHECK-INST: rstsa16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xb5,0xc5,0x06] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 b5 c5 06 +rstsa16 a0, a1, a2 + +# CHECK-INST: urstsa16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xb5,0xc5,0x26] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 b5 c5 26 +urstsa16 a0, a1, a2 + +# CHECK-INST: kstsa16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xb5,0xc5,0x16] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 b5 c5 16 +kstsa16 a0, a1, a2 + +# CHECK-INST: ukstsa16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0xb5,0xc5,0x36] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 b5 c5 36 +ukstsa16 a0, a1, a2 + +# SIMD 8-bit Add/Subtract + +# CHECK-INST: add8 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x48] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 48 +add8 a0, a1, a2 + +# CHECK-INST: radd8 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x08] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 08 +radd8 a0, a1, a2 + +# CHECK-INST: uradd8 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x28] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 28 +uradd8 a0, a1, a2 + +# CHECK-INST: kadd8 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x18] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 18 +kadd8 a0, a1, a2 + +# CHECK-INST: ukadd8 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x38] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 38 +ukadd8 a0, a1, a2 + +# CHECK-INST: sub8 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x4a] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 4a +sub8 a0, a1, a2 + +# CHECK-INST: rsub8 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x0a] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 0a +rsub8 a0, a1, a2 + +# CHECK-INST: ursub8 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x2a] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 2a +ursub8 a0, a1, a2 + +# CHECK-INST: ksub8 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x1a] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 1a +ksub8 a0, a1, a2 + +# CHECK-INST: uksub8 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x3a] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 3a +uksub8 a0, a1, a2 diff --git a/llvm/test/MC/RISCV/rvp/simd-cmp.s b/llvm/test/MC/RISCV/rvp/simd-cmp.s new file mode 100644 --- /dev/null +++ b/llvm/test/MC/RISCV/rvp/simd-cmp.s @@ -0,0 +1,105 @@ +# With P extension: +# RUN: llvm-mc -triple=riscv32 -show-encoding --mattr=+experimental-p %s \ +# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +# RUN: not llvm-mc -triple=riscv32 -show-encoding %s 2>&1 \ +# RUN: | FileCheck %s --check-prefix=CHECK-ERROR +# RUN: llvm-mc -triple=riscv32 -filetype=obj --mattr=+experimental-p %s \ +# RUN: | llvm-objdump -d --mattr=+experimental-p - \ +# RUN: | FileCheck %s --check-prefix=CHECK-INST +# RUN: llvm-mc -triple=riscv32 -filetype=obj --mattr=+experimental-p %s \ +# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +# RUN: llvm-mc -triple=riscv64 -show-encoding --mattr=+experimental-p %s \ +# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +# RUN: not llvm-mc -triple=riscv64 -show-encoding %s 2>&1 \ +# RUN: | FileCheck %s --check-prefix=CHECK-ERROR +# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-p %s \ +# RUN: | llvm-objdump -d --mattr=+experimental-p - \ +# RUN: | FileCheck %s --check-prefix=CHECK-INST +# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-p %s \ +# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +# With Zpn extension: +# RUN: llvm-mc -triple=riscv32 -show-encoding --mattr=+experimental-p %s \ +# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +# RUN: not llvm-mc -triple=riscv32 -show-encoding %s 2>&1 \ +# RUN: | FileCheck %s --check-prefix=CHECK-ERROR +# RUN: llvm-mc -triple=riscv32 -filetype=obj --mattr=+experimental-p %s \ +# RUN: | llvm-objdump -d --mattr=+experimental-p - \ +# RUN: | FileCheck %s --check-prefix=CHECK-INST +# RUN: llvm-mc -triple=riscv32 -filetype=obj --mattr=+experimental-p %s \ +# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +# RUN: llvm-mc -triple=riscv64 -show-encoding --mattr=+experimental-p %s \ +# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +# RUN: not llvm-mc -triple=riscv64 -show-encoding %s 2>&1 \ +# RUN: | FileCheck %s --check-prefix=CHECK-ERROR +# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-p %s \ +# RUN: | llvm-objdump -d --mattr=+experimental-p - \ +# RUN: | FileCheck %s --check-prefix=CHECK-INST +# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-p %s \ +# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +# SIMD 16-bit Compare + +# CHECK-INST: cmpeq16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x4c] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 4c +cmpeq16 a0, a1, a2 + +# CHECK-INST: scmplt16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x0c] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 0c +scmplt16 a0, a1, a2 + +# CHECK-INST: scmple16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x1c] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 1c +scmple16 a0, a1, a2 + +# CHECK-INST: ucmplt16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x2c] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 2c +ucmplt16 a0, a1, a2 + +# CHECK-INST: ucmple16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x3c] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 3c +ucmple16 a0, a1, a2 + +# SIMD 8-bit Compare + +# CHECK-INST: cmpeq8 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x4e] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 4e +cmpeq8 a0, a1, a2 + +# CHECK-INST: scmplt8 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x0e] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 0e +scmplt8 a0, a1, a2 + +# CHECK-INST: scmple8 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x1e] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 1e +scmple8 a0, a1, a2 + +# CHECK-INST: ucmplt8 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x2e] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 2e +ucmplt8 a0, a1, a2 + +# CHECK-INST: ucmple8 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x3e] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 3e +ucmple8 a0, a1, a2 diff --git a/llvm/test/MC/RISCV/rvp/simd-misc.s b/llvm/test/MC/RISCV/rvp/simd-misc.s new file mode 100644 --- /dev/null +++ b/llvm/test/MC/RISCV/rvp/simd-misc.s @@ -0,0 +1,177 @@ +# With P extension: +# RUN: llvm-mc -triple=riscv32 -show-encoding --mattr=+experimental-p %s \ +# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +# RUN: not llvm-mc -triple=riscv32 -show-encoding %s 2>&1 \ +# RUN: | FileCheck %s --check-prefix=CHECK-ERROR +# RUN: llvm-mc -triple=riscv32 -filetype=obj --mattr=+experimental-p %s \ +# RUN: | llvm-objdump -d --mattr=+experimental-p - \ +# RUN: | FileCheck %s --check-prefix=CHECK-INST +# RUN: llvm-mc -triple=riscv32 -filetype=obj --mattr=+experimental-p %s \ +# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +# RUN: llvm-mc -triple=riscv64 -show-encoding --mattr=+experimental-p %s \ +# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +# RUN: not llvm-mc -triple=riscv64 -show-encoding %s 2>&1 \ +# RUN: | FileCheck %s --check-prefix=CHECK-ERROR +# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-p %s \ +# RUN: | llvm-objdump -d --mattr=+experimental-p - \ +# RUN: | FileCheck %s --check-prefix=CHECK-INST +# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-p %s \ +# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +# With Zpn extension: +# RUN: llvm-mc -triple=riscv32 -show-encoding --mattr=+experimental-zpn %s \ +# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +# RUN: not llvm-mc -triple=riscv32 -show-encoding %s 2>&1 \ +# RUN: | FileCheck %s --check-prefix=CHECK-ERROR +# RUN: llvm-mc -triple=riscv32 -filetype=obj --mattr=+experimental-zpn %s \ +# RUN: | llvm-objdump -d --mattr=+experimental-zpn - \ +# RUN: | FileCheck %s --check-prefix=CHECK-INST +# RUN: llvm-mc -triple=riscv32 -filetype=obj --mattr=+experimental-zpn %s \ +# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +# RUN: llvm-mc -triple=riscv64 -show-encoding --mattr=+experimental-zpn %s \ +# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +# RUN: not llvm-mc -triple=riscv64 -show-encoding %s 2>&1 \ +# RUN: | FileCheck %s --check-prefix=CHECK-ERROR +# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-zpn %s \ +# RUN: | llvm-objdump -d --mattr=+experimental-zpn - \ +# RUN: | FileCheck %s --check-prefix=CHECK-INST +# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-zpn %s \ +# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +# SIMD 16-bit Miscellaneous + +# CHECK-INST: smin16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x80] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 80 +smin16 a0, a1, a2 + +# CHECK-INST: umin16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x90] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 90 +umin16 a0, a1, a2 + +# CHECK-INST: smax16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x82] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 82 +smax16 a0, a1, a2 + +# CHECK-INST: umax16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x92] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 92 +umax16 a0, a1, a2 + +# CHECK-INST: sclip16 a0, a1, 7 +# CHECK-ENCODING: [0x77,0x85,0x75,0x84] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 75 84 +sclip16 a0, a1, 7 + +# CHECK-INST: uclip16 a0, a1, 8 +# CHECK-ENCODING: [0x77,0x85,0x85,0x85] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 85 85 +uclip16 a0, a1, 8 + +# CHECK-INST: kabs16 a0, a1 +# CHECK-ENCODING: [0x77,0x85,0x15,0xad] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 15 ad +kabs16 a0, a1 + +# CHECK-INST: clrs16 a0, a1 +# CHECK-ENCODING: [0x77,0x85,0x85,0xae] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 85 ae +clrs16 a0, a1 + +# CHECK-INST: clz16 a0, a1 +# CHECK-ENCODING: [0x77,0x85,0x95,0xae] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 95 ae +clz16 a0, a1 + +# CHECK-INST: clo16 a0, a1 +# CHECK-ENCODING: [0x77,0x85,0xb5,0xae] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 b5 ae +clo16 a0, a1 + +# CHECK-INST: swap16 a0, a1 +# CHECK-ENCODING: [0x77,0x85,0x95,0xad] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 95 ad +swap16 a0, a1 + +# SIMD 8-bit Miscellaneous + +# CHECK-INST: smin8 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x88] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 88 +smin8 a0, a1, a2 + +# CHECK-INST: umin8 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x98] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 98 +umin8 a0, a1, a2 + +# CHECK-INST: smax8 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x8a] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 8a +smax8 a0, a1, a2 + +# CHECK-INST: umax8 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x9a] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 9a +umax8 a0, a1, a2 + +# CHECK-INST: sclip8 a0, a1, 4 +# CHECK-ENCODING: [0x77,0x85,0x45,0x8c] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 45 8c +sclip8 a0, a1, 4 + +# CHECK-INST: uclip8 a0, a1, 5 +# CHECK-ENCODING: [0x77,0x85,0x55,0x8d] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 55 8d +uclip8 a0, a1, 5 + +# CHECK-INST: kabs8 a0, a1 +# CHECK-ENCODING: [0x77,0x85,0x05,0xad] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 05 ad +kabs8 a0, a1 + +# CHECK-INST: clrs8 a0, a1 +# CHECK-ENCODING: [0x77,0x85,0x05,0xae] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 05 ae +clrs8 a0, a1 + +# CHECK-INST: clz8 a0, a1 +# CHECK-ENCODING: [0x77,0x85,0x15,0xae] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 15 ae +clz8 a0, a1 + +# CHECK-INST: clo8 a0, a1 +# CHECK-ENCODING: [0x77,0x85,0x35,0xae] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 35 ae +clo8 a0, a1 + +# CHECK-INST: swap8 a0, a1 +# CHECK-ENCODING: [0x77,0x85,0x85,0xad] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 85 ad +swap8 a0, a1 diff --git a/llvm/test/MC/RISCV/rvp/simd-mul.s b/llvm/test/MC/RISCV/rvp/simd-mul.s new file mode 100644 --- /dev/null +++ b/llvm/test/MC/RISCV/rvp/simd-mul.s @@ -0,0 +1,69 @@ +# With P extension: +# RUN: llvm-mc -triple=riscv32 -show-encoding --mattr=+experimental-p %s \ +# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +# RUN: not llvm-mc -triple=riscv32 -show-encoding %s 2>&1 \ +# RUN: | FileCheck %s --check-prefix=CHECK-ERROR +# RUN: llvm-mc -triple=riscv32 -filetype=obj --mattr=+experimental-p %s \ +# RUN: | llvm-objdump -d --mattr=+experimental-p - \ +# RUN: | FileCheck %s --check-prefix=CHECK-INST +# RUN: llvm-mc -triple=riscv32 -filetype=obj --mattr=+experimental-p %s \ +# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +# RUN: llvm-mc -triple=riscv64 -show-encoding --mattr=+experimental-p %s \ +# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +# RUN: not llvm-mc -triple=riscv64 -show-encoding %s 2>&1 \ +# RUN: | FileCheck %s --check-prefix=CHECK-ERROR +# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-p %s \ +# RUN: | llvm-objdump -d --mattr=+experimental-p - \ +# RUN: | FileCheck %s --check-prefix=CHECK-INST +# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-p %s \ +# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +# With Zpn extension: +# RUN: llvm-mc -triple=riscv32 -show-encoding --mattr=+experimental-zpn %s \ +# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +# RUN: not llvm-mc -triple=riscv32 -show-encoding %s 2>&1 \ +# RUN: | FileCheck %s --check-prefix=CHECK-ERROR +# RUN: llvm-mc -triple=riscv32 -filetype=obj --mattr=+experimental-zpn %s \ +# RUN: | llvm-objdump -d --mattr=+experimental-zpn - \ +# RUN: | FileCheck %s --check-prefix=CHECK-INST +# RUN: llvm-mc -triple=riscv32 -filetype=obj --mattr=+experimental-zpn %s \ +# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +# RUN: llvm-mc -triple=riscv64 -show-encoding --mattr=+experimental-zpn %s \ +# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +# RUN: not llvm-mc -triple=riscv64 -show-encoding %s 2>&1 \ +# RUN: | FileCheck %s --check-prefix=CHECK-ERROR +# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-zpn %s \ +# RUN: | llvm-objdump -d --mattr=+experimental-zpn - \ +# RUN: | FileCheck %s --check-prefix=CHECK-INST +# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-zpn %s \ +# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +# SIMD 16-bit Multiply + +# CHECK-INST: khm16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x86] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 86 +khm16 a0, a1, a2 + +# CHECK-INST: khmx16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x96] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 96 +khmx16 a0, a1, a2 + +# SIMD 8-bit Multiply + +# CHECK-INST: khm8 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x8e] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 8e +khm8 a0, a1, a2 + +# CHECK-INST: khmx8 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x9e] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 9e +khmx8 a0, a1, a2 diff --git a/llvm/test/MC/RISCV/rvp/simd-shift.s b/llvm/test/MC/RISCV/rvp/simd-shift.s new file mode 100644 --- /dev/null +++ b/llvm/test/MC/RISCV/rvp/simd-shift.s @@ -0,0 +1,213 @@ +# With P extension: +# RUN: llvm-mc -triple=riscv32 -show-encoding --mattr=+experimental-p %s \ +# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +# RUN: not llvm-mc -triple=riscv32 -show-encoding %s 2>&1 \ +# RUN: | FileCheck %s --check-prefix=CHECK-ERROR +# RUN: llvm-mc -triple=riscv32 -filetype=obj --mattr=+experimental-p %s \ +# RUN: | llvm-objdump -d --mattr=+experimental-p - \ +# RUN: | FileCheck %s --check-prefix=CHECK-INST +# RUN: llvm-mc -triple=riscv32 -filetype=obj --mattr=+experimental-p %s \ +# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +# RUN: llvm-mc -triple=riscv64 -show-encoding --mattr=+experimental-p %s \ +# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +# RUN: not llvm-mc -triple=riscv64 -show-encoding %s 2>&1 \ +# RUN: | FileCheck %s --check-prefix=CHECK-ERROR +# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-p %s \ +# RUN: | llvm-objdump -d --mattr=+experimental-p - \ +# RUN: | FileCheck %s --check-prefix=CHECK-INST +# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-p %s \ +# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +# With Zpn extension: +# RUN: llvm-mc -triple=riscv32 -show-encoding --mattr=+experimental-zpn %s \ +# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +# RUN: not llvm-mc -triple=riscv32 -show-encoding %s 2>&1 \ +# RUN: | FileCheck %s --check-prefix=CHECK-ERROR +# RUN: llvm-mc -triple=riscv32 -filetype=obj --mattr=+experimental-zpn %s \ +# RUN: | llvm-objdump -d --mattr=+experimental-zpn - \ +# RUN: | FileCheck %s --check-prefix=CHECK-INST +# RUN: llvm-mc -triple=riscv32 -filetype=obj --mattr=+experimental-zpn %s \ +# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +# RUN: llvm-mc -triple=riscv64 -show-encoding --mattr=+experimental-zpn %s \ +# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +# RUN: not llvm-mc -triple=riscv64 -show-encoding %s 2>&1 \ +# RUN: | FileCheck %s --check-prefix=CHECK-ERROR +# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-zpn %s \ +# RUN: | llvm-objdump -d --mattr=+experimental-zpn - \ +# RUN: | FileCheck %s --check-prefix=CHECK-INST +# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-zpn %s \ +# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +# SIMD 16-bit Shift + +# CHECK-INST: sra16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x50] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 50 +sra16 a0, a1, a2 + +# CHECK-INST: srai16 a0, a1, 3 +# CHECK-ENCODING: [0x77,0x85,0x35,0x70] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 35 70 +srai16 a0, a1, 3 + +# CHECK-INST: sra16.u a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x60] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 60 +sra16.u a0, a1, a2 + +# CHECK-INST: srai16.u a0, a1, 4 +# CHECK-ENCODING: [0x77,0x85,0x45,0x71] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 45 71 +srai16.u a0, a1, 4 + +# CHECK-INST: srl16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x52] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 52 +srl16 a0, a1, a2 + +# CHECK-INST: srli16 a0, a1, 9 +# CHECK-ENCODING: [0x77,0x85,0x95,0x72] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 95 72 +srli16 a0, a1, 9 + +# CHECK-INST: srl16.u a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x62] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 62 +srl16.u a0, a1, a2 + +# CHECK-INST: srli16.u a0, a1, 10 +# CHECK-ENCODING: [0x77,0x85,0xa5,0x73] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 a5 73 +srli16.u a0, a1, 10 + +# CHECK-INST: sll16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x54] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 54 +sll16 a0, a1, a2 + +# CHECK-INST: slli16 a0, a1, 8 +# CHECK-ENCODING: [0x77,0x85,0x85,0x74] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 85 74 +slli16 a0, a1, 8 + +# CHECK-INST: ksll16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x64] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 64 +ksll16 a0, a1, a2 + +# CHECK-INST: kslli16 a0, a1, 5 +# CHECK-ENCODING: [0x77,0x85,0x55,0x75] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 55 75 +kslli16 a0, a1, 5 + +# CHECK-INST: kslra16 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x56] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 56 +kslra16 a0, a1, a2 + +# CHECK-INST: kslra16.u a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x66] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 66 +kslra16.u a0, a1, a2 + +# SIMD 8-bit Shift + +# CHECK-INST: sra8 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x58] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 58 +sra8 a0, a1, a2 + +# CHECK-INST: srai8 a0, a1, 1 +# CHECK-ENCODING: [0x77,0x85,0x15,0x78] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 15 78 +srai8 a0, a1, 1 + +# CHECK-INST: sra8.u a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x68] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 68 +sra8.u a0, a1, a2 + +# CHECK-INST: srai8.u a0, a1, 2 +# CHECK-ENCODING: [0x77,0x85,0xa5,0x78] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 a5 78 +srai8.u a0, a1, 2 + +# CHECK-INST: srl8 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x5a] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 5a +srl8 a0, a1, a2 + +# CHECK-INST: srli8 a0, a1, 3 +# CHECK-ENCODING: [0x77,0x85,0x35,0x7a] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 35 7a +srli8 a0, a1, 3 + +# CHECK-INST: srl8.u a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x6a] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 6a +srl8.u a0, a1, a2 + +# CHECK-INST: srli8.u a0, a1, 4 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x7a] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 7a +srli8.u a0, a1, 4 + +# CHECK-INST: sll8 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x5c] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 5c +sll8 a0, a1, a2 + +# CHECK-INST: slli8 a0, a1, 1 +# CHECK-ENCODING: [0x77,0x85,0x15,0x7c] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 15 7c +slli8 a0, a1, 1 + +# CHECK-INST: ksll8 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x6c] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 6c +ksll8 a0, a1, a2 + +# CHECK-INST: kslli8 a0, a1, 6 +# CHECK-ENCODING: [0x77,0x85,0xe5,0x7c] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 e5 7c +kslli8 a0, a1, 6 + +# CHECK-INST: kslra8 a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x5e] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 5e +kslra8 a0, a1, a2 + +# CHECK-INST: kslra8.u a0, a1, a2 +# CHECK-ENCODING: [0x77,0x85,0xc5,0x6e] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 6e +kslra8.u a0, a1, a2 diff --git a/llvm/test/MC/RISCV/rvp/simd-unpacking.s b/llvm/test/MC/RISCV/rvp/simd-unpacking.s new file mode 100644 --- /dev/null +++ b/llvm/test/MC/RISCV/rvp/simd-unpacking.s @@ -0,0 +1,103 @@ +# With P extension: +# RUN: llvm-mc -triple=riscv32 -show-encoding --mattr=+experimental-p %s \ +# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +# RUN: not llvm-mc -triple=riscv32 -show-encoding %s 2>&1 \ +# RUN: | FileCheck %s --check-prefix=CHECK-ERROR +# RUN: llvm-mc -triple=riscv32 -filetype=obj --mattr=+experimental-p %s \ +# RUN: | llvm-objdump -d --mattr=+experimental-p - \ +# RUN: | FileCheck %s --check-prefix=CHECK-INST +# RUN: llvm-mc -triple=riscv32 -filetype=obj --mattr=+experimental-p %s \ +# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +# RUN: llvm-mc -triple=riscv64 -show-encoding --mattr=+experimental-p %s \ +# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +# RUN: not llvm-mc -triple=riscv64 -show-encoding %s 2>&1 \ +# RUN: | FileCheck %s --check-prefix=CHECK-ERROR +# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-p %s \ +# RUN: | llvm-objdump -d --mattr=+experimental-p - \ +# RUN: | FileCheck %s --check-prefix=CHECK-INST +# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-p %s \ +# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +# With Zpn extension: +# RUN: llvm-mc -triple=riscv32 -show-encoding --mattr=+experimental-zpn %s \ +# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +# RUN: not llvm-mc -triple=riscv32 -show-encoding %s 2>&1 \ +# RUN: | FileCheck %s --check-prefix=CHECK-ERROR +# RUN: llvm-mc -triple=riscv32 -filetype=obj --mattr=+experimental-zpn %s \ +# RUN: | llvm-objdump -d --mattr=+experimental-zpn - \ +# RUN: | FileCheck %s --check-prefix=CHECK-INST +# RUN: llvm-mc -triple=riscv32 -filetype=obj --mattr=+experimental-zpn %s \ +# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +# RUN: llvm-mc -triple=riscv64 -show-encoding --mattr=+experimental-zpn %s \ +# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +# RUN: not llvm-mc -triple=riscv64 -show-encoding %s 2>&1 \ +# RUN: | FileCheck %s --check-prefix=CHECK-ERROR +# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-zpn %s \ +# RUN: | llvm-objdump -d --mattr=+experimental-zpn - \ +# RUN: | FileCheck %s --check-prefix=CHECK-INST +# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-zpn %s \ +# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +# 8-bit Unpacking + +# CHECK-INST: sunpkd810 a0, a1 +# CHECK-ENCODING: [0x77,0x85,0x85,0xac] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 85 ac +sunpkd810 a0, a1 + +# CHECK-INST: sunpkd820 a0, a1 +# CHECK-ENCODING: [0x77,0x85,0x95,0xac] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 95 ac +sunpkd820 a0, a1 + +# CHECK-INST: sunpkd830 a0, a1 +# CHECK-ENCODING: [0x77,0x85,0xa5,0xac] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 a5 ac +sunpkd830 a0, a1 + +# CHECK-INST: sunpkd831 a0, a1 +# CHECK-ENCODING: [0x77,0x85,0xb5,0xac] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 b5 ac +sunpkd831 a0, a1 + +# CHECK-INST: sunpkd832 a0, a1 +# CHECK-ENCODING: [0x77,0x85,0x35,0xad] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 35 ad +sunpkd832 a0, a1 + +# CHECK-INST: zunpkd810 a0, a1 +# CHECK-ENCODING: [0x77,0x85,0xc5,0xac] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 c5 ac +zunpkd810 a0, a1 + +# CHECK-INST: zunpkd820 a0, a1 +# CHECK-ENCODING: [0x77,0x85,0xd5,0xac] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 d5 ac +zunpkd820 a0, a1 + +# CHECK-INST: zunpkd830 a0, a1 +# CHECK-ENCODING: [0x77,0x85,0xe5,0xac] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 e5 ac +zunpkd830 a0, a1 + +# CHECK-INST: zunpkd831 a0, a1 +# CHECK-ENCODING: [0x77,0x85,0xf5,0xac] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 f5 ac +zunpkd831 a0, a1 + +# CHECK-INST: zunpkd832 a0, a1 +# CHECK-ENCODING: [0x77,0x85,0x75,0xad] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 75 ad +zunpkd832 a0, a1