diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoC.td b/llvm/lib/Target/RISCV/RISCVInstrInfoC.td --- a/llvm/lib/Target/RISCV/RISCVInstrInfoC.td +++ b/llvm/lib/Target/RISCV/RISCVInstrInfoC.td @@ -749,6 +749,7 @@ dag Input = input; dag Output = output; list Predicates = []; + bit isCompressOnly = false; } // Patterns are defined in the same order the compressed instructions appear @@ -834,25 +835,30 @@ (C_SUB GPRC:$rs1, GPRC:$rs2)>; def : CompressPat<(XOR GPRC:$rs1, GPRC:$rs1, GPRC:$rs2), (C_XOR GPRC:$rs1, GPRC:$rs2)>; +let isCompressOnly = 1 in def : CompressPat<(XOR GPRC:$rs1, GPRC:$rs2, GPRC:$rs1), (C_XOR GPRC:$rs1, GPRC:$rs2)>; def : CompressPat<(OR GPRC:$rs1, GPRC:$rs1, GPRC:$rs2), (C_OR GPRC:$rs1, GPRC:$rs2)>; +let isCompressOnly = 1 in def : CompressPat<(OR GPRC:$rs1, GPRC:$rs2, GPRC:$rs1), (C_OR GPRC:$rs1, GPRC:$rs2)>; def : CompressPat<(AND GPRC:$rs1, GPRC:$rs1, GPRC:$rs2), (C_AND GPRC:$rs1, GPRC:$rs2)>; +let isCompressOnly = 1 in def : CompressPat<(AND GPRC:$rs1, GPRC:$rs2, GPRC:$rs1), (C_AND GPRC:$rs1, GPRC:$rs2)>; } // Predicates = [HasStdExtC] let Predicates = [HasStdExtC, IsRV64] in { +let isCompressOnly = 1 in def : CompressPat<(ADDIW GPRNoX0:$rd, X0, simm6:$imm), (C_LI GPRNoX0:$rd, simm6:$imm)>; def : CompressPat<(SUBW GPRC:$rs1, GPRC:$rs1, GPRC:$rs2), (C_SUBW GPRC:$rs1, GPRC:$rs2)>; def : CompressPat<(ADDW GPRC:$rs1, GPRC:$rs1, GPRC:$rs2), (C_ADDW GPRC:$rs1, GPRC:$rs2)>; +let isCompressOnly = 1 in def : CompressPat<(ADDW GPRC:$rs1, GPRC:$rs2, GPRC:$rs1), (C_ADDW GPRC:$rs1, GPRC:$rs2)>; } // Predicates = [HasStdExtC, IsRV64] @@ -895,10 +901,12 @@ let Predicates = [HasStdExtC] in { def : CompressPat<(JALR X0, GPRNoX0:$rs1, 0), (C_JR GPRNoX0:$rs1)>; +let isCompressOnly = true in { def : CompressPat<(ADD GPRNoX0:$rs1, X0, GPRNoX0:$rs2), (C_MV GPRNoX0:$rs1, GPRNoX0:$rs2)>; def : CompressPat<(ADD GPRNoX0:$rs1, GPRNoX0:$rs2, X0), (C_MV GPRNoX0:$rs1, GPRNoX0:$rs2)>; +} def : CompressPat<(ADDI GPRNoX0:$rs1, GPRNoX0:$rs2, 0), (C_MV GPRNoX0:$rs1, GPRNoX0:$rs2)>; def : CompressPat<(EBREAK), (C_EBREAK)>; @@ -907,6 +915,7 @@ (C_JALR GPRNoX0:$rs1)>; def : CompressPat<(ADD GPRNoX0:$rs1, GPRNoX0:$rs1, GPRNoX0:$rs2), (C_ADD GPRNoX0:$rs1, GPRNoX0:$rs2)>; +let isCompressOnly = 1 in def : CompressPat<(ADD GPRNoX0:$rs1, GPRNoX0:$rs2, GPRNoX0:$rs1), (C_ADD GPRNoX0:$rs1, GPRNoX0:$rs2)>; } // Predicates = [HasStdExtC] diff --git a/llvm/test/MC/RISCV/compress-rv32i.s b/llvm/test/MC/RISCV/compress-rv32i.s --- a/llvm/test/MC/RISCV/compress-rv32i.s +++ b/llvm/test/MC/RISCV/compress-rv32i.s @@ -21,7 +21,7 @@ # RUN: | FileCheck -check-prefixes=CHECK-BYTES,CHECK-INST,CHECK-INSTOBJ64 %s # CHECK-BYTES: 2e 85 -# CHECK-ALIAS: add a0, zero, a1 +# CHECK-ALIAS: mv a0, a1 # CHECK-INST: c.mv a0, a1 # CHECK: # encoding: [0x2e,0x85] addi a0, a1, 0 @@ -183,13 +183,13 @@ jalr zero, 0(ra) # CHECK-BYTES: 92 80 -# CHECK-ALIAS: add ra, zero, tp +# CHECK-ALIAS: mv ra, tp # CHECK-INST: c.mv ra, tp # CHECK: # encoding: [0x92,0x80] add ra, zero, tp # CHECK-BYTES: 92 80 -# CHECK-ALIAS: add ra, zero, tp +# CHECK-ALIAS: mv ra, tp # CHECK-INST: c.mv ra, tp # CHECK: # encoding: [0x92,0x80] add ra, tp, zero diff --git a/llvm/test/MC/RISCV/option-rvc.s b/llvm/test/MC/RISCV/option-rvc.s --- a/llvm/test/MC/RISCV/option-rvc.s +++ b/llvm/test/MC/RISCV/option-rvc.s @@ -36,7 +36,7 @@ # CHECK: .option rvc .option rvc # CHECK-BYTES: 2e 85 -# CHECK-ALIAS: add a0, zero, a1 +# CHECK-ALIAS: mv a0, a1 # CHECK-INST: c.mv a0, a1 # CHECK: # encoding: [0x2e,0x85] addi a0, a1, 0 @@ -64,7 +64,7 @@ # CHECK: .option rvc .option rvc # CHECK-BYTES: 2e 85 -# CHECK-ALIAS: add a0, zero, a1 +# CHECK-ALIAS: mv a0, a1 # CHECK-INST: c.mv a0, a1 # CHECK: # encoding: [0x2e,0x85] addi a0, a1, 0 diff --git a/llvm/test/TableGen/AsmPredicateCombiningRISCV.td b/llvm/test/TableGen/AsmPredicateCombiningRISCV.td --- a/llvm/test/TableGen/AsmPredicateCombiningRISCV.td +++ b/llvm/test/TableGen/AsmPredicateCombiningRISCV.td @@ -59,6 +59,7 @@ dag Input = input; dag Output = output; list Predicates = predicates; + bit isCompressOnly = false; } // COMPRESS-LABEL: static bool compressInst diff --git a/llvm/utils/TableGen/RISCVCompressInstEmitter.cpp b/llvm/utils/TableGen/RISCVCompressInstEmitter.cpp --- a/llvm/utils/TableGen/RISCVCompressInstEmitter.cpp +++ b/llvm/utils/TableGen/RISCVCompressInstEmitter.cpp @@ -101,11 +101,12 @@ IndexedMap DestOperandMap; // Maps operands in the Dest Instruction // to the corresponding Source instruction operand. + bool IsCompressOnly; CompressPat(CodeGenInstruction &S, CodeGenInstruction &D, std::vector RF, IndexedMap &SourceMap, - IndexedMap &DestMap) + IndexedMap &DestMap, bool IsCompressOnly) : Source(S), Dest(D), PatReqFeatures(RF), SourceOperandMap(SourceMap), - DestOperandMap(DestMap) {} + DestOperandMap(DestMap), IsCompressOnly(IsCompressOnly) {} }; enum EmitterType { Compress, Uncompress, CheckCompress }; RecordKeeper &Records; @@ -466,7 +467,8 @@ }); CompressPatterns.push_back(CompressPat(SourceInst, DestInst, PatReqFeatures, - SourceOperandMap, DestOperandMap)); + SourceOperandMap, DestOperandMap, + Rec->getValueAsBit("isCompressOnly"))); } static void @@ -634,6 +636,9 @@ EType == EmitterType::Compress || EType == EmitterType::Uncompress; for (auto &CompressPat : CompressPatterns) { + if (EType == EmitterType::Uncompress && CompressPat.IsCompressOnly) + continue; + std::string CondString; std::string CodeString; raw_string_ostream CondStream(CondString);