Index: llvm/include/llvm/TableGen/Record.h
===================================================================
--- llvm/include/llvm/TableGen/Record.h
+++ llvm/include/llvm/TableGen/Record.h
@@ -1804,7 +1804,7 @@
 
   /// Get all the concrete records that inherit from the one specified
   /// class. The class must be defined.
-  std::vector<Record *> getAllDerivedDefinitions(StringRef ClassName) const;
+  ArrayRef<Record *> getAllDerivedDefinitions(StringRef ClassName) const;
 
   /// Get all the concrete records that inherit from all the specified
   /// classes. The classes must be defined.
Index: llvm/lib/TableGen/Record.cpp
===================================================================
--- llvm/lib/TableGen/Record.cpp
+++ llvm/lib/TableGen/Record.cpp
@@ -2598,7 +2598,7 @@
 
 // We cache the record vectors for single classes. Many backends request
 // the same vectors multiple times.
-std::vector<Record *> RecordKeeper::getAllDerivedDefinitions(
+ArrayRef<Record *> RecordKeeper::getAllDerivedDefinitions(
     StringRef ClassName) const {
 
   auto Pair = ClassRecordsMap.try_emplace(ClassName);
Index: llvm/utils/TableGen/AsmMatcherEmitter.cpp
===================================================================
--- llvm/utils/TableGen/AsmMatcherEmitter.cpp
+++ llvm/utils/TableGen/AsmMatcherEmitter.cpp
@@ -1344,8 +1344,7 @@
 }
 
 void AsmMatcherInfo::buildOperandClasses() {
-  std::vector<Record*> AsmOperands =
-    Records.getAllDerivedDefinitions("AsmOperandClass");
+  auto AsmOperands = Records.getAllDerivedDefinitions("AsmOperandClass");
 
   // Pre-populate AsmOperandClasses map.
   for (Record *Rec : AsmOperands) {
@@ -1530,8 +1529,7 @@
 
     // Parse all of the InstAlias definitions and stick them in the list of
     // matchables.
-    std::vector<Record*> AllInstAliases =
-      Records.getAllDerivedDefinitions("InstAlias");
+    auto AllInstAliases = Records.getAllDerivedDefinitions("InstAlias");
     for (unsigned i = 0, e = AllInstAliases.size(); i != e; ++i) {
       auto Alias = std::make_unique<CodeGenInstAlias>(AllInstAliases[i],
                                                        Target);
@@ -1639,8 +1637,7 @@
 
   // Process token alias definitions and set up the associated superclass
   // information.
-  std::vector<Record*> AllTokenAliases =
-    Records.getAllDerivedDefinitions("TokenAlias");
+  auto AllTokenAliases = Records.getAllDerivedDefinitions("TokenAlias");
   for (Record *Rec : AllTokenAliases) {
     ClassInfo *FromClass = getTokenClass(Rec->getValueAsString("FromToken"));
     ClassInfo *ToClass = getTokenClass(Rec->getValueAsString("ToToken"));
@@ -2717,7 +2714,7 @@
 }
 
 static void emitMnemonicAliasVariant(raw_ostream &OS,const AsmMatcherInfo &Info,
-                                     std::vector<Record*> &Aliases,
+                                     const std::vector<Record*> &Aliases,
                                      unsigned Indent = 0,
                                   StringRef AsmParserVariantName = StringRef()){
   // Keep track of all the aliases from a mnemonic.  Use an std::map so that the
@@ -2799,8 +2796,7 @@
   if (!MatchPrefix.empty())
     return false;
 
-  std::vector<Record*> Aliases =
-    Info.getRecords().getAllDerivedDefinitions("MnemonicAlias");
+  auto Aliases = Info.getRecords().getAllDerivedDefinitions("MnemonicAlias");
   if (Aliases.empty()) return false;
 
   OS << "static void applyMnemonicAliases(StringRef &Mnemonic, "
Index: llvm/utils/TableGen/Attributes.cpp
===================================================================
--- llvm/utils/TableGen/Attributes.cpp
+++ llvm/utils/TableGen/Attributes.cpp
@@ -69,8 +69,7 @@
      << "                                        const Function &Callee) {\n";
   OS << "  bool Ret = true;\n\n";
 
-  std::vector<Record *> CompatRules =
-      Records.getAllDerivedDefinitions("CompatRule");
+  auto CompatRules = Records.getAllDerivedDefinitions("CompatRule");
 
   for (auto *Rule : CompatRules) {
     StringRef FuncName = Rule->getValueAsString("CompatFunc");
@@ -81,8 +80,7 @@
   OS << "  return Ret;\n";
   OS << "}\n\n";
 
-  std::vector<Record *> MergeRules =
-      Records.getAllDerivedDefinitions("MergeRule");
+  auto MergeRules = Records.getAllDerivedDefinitions("MergeRule");
   OS << "static inline void mergeFnAttrs(Function &Caller,\n"
      << "                                const Function &Callee) {\n";
 
Index: llvm/utils/TableGen/CallingConvEmitter.cpp
===================================================================
--- llvm/utils/TableGen/CallingConvEmitter.cpp
+++ llvm/utils/TableGen/CallingConvEmitter.cpp
@@ -34,7 +34,7 @@
 } // End anonymous namespace
 
 void CallingConvEmitter::run(raw_ostream &O) {
-  std::vector<Record*> CCs = Records.getAllDerivedDefinitions("CallingConv");
+  auto CCs = Records.getAllDerivedDefinitions("CallingConv");
 
   // Emit prototypes for all of the non-custom CC's so that they can forward ref
   // each other.
Index: llvm/utils/TableGen/CodeEmitterGen.cpp
===================================================================
--- llvm/utils/TableGen/CodeEmitterGen.cpp
+++ llvm/utils/TableGen/CodeEmitterGen.cpp
@@ -388,7 +388,7 @@
 
 void CodeEmitterGen::run(raw_ostream &o) {
   CodeGenTarget Target(Records);
-  std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
+  auto Insts = Records.getAllDerivedDefinitions("Instruction");
 
   // For little-endian instruction bit encodings, reverse the bit order
   Target.reverseBitsForLittleEndianEncoding();
@@ -461,7 +461,7 @@
   std::map<std::string, std::vector<std::string>> CaseMap;
 
   // Construct all cases statement for each opcode
-  for (std::vector<Record*>::iterator IC = Insts.begin(), EC = Insts.end();
+  for (ArrayRef<Record *>::const_iterator IC = Insts.begin(), EC = Insts.end();
         IC != EC; ++IC) {
     Record *R = *IC;
     if (R->getValueAsString("Namespace") == "TargetOpcode" ||
Index: mlir/tools/mlir-tblgen/OpInterfacesGen.cpp
===================================================================
--- mlir/tools/mlir-tblgen/OpInterfacesGen.cpp
+++ mlir/tools/mlir-tblgen/OpInterfacesGen.cpp
@@ -77,8 +77,8 @@
   bool emitInterfaceDocs();
 
 protected:
-  InterfaceGenerator(std::vector<llvm::Record *> &&defs, raw_ostream &os)
-      : defs(std::move(defs)), os(os) {}
+  InterfaceGenerator(const std::vector<llvm::Record *> &defs, raw_ostream &os)
+      : defs(defs), os(os) {}
 
   void emitConceptDecl(Interface &interface);
   void emitModelDecl(Interface &interface);