Index: llvm/lib/Target/RISCV/RISCVISelLowering.cpp
===================================================================
--- llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -3821,9 +3821,22 @@
       if (ConstNode->getAPIntValue().getBitWidth() > 8 * sizeof(int64_t))
         return false;
       int64_t Imm = ConstNode->getSExtValue();
+      // Optimize to ±(1<<m)±1 if applicable.
       if (isPowerOf2_64(Imm + 1) || isPowerOf2_64(Imm - 1) ||
           isPowerOf2_64(1 - Imm) || isPowerOf2_64(-1 - Imm))
         return true;
+      // Omit 64-bit multiplication on riscv32.
+      if (!Subtarget.is64Bit() && VT.getSizeInBits() > 32)
+        return false;
+      // Optimize to ±(1<<m)±(1<<n) if Imm needs a pair of LUI/ADDI.
+      if ((Imm < -2048 || 2047 < Imm) && (Imm & 0x7ff) != 0) {
+        int64_t Tmp = Imm;
+        while (Tmp != 0 && (Tmp & 1) == 0)
+          Tmp >>= 1;
+        if (isPowerOf2_64(Tmp + 1) || isPowerOf2_64(Tmp - 1) ||
+            isPowerOf2_64(1 - Tmp) || isPowerOf2_64(-1 - Tmp))
+          return true;
+      }
     }
   }
 
Index: llvm/test/CodeGen/RISCV/mul.ll
===================================================================
--- llvm/test/CodeGen/RISCV/mul.ll
+++ llvm/test/CodeGen/RISCV/mul.ll
@@ -638,13 +638,9 @@
 define i32 @muli32_p4352(i32 %a) nounwind {
 ; RV32I-LABEL: muli32_p4352:
 ; RV32I:       # %bb.0:
-; RV32I-NEXT:    addi sp, sp, -16
-; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
-; RV32I-NEXT:    lui a1, 1
-; RV32I-NEXT:    addi a1, a1, 256
-; RV32I-NEXT:    call __mulsi3@plt
-; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
-; RV32I-NEXT:    addi sp, sp, 16
+; RV32I-NEXT:    slli a1, a0, 8
+; RV32I-NEXT:    slli a0, a0, 12
+; RV32I-NEXT:    add a0, a0, a1
 ; RV32I-NEXT:    ret
 ;
 ; RV32IM-LABEL: muli32_p4352:
@@ -656,20 +652,16 @@
 ;
 ; RV64I-LABEL: muli32_p4352:
 ; RV64I:       # %bb.0:
-; RV64I-NEXT:    addi sp, sp, -16
-; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
-; RV64I-NEXT:    lui a1, 1
-; RV64I-NEXT:    addiw a1, a1, 256
-; RV64I-NEXT:    call __muldi3@plt
-; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
-; RV64I-NEXT:    addi sp, sp, 16
+; RV64I-NEXT:    slli a1, a0, 8
+; RV64I-NEXT:    slli a0, a0, 12
+; RV64I-NEXT:    addw a0, a0, a1
 ; RV64I-NEXT:    ret
 ;
 ; RV64IM-LABEL: muli32_p4352:
 ; RV64IM:       # %bb.0:
-; RV64IM-NEXT:    lui a1, 1
-; RV64IM-NEXT:    addiw a1, a1, 256
-; RV64IM-NEXT:    mul a0, a0, a1
+; RV64IM-NEXT:    slli a1, a0, 8
+; RV64IM-NEXT:    slli a0, a0, 12
+; RV64IM-NEXT:    addw a0, a0, a1
 ; RV64IM-NEXT:    ret
   %1 = mul i32 %a, 4352
   ret i32 %1
@@ -678,13 +670,9 @@
 define i32 @muli32_p3840(i32 %a) nounwind {
 ; RV32I-LABEL: muli32_p3840:
 ; RV32I:       # %bb.0:
-; RV32I-NEXT:    addi sp, sp, -16
-; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
-; RV32I-NEXT:    lui a1, 1
-; RV32I-NEXT:    addi a1, a1, -256
-; RV32I-NEXT:    call __mulsi3@plt
-; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
-; RV32I-NEXT:    addi sp, sp, 16
+; RV32I-NEXT:    slli a1, a0, 8
+; RV32I-NEXT:    slli a0, a0, 12
+; RV32I-NEXT:    sub a0, a0, a1
 ; RV32I-NEXT:    ret
 ;
 ; RV32IM-LABEL: muli32_p3840:
@@ -696,20 +684,16 @@
 ;
 ; RV64I-LABEL: muli32_p3840:
 ; RV64I:       # %bb.0:
-; RV64I-NEXT:    addi sp, sp, -16
-; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
-; RV64I-NEXT:    lui a1, 1
-; RV64I-NEXT:    addiw a1, a1, -256
-; RV64I-NEXT:    call __muldi3@plt
-; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
-; RV64I-NEXT:    addi sp, sp, 16
+; RV64I-NEXT:    slli a1, a0, 8
+; RV64I-NEXT:    slli a0, a0, 12
+; RV64I-NEXT:    subw a0, a0, a1
 ; RV64I-NEXT:    ret
 ;
 ; RV64IM-LABEL: muli32_p3840:
 ; RV64IM:       # %bb.0:
-; RV64IM-NEXT:    lui a1, 1
-; RV64IM-NEXT:    addiw a1, a1, -256
-; RV64IM-NEXT:    mul a0, a0, a1
+; RV64IM-NEXT:    slli a1, a0, 8
+; RV64IM-NEXT:    slli a0, a0, 12
+; RV64IM-NEXT:    subw a0, a0, a1
 ; RV64IM-NEXT:    ret
   %1 = mul i32 %a, 3840
   ret i32 %1
@@ -718,13 +702,9 @@
 define i32 @muli32_m3840(i32 %a) nounwind {
 ; RV32I-LABEL: muli32_m3840:
 ; RV32I:       # %bb.0:
-; RV32I-NEXT:    addi sp, sp, -16
-; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
-; RV32I-NEXT:    lui a1, 1048575
-; RV32I-NEXT:    addi a1, a1, 256
-; RV32I-NEXT:    call __mulsi3@plt
-; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
-; RV32I-NEXT:    addi sp, sp, 16
+; RV32I-NEXT:    slli a1, a0, 12
+; RV32I-NEXT:    slli a0, a0, 8
+; RV32I-NEXT:    sub a0, a0, a1
 ; RV32I-NEXT:    ret
 ;
 ; RV32IM-LABEL: muli32_m3840:
@@ -736,20 +716,16 @@
 ;
 ; RV64I-LABEL: muli32_m3840:
 ; RV64I:       # %bb.0:
-; RV64I-NEXT:    addi sp, sp, -16
-; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
-; RV64I-NEXT:    lui a1, 1048575
-; RV64I-NEXT:    addiw a1, a1, 256
-; RV64I-NEXT:    call __muldi3@plt
-; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
-; RV64I-NEXT:    addi sp, sp, 16
+; RV64I-NEXT:    slli a1, a0, 12
+; RV64I-NEXT:    slli a0, a0, 8
+; RV64I-NEXT:    subw a0, a0, a1
 ; RV64I-NEXT:    ret
 ;
 ; RV64IM-LABEL: muli32_m3840:
 ; RV64IM:       # %bb.0:
-; RV64IM-NEXT:    lui a1, 1048575
-; RV64IM-NEXT:    addiw a1, a1, 256
-; RV64IM-NEXT:    mul a0, a0, a1
+; RV64IM-NEXT:    slli a1, a0, 12
+; RV64IM-NEXT:    slli a0, a0, 8
+; RV64IM-NEXT:    subw a0, a0, a1
 ; RV64IM-NEXT:    ret
   %1 = mul i32 %a, -3840
   ret i32 %1
@@ -758,13 +734,10 @@
 define i32 @muli32_m4352(i32 %a) nounwind {
 ; RV32I-LABEL: muli32_m4352:
 ; RV32I:       # %bb.0:
-; RV32I-NEXT:    addi sp, sp, -16
-; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
-; RV32I-NEXT:    lui a1, 1048575
-; RV32I-NEXT:    addi a1, a1, -256
-; RV32I-NEXT:    call __mulsi3@plt
-; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
-; RV32I-NEXT:    addi sp, sp, 16
+; RV32I-NEXT:    slli a1, a0, 8
+; RV32I-NEXT:    slli a0, a0, 12
+; RV32I-NEXT:    add a0, a0, a1
+; RV32I-NEXT:    neg a0, a0
 ; RV32I-NEXT:    ret
 ;
 ; RV32IM-LABEL: muli32_m4352:
@@ -776,20 +749,18 @@
 ;
 ; RV64I-LABEL: muli32_m4352:
 ; RV64I:       # %bb.0:
-; RV64I-NEXT:    addi sp, sp, -16
-; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
-; RV64I-NEXT:    lui a1, 1048575
-; RV64I-NEXT:    addiw a1, a1, -256
-; RV64I-NEXT:    call __muldi3@plt
-; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
-; RV64I-NEXT:    addi sp, sp, 16
+; RV64I-NEXT:    slli a1, a0, 8
+; RV64I-NEXT:    slli a0, a0, 12
+; RV64I-NEXT:    add a0, a0, a1
+; RV64I-NEXT:    negw a0, a0
 ; RV64I-NEXT:    ret
 ;
 ; RV64IM-LABEL: muli32_m4352:
 ; RV64IM:       # %bb.0:
-; RV64IM-NEXT:    lui a1, 1048575
-; RV64IM-NEXT:    addiw a1, a1, -256
-; RV64IM-NEXT:    mul a0, a0, a1
+; RV64IM-NEXT:    slli a1, a0, 8
+; RV64IM-NEXT:    slli a0, a0, 12
+; RV64IM-NEXT:    add a0, a0, a1
+; RV64IM-NEXT:    negw a0, a0
 ; RV64IM-NEXT:    ret
   %1 = mul i32 %a, -4352
   ret i32 %1
@@ -820,20 +791,16 @@
 ;
 ; RV64I-LABEL: muli64_p4352:
 ; RV64I:       # %bb.0:
-; RV64I-NEXT:    addi sp, sp, -16
-; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
-; RV64I-NEXT:    lui a1, 1
-; RV64I-NEXT:    addiw a1, a1, 256
-; RV64I-NEXT:    call __muldi3@plt
-; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
-; RV64I-NEXT:    addi sp, sp, 16
+; RV64I-NEXT:    slli a1, a0, 8
+; RV64I-NEXT:    slli a0, a0, 12
+; RV64I-NEXT:    add a0, a0, a1
 ; RV64I-NEXT:    ret
 ;
 ; RV64IM-LABEL: muli64_p4352:
 ; RV64IM:       # %bb.0:
-; RV64IM-NEXT:    lui a1, 1
-; RV64IM-NEXT:    addiw a1, a1, 256
-; RV64IM-NEXT:    mul a0, a0, a1
+; RV64IM-NEXT:    slli a1, a0, 8
+; RV64IM-NEXT:    slli a0, a0, 12
+; RV64IM-NEXT:    add a0, a0, a1
 ; RV64IM-NEXT:    ret
   %1 = mul i64 %a, 4352
   ret i64 %1
@@ -864,20 +831,16 @@
 ;
 ; RV64I-LABEL: muli64_p3840:
 ; RV64I:       # %bb.0:
-; RV64I-NEXT:    addi sp, sp, -16
-; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
-; RV64I-NEXT:    lui a1, 1
-; RV64I-NEXT:    addiw a1, a1, -256
-; RV64I-NEXT:    call __muldi3@plt
-; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
-; RV64I-NEXT:    addi sp, sp, 16
+; RV64I-NEXT:    slli a1, a0, 8
+; RV64I-NEXT:    slli a0, a0, 12
+; RV64I-NEXT:    sub a0, a0, a1
 ; RV64I-NEXT:    ret
 ;
 ; RV64IM-LABEL: muli64_p3840:
 ; RV64IM:       # %bb.0:
-; RV64IM-NEXT:    lui a1, 1
-; RV64IM-NEXT:    addiw a1, a1, -256
-; RV64IM-NEXT:    mul a0, a0, a1
+; RV64IM-NEXT:    slli a1, a0, 8
+; RV64IM-NEXT:    slli a0, a0, 12
+; RV64IM-NEXT:    sub a0, a0, a1
 ; RV64IM-NEXT:    ret
   %1 = mul i64 %a, 3840
   ret i64 %1
@@ -909,20 +872,18 @@
 ;
 ; RV64I-LABEL: muli64_m4352:
 ; RV64I:       # %bb.0:
-; RV64I-NEXT:    addi sp, sp, -16
-; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
-; RV64I-NEXT:    lui a1, 1048575
-; RV64I-NEXT:    addiw a1, a1, -256
-; RV64I-NEXT:    call __muldi3@plt
-; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
-; RV64I-NEXT:    addi sp, sp, 16
+; RV64I-NEXT:    slli a1, a0, 8
+; RV64I-NEXT:    slli a0, a0, 12
+; RV64I-NEXT:    add a0, a0, a1
+; RV64I-NEXT:    neg a0, a0
 ; RV64I-NEXT:    ret
 ;
 ; RV64IM-LABEL: muli64_m4352:
 ; RV64IM:       # %bb.0:
-; RV64IM-NEXT:    lui a1, 1048575
-; RV64IM-NEXT:    addiw a1, a1, -256
-; RV64IM-NEXT:    mul a0, a0, a1
+; RV64IM-NEXT:    slli a1, a0, 8
+; RV64IM-NEXT:    slli a0, a0, 12
+; RV64IM-NEXT:    add a0, a0, a1
+; RV64IM-NEXT:    neg a0, a0
 ; RV64IM-NEXT:    ret
   %1 = mul i64 %a, -4352
   ret i64 %1
@@ -954,20 +915,16 @@
 ;
 ; RV64I-LABEL: muli64_m3840:
 ; RV64I:       # %bb.0:
-; RV64I-NEXT:    addi sp, sp, -16
-; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
-; RV64I-NEXT:    lui a1, 1048575
-; RV64I-NEXT:    addiw a1, a1, 256
-; RV64I-NEXT:    call __muldi3@plt
-; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
-; RV64I-NEXT:    addi sp, sp, 16
+; RV64I-NEXT:    slli a1, a0, 12
+; RV64I-NEXT:    slli a0, a0, 8
+; RV64I-NEXT:    sub a0, a0, a1
 ; RV64I-NEXT:    ret
 ;
 ; RV64IM-LABEL: muli64_m3840:
 ; RV64IM:       # %bb.0:
-; RV64IM-NEXT:    lui a1, 1048575
-; RV64IM-NEXT:    addiw a1, a1, 256
-; RV64IM-NEXT:    mul a0, a0, a1
+; RV64IM-NEXT:    slli a1, a0, 12
+; RV64IM-NEXT:    slli a0, a0, 8
+; RV64IM-NEXT:    sub a0, a0, a1
 ; RV64IM-NEXT:    ret
   %1 = mul i64 %a, -3840
   ret i64 %1