[X86] Add REX prefix for GOTTPOFF/TLSDESC relocs in x32 mode

[hvdijk]

Summary

The REX prefix is needed to allow linker relaxations: even if the
instruction we emit may not need it, the linker may change it to a
different instruction which does need it.

[RKSimon]

LGTM with a few minors

llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp

1228

clang-format - check that you're not exceeding col80

1241

(style) const auto *Ref

[hvdijk]

I accidentally pushed this with the original commit message as 2aae2136, causing a missing link to/from this review. Manually linking this here now.

llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp

void emitVEXOpcodePrefix(int MemOperand, const MCInst &MI,
                            raw_ostream &OS) const;
 
   void emitSegmentOverridePrefix(unsigned SegOperand, const MCInst &MI,
                                  raw_ostream &OS) const;
 
   bool emitOpcodePrefix(int MemOperand, const MCInst &MI,
                         const MCSubtargetInfo &STI, raw_ostream &OS) const;
 
-  bool emitREXPrefix(int MemOperand, const MCInst &MI, raw_ostream &OS) const;
+  bool emitREXPrefix(int MemOperand, const MCInst &MI,
+                     const MCSubtargetInfo &STI, raw_ostream &OS) const;
 };
 
 } // end anonymous namespace
 
 static uint8_t modRMByte(unsigned Mod, unsigned RegOpcode, unsigned RM) {
   assert(Mod < 4 && RegOpcode < 8 && RM < 8 && "ModRM Fields out of range!");
   return RM | (RegOpcode << 3) | (Mod << 6);
 }

 
 /// Emit REX prefix which specifies
 ///   1) 64-bit instructions,
 ///   2) non-default operand size, and
 ///   3) use of X86-64 extended registers.
 ///
 /// \returns true if REX prefix is used, otherwise returns false.
 bool X86MCCodeEmitter::emitREXPrefix(int MemOperand, const MCInst &MI,
+                                     const MCSubtargetInfo &STI,
                                      raw_ostream &OS) const {
   uint8_t REX = [&, MemOperand]() {
     uint8_t REX = 0;
     bool UsesHighByteReg = false;
 
     const MCInstrDesc &Desc = MCII.get(MI.getOpcode());
     uint64_t TSFlags = Desc.TSFlags;
 
     if (TSFlags & X86II::REX_W)
       REX |= 1 << 3; // set REX.W
 
     if (MI.getNumOperands() == 0)
       return REX;
 
     unsigned NumOps = MI.getNumOperands();
     unsigned CurOp = X86II::getOperandBias(Desc);
 
     // If it accesses SPL, BPL, SIL, or DIL, then it requires a 0x40 REX prefix.
     for (unsigned i = CurOp; i != NumOps; ++i) {
       const MCOperand &MO = MI.getOperand(i);
-      if (!MO.isReg())
-        continue;
+      if (MO.isReg()) {
         unsigned Reg = MO.getReg();
         if (Reg == X86::AH || Reg == X86::BH || Reg == X86::CH || Reg == X86::DH)
           UsesHighByteReg = true;
         if (X86II::isX86_64NonExtLowByteReg(Reg))
           // FIXME: The caller of determineREXPrefix slaps this prefix onto
           // anything that returns non-zero.
           REX |= 0x40; // REX fixed encoding prefix
+      } else if (MO.isExpr() &&
+                 STI.getTargetTriple().getEnvironment() == Triple::GNUX32) {
+        // GOTTPOFF and TLSDESC relocations require a REX prefix to allow
+        // linker optimizations: even if the instructions we see may not require
+        // any prefix, they may be replaced by instructions that do. This is
+        // handled as a special case here so that it also works for hand-written
+        // assembly without the user needing to write REX, as with GNU as.
+        const MCSymbolRefExpr *Ref = dyn_cast<MCSymbolRefExpr>(MO.getExpr());
+        if (Ref && (Ref->getKind() == MCSymbolRefExpr::VK_GOTTPOFF ||
+                    Ref->getKind() == MCSymbolRefExpr::VK_TLSDESC)) {
+          REX |= 0x40; // REX fixed encoding prefix
+        }
+      }
     }
 
     switch (TSFlags & X86II::FormMask) {
     case X86II::AddRegFrm:
       REX |= isREXExtendedReg(MI, CurOp++) << 0; // REX.B
       break;
     case X86II::MRMSrcReg:
     case X86II::MRMSrcRegCC:
case X86II::XD: // F2
     emitByte(0xF2, OS);
     break;
   }
 
   // Handle REX prefix.
   assert((STI.hasFeature(X86::Mode64Bit) || !(TSFlags & X86II::REX_W)) &&
          "REX.W requires 64bit mode.");
   bool HasREX = STI.hasFeature(X86::Mode64Bit)
-                    ? emitREXPrefix(MemOperand, MI, OS)
+                    ? emitREXPrefix(MemOperand, MI, STI, OS)
                     : false;
 
   // 0x0F escape code must be emitted just before the opcode.
   switch (TSFlags & X86II::OpMapMask) {
   case X86II::TB:        // Two-byte opcode map
   case X86II::T8:        // 0F 38
   case X86II::TA:        // 0F 3A
   case X86II::ThreeDNow: // 0F 0F, second 0F emitted by caller.

llvm/test/MC/X86/tlsdesc-x32.s

+# RUN: llvm-mc -triple x86_64-pc-linux-gnux32 %s | FileCheck --check-prefix=PRINT %s
+
+# RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnux32 %s -o %t
+# RUN: llvm-readelf -s %t | FileCheck --check-prefix=SYM %s
+# RUN: llvm-objdump -d -r %t | FileCheck --match-full-lines %s
+
+# PRINT:      leal a@tlsdesc(%rip), %eax
+# PRINT-NEXT: callq *a@tlscall(%eax)
+
+# SYM: TLS GLOBAL DEFAULT UND a
+
+# CHECK:      0: 40 8d 05 00 00 00 00  leal (%rip), %eax  # 7 <{{.*}}>
+# CHECK-NEXT:   00000003: R_X86_64_GOTPC32_TLSDESC a-0x4
+# CHECK-NEXT: 7: 67 ff 10              callq *(%eax)
+# CHECK-NEXT:   00000007: R_X86_64_TLSDESC_CALL a
+# CHECK-NEXT: a: 8d 05 34 12 00 00     leal 4660(%rip), %eax # {{.*}}
+
+lea a@tlsdesc(%rip), %eax
+call *a@tlscall(%eax)
+lea 0x1234(%rip), %eax