Index: llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp =================================================================== --- llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp +++ llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp @@ -632,6 +632,7 @@ static_cast(MF.getSubtarget().getInstrInfo()); const SystemZSubtarget &STI = MF.getSubtarget(); const SystemZTargetLowering &TLI = *STI.getTargetLowering(); + bool StoreBackchain = MF.getFunction().hasFnAttribute("backchain"); MachineInstr *StackAllocMI = nullptr; for (MachineInstr &MI : PrologMBB) @@ -677,8 +678,9 @@ uint64_t LoopAlloc = ProbeSize * NumFullBlocks; SPOffsetFromCFA -= LoopAlloc; - BuildMI(*MBB, MBBI, DL, ZII->get(SystemZ::LGR), SystemZ::R1D) - .addReg(SystemZ::R15D); + if (!StoreBackchain) + BuildMI(*MBB, MBBI, DL, ZII->get(SystemZ::LGR), SystemZ::R1D) + .addReg(SystemZ::R15D); buildDefCFAReg(*MBB, MBBI, DL, SystemZ::R1D, ZII); emitIncrement(*MBB, MBBI, DL, SystemZ::R1D, -int64_t(LoopAlloc), ZII); buildCFAOffs(*MBB, MBBI, DL, -int64_t(SystemZMC::CallFrameSize + LoopAlloc), @@ -700,6 +702,8 @@ MBB = DoneMBB; MBBI = DoneMBB->begin(); buildDefCFAReg(*MBB, MBBI, DL, SystemZ::R15D, ZII); + if (StoreBackchain) + emitIncrement(*MBB, MBBI, DL, SystemZ::R1D, int64_t(LoopAlloc), ZII); recomputeLiveIns(*DoneMBB); recomputeLiveIns(*LoopMBB); Index: llvm/test/CodeGen/SystemZ/stack-clash-protection.ll =================================================================== --- llvm/test/CodeGen/SystemZ/stack-clash-protection.ll +++ llvm/test/CodeGen/SystemZ/stack-clash-protection.ll @@ -237,6 +237,37 @@ ret i32 %c } +define void @fun9() #0 "backchain" { +; CHECK-LABEL: fun9: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: lgr %r1, %r15 +; CHECK-NEXT: .cfi_def_cfa_register %r1 +; CHECK-NEXT: aghi %r1, -28672 +; CHECK-NEXT: .cfi_def_cfa_offset 28832 +; CHECK-NEXT: .LBB9_1: # %entry +; CHECK-NEXT: # =>This Inner Loop Header: Depth=1 +; CHECK-NEXT: aghi %r15, -4096 +; CHECK-NEXT: cg %r0, 4088(%r15) +; CHECK-NEXT: clgrjh %r15, %r1, .LBB9_1 +; CHECK-NEXT: # %bb.2: # %entry +; CHECK-NEXT: .cfi_def_cfa_register %r15 +; CHECK-NEXT: aghi %r1, 28672 +; CHECK-NEXT: stg %r1, 0(%r15) +; CHECK-NEXT: mvhi 180(%r15), 0 +; CHECK-NEXT: l %r0, 180(%r15) +; CHECK-NEXT: aghi %r15, 28672 +; CHECK-NEXT: br %r14 +entry: + %stack = alloca [7122 x i32], align 4 + %i = alloca i32, align 4 + %0 = bitcast [7122 x i32]* %stack to i8* + %i.0.i.0..sroa_cast = bitcast i32* %i to i8* + store volatile i32 0, i32* %i, align 4 + %i.0.i.0.6 = load volatile i32, i32* %i, align 4 + ret void +} + + declare i32 @foo() attributes #0 = { "probe-stack"="inline-asm" }