diff --git a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp --- a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp +++ b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp @@ -867,12 +867,11 @@ } static std::unique_ptr - createVType(APInt Sew, APInt Lmul, bool Fractional, bool TailAgnostic, + createVType(unsigned Sew, unsigned Lmul, bool Fractional, bool TailAgnostic, bool MaskedoffAgnostic, SMLoc S, bool IsRV64) { auto Op = std::make_unique(KindTy::VType); - Sew.ashrInPlace(3); - unsigned SewLog2 = Sew.logBase2(); - unsigned LmulLog2 = Lmul.logBase2(); + unsigned SewLog2 = Log2_32(Sew / 8); + unsigned LmulLog2 = Log2_32(Lmul); Op->VType.Sew = static_cast(SewLog2); if (Fractional) { unsigned Flmul = 8 - LmulLog2; @@ -1598,7 +1597,9 @@ StringRef Name = getLexer().getTok().getIdentifier(); if (!Name.consume_front("e")) return MatchOperand_NoMatch; - APInt Sew(16, Name, 10); + unsigned Sew; + if (Name.getAsInteger(10, Sew)) + return MatchOperand_NoMatch; if (Sew != 8 && Sew != 16 && Sew != 32 && Sew != 64 && Sew != 128 && Sew != 256 && Sew != 512 && Sew != 1024) return MatchOperand_NoMatch; @@ -1616,7 +1617,9 @@ if (Name.consume_front("f")) { Fractional = true; } - APInt Lmul(16, Name, 10); + unsigned Lmul; + if (Name.getAsInteger(10, Lmul)) + return MatchOperand_NoMatch; if (Lmul != 1 && Lmul != 2 && Lmul != 4 && Lmul != 8) return MatchOperand_NoMatch; getLexer().Lex(); diff --git a/llvm/test/MC/RISCV/rvv/invalid.s b/llvm/test/MC/RISCV/rvv/invalid.s --- a/llvm/test/MC/RISCV/rvv/invalid.s +++ b/llvm/test/MC/RISCV/rvv/invalid.s @@ -31,6 +31,12 @@ vsetvli a2, a0, e8,m1,mu # CHECK-ERROR: operand must be e[8|16|32|64|128|256|512|1024],m[1|2|4|8|f2|f4|f8],[ta|tu],[ma|mu] +vsetvli a2, a0, e8x,m1,tu,mu +# CHECK-ERROR: operand must be e[8|16|32|64|128|256|512|1024],m[1|2|4|8|f2|f4|f8],[ta|tu],[ma|mu] + +vsetvli a2, a0, e8,m1z,tu,mu +# CHECK-ERROR: operand must be e[8|16|32|64|128|256|512|1024],m[1|2|4|8|f2|f4|f8],[ta|tu],[ma|mu] + vadd.vv v1, v3, v2, v4.t # CHECK-ERROR: operand must be v0.t