Index: clang/include/clang/Basic/BuiltinsPPC.def
===================================================================
--- clang/include/clang/Basic/BuiltinsPPC.def
+++ clang/include/clang/Basic/BuiltinsPPC.def
@@ -638,6 +638,11 @@
 BUILTIN(__builtin_cntlzdm, "ULLiULLiULLi", "")
 BUILTIN(__builtin_cnttzdm, "ULLiULLiULLi", "")
 
+// Generate random number
+BUILTIN(__builtin_darn, "LLi", "")
+BUILTIN(__builtin_darn_raw, "LLi", "")
+BUILTIN(__builtin_darn_32, "i", "")
+
 // Vector int128 (un)pack
 BUILTIN(__builtin_unpack_vector_int128, "ULLiV1LLLii", "")
 BUILTIN(__builtin_pack_vector_int128, "V1LLLiULLiULLi", "")
Index: clang/test/CodeGen/builtins-ppc.c
===================================================================
--- clang/test/CodeGen/builtins-ppc.c
+++ clang/test/CodeGen/builtins-ppc.c
@@ -36,3 +36,16 @@
   // CHECK: call double @llvm.ppc.setflm(double %1)
   res = __builtin_setflm(res);
 }
+
+void test_builtin_ppc_darn() {
+  volatile long res;
+  volatile int x;
+  // CHECK: call i64 @llvm.ppc.darn()
+  res = __builtin_darn();
+
+  // CHECK: call i64 @llvm.ppc.darnraw()
+  res = __builtin_darn_raw();
+
+  // CHECK: call i32 @llvm.ppc.darn32()
+  x = __builtin_darn_32();
+}
Index: llvm/include/llvm/IR/IntrinsicsPowerPC.td
===================================================================
--- llvm/include/llvm/IR/IntrinsicsPowerPC.td
+++ llvm/include/llvm/IR/IntrinsicsPowerPC.td
@@ -68,6 +68,14 @@
                        Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty],
                                  [IntrNoMem]>;
 
+  // Generate a random number
+  def int_ppc_darn : GCCBuiltin<"__builtin_darn">,
+                     Intrinsic<[llvm_i64_ty], [], [IntrNoMem]>;
+  def int_ppc_darnraw : GCCBuiltin<"__builtin_darn_raw">,
+                     Intrinsic<[llvm_i64_ty], [], [IntrNoMem]>;
+  def int_ppc_darn32 : GCCBuiltin<"__builtin_darn_32">,
+                     Intrinsic<[llvm_i32_ty], [], [IntrNoMem]>;
+
   // Bit permute doubleword
   def int_ppc_bpermd : GCCBuiltin<"__builtin_bpermd">,
                        Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty],
Index: llvm/lib/Target/PowerPC/PPCInstr64Bit.td
===================================================================
--- llvm/lib/Target/PowerPC/PPCInstr64Bit.td
+++ llvm/lib/Target/PowerPC/PPCInstr64Bit.td
@@ -1564,6 +1564,12 @@
 def : Pat<(rotl i64:$in, (i32 imm:$imm)),
           (RLDICL $in, imm:$imm, 0)>;
 
+// DARN (deliver random number)
+// L=0 for 32-bit, L=1 for conditioned random, L=2 for raw random
+def : Pat<(int_ppc_darn32), (EXTRACT_SUBREG (DARN 0), sub_32)>;
+def : Pat<(int_ppc_darn), (DARN 1)>;
+def : Pat<(int_ppc_darnraw), (DARN 2)>;
+
 // Hi and Lo for Darwin Global Addresses.
 def : Pat<(PPChi tglobaladdr:$in, 0), (LIS8 tglobaladdr:$in)>;
 def : Pat<(PPClo tglobaladdr:$in, 0), (LI8  tglobaladdr:$in)>;
Index: llvm/test/CodeGen/PowerPC/builtins-ppc-p9-darn.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/builtins-ppc-p9-darn.ll
@@ -0,0 +1,38 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -verify-machineinstrs -mtriple powerpc64le -mcpu=pwr9 | FileCheck %s
+
+define i64 @raw() {
+; CHECK-LABEL: raw:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    darn 3, 2
+; CHECK-NEXT:    blr
+entry:
+  %0 = call i64 @llvm.ppc.darnraw()
+  ret i64 %0
+}
+
+
+define i64 @conditioned() {
+; CHECK-LABEL: conditioned:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    darn 3, 1
+; CHECK-NEXT:    blr
+entry:
+  %0 = call i64 @llvm.ppc.darn()
+  ret i64 %0
+}
+
+define signext i32 @word() {
+; CHECK-LABEL: word:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    darn 3, 0
+; CHECK-NEXT:    extsw 3, 3
+; CHECK-NEXT:    blr
+entry:
+  %0 = call i32 @llvm.ppc.darn32()
+  ret i32 %0
+}
+
+declare i64 @llvm.ppc.darn()
+declare i64 @llvm.ppc.darnraw()
+declare i32 @llvm.ppc.darn32()