diff --git a/llvm/include/llvm/BinaryFormat/XCOFF.h b/llvm/include/llvm/BinaryFormat/XCOFF.h --- a/llvm/include/llvm/BinaryFormat/XCOFF.h +++ b/llvm/include/llvm/BinaryFormat/XCOFF.h @@ -18,6 +18,7 @@ namespace llvm { class StringRef; +template class SmallString; namespace XCOFF { @@ -28,6 +29,7 @@ constexpr size_t SymbolTableEntrySize = 18; constexpr size_t RelocationSerializationSize32 = 10; constexpr uint16_t RelocOverflow = 65535; +constexpr uint8_t AllocRegNo = 31; enum ReservedSectionNum : int16_t { N_DEBUG = -2, N_ABS = -1, N_UNDEF = 0 }; @@ -294,8 +296,29 @@ StringRef getMappingClassString(XCOFF::StorageMappingClass SMC); StringRef getRelocationTypeString(XCOFF::RelocationType Type); +SmallString<32> parseParmsTypeWithVecInfo(uint32_t Value, + unsigned int ParmsNum); +SmallString<32> parseParmsType(uint32_t Value, unsigned ParmsNum); struct TracebackTable { + enum LanguageID : uint8_t { + C, + Fortran, + Pascal, + Ada, + PL1, + Basic, + Lisp, + Cobol, + Modula2, + CPlusPlus, + Rpg, + PL8, + PLIX = PL8, + Assembly, + Java, + ObjectiveC + }; // Byte 1 static constexpr uint32_t VersionMask = 0xFF00'0000; static constexpr uint8_t VersionShift = 24; @@ -370,6 +393,7 @@ static constexpr uint32_t ParmTypeIsVectorShortBit = 0x4000'0000; static constexpr uint32_t ParmTypeIsVectorIntBit = 0x8000'0000; static constexpr uint32_t ParmTypeIsVectorFloatBit = 0xC000'0000; + static constexpr uint8_t WidthOfParmTypeMask = 2; }; // Extended Traceback table flags. @@ -381,6 +405,8 @@ TB_LONGTBTABLE2 = 0x01 ///< Additional tbtable extension exists }; +StringRef getNameForTracebackTableLanguageId(TracebackTable::LanguageID LangId); + } // end namespace XCOFF } // end namespace llvm diff --git a/llvm/include/llvm/CodeGen/CommandFlags.h b/llvm/include/llvm/CodeGen/CommandFlags.h --- a/llvm/include/llvm/CodeGen/CommandFlags.h +++ b/llvm/include/llvm/CodeGen/CommandFlags.h @@ -99,6 +99,8 @@ bool getIgnoreXCOFFVisibility(); +bool getXCOFFTracebackTable(); + std::string getBBSections(); std::string getStackProtectorGuard(); diff --git a/llvm/include/llvm/Target/TargetMachine.h b/llvm/include/llvm/Target/TargetMachine.h --- a/llvm/include/llvm/Target/TargetMachine.h +++ b/llvm/include/llvm/Target/TargetMachine.h @@ -266,12 +266,16 @@ return Options.FunctionSections; } - /// Return true if visibility attribute should not be emitted in xcoff, + /// Return true if visibility attribute should not be emitted in XCOFF, /// corresponding to -mignore-xcoff-visibility. bool getIgnoreXCOFFVisibility() const { return Options.IgnoreXCOFFVisibility; } + /// Return true if XCOFF traceback table should be emitted, + /// corresponding to -xcoff-traceback-table. + bool getXCOFFTracebackTable() const { return Options.XCOFFTracebackTable; } + /// If basic blocks should be emitted into their own section, /// corresponding to -fbasic-block-sections. llvm::BasicBlockSection getBBSectionsType() const { diff --git a/llvm/include/llvm/Target/TargetOptions.h b/llvm/include/llvm/Target/TargetOptions.h --- a/llvm/include/llvm/Target/TargetOptions.h +++ b/llvm/include/llvm/Target/TargetOptions.h @@ -130,10 +130,10 @@ EnableFastISel(false), EnableGlobalISel(false), UseInitArray(false), DisableIntegratedAS(false), RelaxELFRelocations(false), FunctionSections(false), DataSections(false), - IgnoreXCOFFVisibility(false), UniqueSectionNames(true), - UniqueBasicBlockSectionNames(false), TrapUnreachable(false), - NoTrapAfterNoreturn(false), TLSSize(0), EmulatedTLS(false), - ExplicitEmulatedTLS(false), EnableIPRA(false), + IgnoreXCOFFVisibility(false), XCOFFTracebackTable(true), + UniqueSectionNames(true), UniqueBasicBlockSectionNames(false), + TrapUnreachable(false), NoTrapAfterNoreturn(false), TLSSize(0), + EmulatedTLS(false), ExplicitEmulatedTLS(false), EnableIPRA(false), EmitStackSizeSection(false), EnableMachineOutliner(false), EnableMachineFunctionSplitter(false), SupportsDefaultOutlining(false), EmitAddrsig(false), EmitCallSiteInfo(false), @@ -247,6 +247,9 @@ /// Do not emit visibility attribute for xcoff. unsigned IgnoreXCOFFVisibility : 1; + /// Emit XCOFF traceback table. + unsigned XCOFFTracebackTable : 1; + unsigned UniqueSectionNames : 1; /// Use unique names for basic block sections. diff --git a/llvm/lib/BinaryFormat/XCOFF.cpp b/llvm/lib/BinaryFormat/XCOFF.cpp --- a/llvm/lib/BinaryFormat/XCOFF.cpp +++ b/llvm/lib/BinaryFormat/XCOFF.cpp @@ -7,6 +7,7 @@ //===----------------------------------------------------------------------===// #include "llvm/BinaryFormat/XCOFF.h" +#include "llvm/ADT/SmallString.h" #include "llvm/ADT/StringRef.h" using namespace llvm; @@ -75,4 +76,99 @@ } return "Unknown"; } + +#define LANG_CASE(A) \ + case XCOFF::TracebackTable::A: \ + return #A; + +StringRef XCOFF::getNameForTracebackTableLanguageId( + XCOFF::TracebackTable::LanguageID LangId) { + switch (LangId) { + LANG_CASE(C) + LANG_CASE(Fortran) + LANG_CASE(Pascal) + LANG_CASE(Ada) + LANG_CASE(PL1) + LANG_CASE(Basic) + LANG_CASE(Lisp) + LANG_CASE(Cobol) + LANG_CASE(Modula2) + LANG_CASE(Rpg) + LANG_CASE(PL8) + LANG_CASE(Assembly) + LANG_CASE(Java) + LANG_CASE(ObjectiveC) + LANG_CASE(CPlusPlus) + } + return "Unknown"; +} +#undef LANG_CASE + +// ParmsNum only includes the fixed and floating parameter number, all the +// vector parameter will be decoded by the Value != 0u. +SmallString<32> XCOFF::parseParmsTypeWithVecInfo(uint32_t Value, + unsigned int ParmsNum) { + SmallString<32> ParmsType; + unsigned I = 0; + bool Begin = false; + while (I < ParmsNum || Value != 0u) { + if (Begin) + ParmsType += ", "; + else + Begin = true; + + switch (Value & TracebackTable::ParmTypeMask) { + case TracebackTable::ParmTypeIsFixedBits: + ParmsType += "i"; + ++I; + break; + case TracebackTable::ParmTypeIsVectorBits: + ParmsType += "v"; + // For we do not include the vector paramter number in the ParmsNum, the + // ++I is intentionally omitted. + break; + case TracebackTable::ParmTypeIsFloatingBits: + ParmsType += "f"; + ++I; + break; + case TracebackTable::ParmTypeIsDoubleBits: + ParmsType += "d"; + ++I; + break; + default: + assert(false && "Unrecognized bits in ParmsType."); + } + Value <<= TracebackTable::WidthOfParmTypeMask; + } + assert(I == ParmsNum && + "The total parameters number of fixed-point and floating-point" + "parameters not equal to the number in the parameter type!"); + return ParmsType; +} + +SmallString<32> XCOFF::parseParmsType(uint32_t Value, unsigned ParmsNum) { + SmallString<32> ParmsType; + for (unsigned I = 0; I < ParmsNum; ++I) { + if (I != 0) + ParmsType += ", "; + if ((Value & TracebackTable::ParmTypeIsFloatingBit) == 0) { + // Fixed parameter type. + ParmsType += "i"; + Value <<= 1; + } else { + if ((Value & TracebackTable::ParmTypeFloatingIsDoubleBit) == 0) + // Float parameter type. + ParmsType += "f"; + else + // Double parameter type. + ParmsType += "d"; + + Value <<= 2; + } + } + assert(Value == 0u && "The paramter number in the ParamTpye is not equal to " + "argument ParamsNum."); + return ParmsType; +} + #undef RELOC_CASE diff --git a/llvm/lib/CodeGen/CommandFlags.cpp b/llvm/lib/CodeGen/CommandFlags.cpp --- a/llvm/lib/CodeGen/CommandFlags.cpp +++ b/llvm/lib/CodeGen/CommandFlags.cpp @@ -76,6 +76,7 @@ CGOPT_EXP(bool, DataSections) CGOPT_EXP(bool, FunctionSections) CGOPT(bool, IgnoreXCOFFVisibility) +CGOPT(bool, XCOFFTracebackTable) CGOPT(std::string, BBSections) CGOPT(std::string, StackProtectorGuard) CGOPT(unsigned, StackProtectorGuardOffset) @@ -351,6 +352,11 @@ cl::init(false)); CGBINDOPT(IgnoreXCOFFVisibility); + static cl::opt XCOFFTracebackTable( + "xcoff-traceback-table", cl::desc("Emit the XCOFF traceback table"), + cl::init(true)); + CGBINDOPT(XCOFFTracebackTable); + static cl::opt BBSections( "basic-block-sections", cl::desc("Emit basic blocks into separate sections"), @@ -539,6 +545,7 @@ getExplicitDataSections().getValueOr(TheTriple.hasDefaultDataSections()); Options.FunctionSections = getFunctionSections(); Options.IgnoreXCOFFVisibility = getIgnoreXCOFFVisibility(); + Options.XCOFFTracebackTable = getXCOFFTracebackTable(); Options.BBSections = getBBSectionsMode(Options); Options.UniqueSectionNames = getUniqueSectionNames(); Options.UniqueBasicBlockSectionNames = getUniqueBasicBlockSectionNames(); diff --git a/llvm/lib/Object/XCOFFObjectFile.cpp b/llvm/lib/Object/XCOFFObjectFile.cpp --- a/llvm/lib/Object/XCOFFObjectFile.cpp +++ b/llvm/lib/Object/XCOFFObjectFile.cpp @@ -904,67 +904,6 @@ return ParmsType; } -static SmallString<32> parseParmsTypeWithVecInfo(uint32_t Value, - unsigned int ParmsNum) { - SmallString<32> ParmsType; - unsigned I = 0; - bool Begin = false; - while (I < ParmsNum || Value) { - if (Begin) - ParmsType += ", "; - else - Begin = true; - - switch (Value & TracebackTable::ParmTypeMask) { - case TracebackTable::ParmTypeIsFixedBits: - ParmsType += "i"; - ++I; - break; - case TracebackTable::ParmTypeIsVectorBits: - ParmsType += "v"; - break; - case TracebackTable::ParmTypeIsFloatingBits: - ParmsType += "f"; - ++I; - break; - case TracebackTable::ParmTypeIsDoubleBits: - ParmsType += "d"; - ++I; - break; - default: - assert(false && "Unrecognized bits in ParmsType."); - } - Value <<= 2; - } - assert(I == ParmsNum && - "The total parameters number of fixed-point or floating-point " - "parameters not equal to the number in the parameter type!"); - return ParmsType; -} - -static SmallString<32> parseParmsType(uint32_t Value, unsigned ParmsNum) { - SmallString<32> ParmsType; - for (unsigned I = 0; I < ParmsNum; ++I) { - if (I != 0) - ParmsType += ", "; - if ((Value & TracebackTable::ParmTypeIsFloatingBit) == 0) { - // Fixed parameter type. - ParmsType += "i"; - Value <<= 1; - } else { - if ((Value & TracebackTable::ParmTypeFloatingIsDoubleBit) == 0) - // Float parameter type. - ParmsType += "f"; - else - // Double parameter type. - ParmsType += "d"; - - Value <<= 2; - } - } - return ParmsType; -} - Expected XCOFFTracebackTable::create(const uint8_t *Ptr, uint64_t &Size) { Error Err = Error::success(); diff --git a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp --- a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp +++ b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp @@ -74,6 +74,7 @@ #include using namespace llvm; +using namespace llvm::XCOFF; #define DEBUG_TYPE "asmprinter" @@ -163,6 +164,8 @@ DenseMap> GOAliasMap; + void emitTracebackTable(); + public: PPCAIXAsmPrinter(TargetMachine &TM, std::unique_ptr Streamer) : PPCAsmPrinter(TM, std::move(Streamer)) { @@ -186,6 +189,8 @@ void emitFunctionEntryLabel() override; + void emitFunctionBodyEnd() override; + void emitEndOfAsmFile(Module &) override; void emitLinkage(const GlobalValue *GV, MCSymbol *GVSym) const override; @@ -1731,6 +1736,247 @@ return AsmPrinter::SetupMachineFunction(MF); } +void PPCAIXAsmPrinter::emitFunctionBodyEnd() { + + if (!TM.getXCOFFTracebackTable()) + return; + + emitTracebackTable(); +} + +void PPCAIXAsmPrinter::emitTracebackTable() { + + // Create a symbol for the end of function. + MCSymbol *FuncEnd = createTempSymbol(MF->getName()); + OutStreamer->emitLabel(FuncEnd); + + OutStreamer->AddComment("Traceback table begin"); + // Begin with a fullword of zero. + OutStreamer->emitIntValueInHexWithPadding(0, 4 /*size*/); + + SmallString<128> CommentString; + raw_svector_ostream CommentOS(CommentString); + + auto EmitComment = [&]() { + OutStreamer->AddComment(CommentOS.str()); + CommentString.clear(); + }; + + auto EmitCommentAndValue = [&](uint64_t Value, int Size) { + EmitComment(); + OutStreamer->emitIntValueInHexWithPadding(Value, Size); + }; + + unsigned int Version = 0; + CommentOS << "Version = " << Version; + EmitCommentAndValue(Version, 1); + + // There is a lack of information in the IR to assist with determining the + // source language, AIX exception handling mechanism would only search for + // personality routine and LSDA area when such language supports exception + // handling. So to be conservatively correct and allow runtime to do its job, + // we need to set it to C++ for now. + TracebackTable::LanguageID LanguageIdentifier = + TracebackTable::CPlusPlus; // C++ + + CommentOS << "Language = " + << getNameForTracebackTableLanguageId(LanguageIdentifier); + EmitCommentAndValue(LanguageIdentifier, 1); + + // This is only populated for the third and fourth bytes. + uint32_t FirstHalfOfMandatoryField = 0; + + // Emit the 3rd byte of the mandatory field. + + // We always set traceback offset bit to true. + FirstHalfOfMandatoryField |= TracebackTable::HasTraceBackTableOffsetMask; + + const PPCFunctionInfo *FI = MF->getInfo(); + const MachineRegisterInfo &MRI = MF->getRegInfo(); + + // Check the function uses floating-point processor instructions or not + for (unsigned Reg = PPC::F0; Reg <= PPC::F31; ++Reg) { + if (MRI.isPhysRegUsed(Reg)) { + FirstHalfOfMandatoryField |= TracebackTable::IsFloatingPointPresentMask; + break; + } + } + +#define GENBOOLCOMMENT(Prefix, V, Field) \ + CommentOS << (Prefix) << ((V) & (TracebackTable::Field##Mask) ? "+" : "-") \ + << #Field + +#define GENVALUECOMMENT(PrefixAndName, V, Field) \ + CommentOS << (PrefixAndName) << " = " \ + << static_cast(((V) & (TracebackTable::Field##Mask)) >> \ + (TracebackTable::Field##Shift)) + + GENBOOLCOMMENT("", FirstHalfOfMandatoryField, IsGlobaLinkage); + GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsOutOfLineEpilogOrPrologue); + EmitComment(); + + GENBOOLCOMMENT("", FirstHalfOfMandatoryField, HasTraceBackTableOffset); + GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsInternalProcedure); + EmitComment(); + + GENBOOLCOMMENT("", FirstHalfOfMandatoryField, HasControlledStorage); + GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsTOCless); + EmitComment(); + + GENBOOLCOMMENT("", FirstHalfOfMandatoryField, IsFloatingPointPresent); + EmitComment(); + GENBOOLCOMMENT("", FirstHalfOfMandatoryField, + IsFloatingPointOperationLogOrAbortEnabled); + EmitComment(); + + OutStreamer->emitIntValueInHexWithPadding( + (FirstHalfOfMandatoryField & 0x0000ff00) >> 8, 1); + + // Set the 4th byte of the mandatory field. + FirstHalfOfMandatoryField |= TracebackTable::IsFunctionNamePresentMask; + + if (MRI.isPhysRegUsed(Subtarget->isPPC64() ? PPC::X31 : PPC::R31)) + FirstHalfOfMandatoryField |= TracebackTable::IsAllocaUsedMask; + + const SmallVectorImpl &MustSaveCRs = FI->getMustSaveCRs(); + if (!MustSaveCRs.empty()) + FirstHalfOfMandatoryField |= TracebackTable::IsCRSavedMask; + + if (FI->mustSaveLR()) + FirstHalfOfMandatoryField |= TracebackTable::IsLRSavedMask; + + GENBOOLCOMMENT("", FirstHalfOfMandatoryField, IsInterruptHandler); + GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsFunctionNamePresent); + GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsAllocaUsed); + EmitComment(); + GENVALUECOMMENT("OnConditionDirective", FirstHalfOfMandatoryField, + OnConditionDirective); + GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsCRSaved); + GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsLRSaved); + EmitComment(); + OutStreamer->emitIntValueInHexWithPadding((FirstHalfOfMandatoryField & 0xff), + 1); + + // Set the 5th byte of mandatory field. + uint32_t SecondHalfOfMandatoryField = 0; + + // Always store back chain. + SecondHalfOfMandatoryField |= TracebackTable::IsBackChainStoredMask; + + uint32_t FPRSaved = 0; + for (unsigned Reg = PPC::F14; Reg <= PPC::F31; Reg++) { + if (MRI.isPhysRegModified(Reg)) { + FPRSaved = PPC::F31 - Reg + 1; + break; + } + } + SecondHalfOfMandatoryField |= (FPRSaved << TracebackTable::FPRSavedShift) & + TracebackTable::FPRSavedMask; + GENBOOLCOMMENT("", SecondHalfOfMandatoryField, IsBackChainStored); + GENBOOLCOMMENT(", ", SecondHalfOfMandatoryField, IsFixup); + GENVALUECOMMENT(", NumOfFPRsSaved", SecondHalfOfMandatoryField, FPRSaved); + EmitComment(); + OutStreamer->emitIntValueInHexWithPadding( + (SecondHalfOfMandatoryField & 0xff000000) >> 24, 1); + + // Set the 6th byte of mandatory field. + uint32_t GPRSaved = 0; + + // X13 is reserved under 64-bit environment. + unsigned GPRBegin = Subtarget->isPPC64() ? PPC::X14 : PPC::R13; + unsigned GPREnd = Subtarget->isPPC64() ? PPC::X31 : PPC::R31; + + for (unsigned Reg = GPRBegin; Reg <= GPREnd; Reg++) { + if (MRI.isPhysRegModified(Reg)) { + GPRSaved = GPREnd - Reg + 1; + break; + } + } + + SecondHalfOfMandatoryField |= (GPRSaved << TracebackTable::GPRSavedShift) & + TracebackTable::GPRSavedMask; + + GENBOOLCOMMENT("", SecondHalfOfMandatoryField, HasExtensionTable); + GENBOOLCOMMENT(", ", SecondHalfOfMandatoryField, HasVectorInfo); + GENVALUECOMMENT(", NumOfGPRsSaved", SecondHalfOfMandatoryField, GPRSaved); + EmitComment(); + OutStreamer->emitIntValueInHexWithPadding( + (SecondHalfOfMandatoryField & 0x00ff0000) >> 16, 1); + + // Set the 7th byte of mandatory field. + uint32_t NumberOfFixedPara = FI->getFixedParamNum(); + SecondHalfOfMandatoryField |= + (NumberOfFixedPara << TracebackTable::NumberOfFixedParmsShift) & + TracebackTable::NumberOfFixedParmsMask; + GENVALUECOMMENT("NumberOfFixedParms", SecondHalfOfMandatoryField, + NumberOfFixedParms); + EmitComment(); + OutStreamer->emitIntValueInHexWithPadding( + (SecondHalfOfMandatoryField & 0x0000ff00) >> 8, 1); + + // Set the 8th byte of mandatory field. + + // Always set parameter on stack. + SecondHalfOfMandatoryField |= TracebackTable::HasParmsOnStackMask; + + uint32_t NumberOfFPPara = FI->getFloatingPointParamNum(); + SecondHalfOfMandatoryField |= + (NumberOfFPPara << TracebackTable::NumberOfFloatingPointParmsShift) & + TracebackTable::NumberOfFloatingPointParmsMask; + + GENVALUECOMMENT("NumberOfFPParms", SecondHalfOfMandatoryField, + NumberOfFloatingPointParms); + GENBOOLCOMMENT(", ", SecondHalfOfMandatoryField, HasParmsOnStack); + EmitComment(); + OutStreamer->emitIntValueInHexWithPadding(SecondHalfOfMandatoryField & 0xff, + 1); + + // Generate the optional fields of traceback table. + + // Parameter type. + if (NumberOfFixedPara || NumberOfFPPara) { + uint32_t ParaType = FI->getParameterType(); + CommentOS << "Parameter type = " + << XCOFF::parseParmsType(ParaType, + NumberOfFixedPara + NumberOfFPPara); + EmitComment(); + OutStreamer->emitIntValueInHexWithPadding(ParaType, sizeof(ParaType)); + } + + // Traceback table offset. + OutStreamer->AddComment("Function size"); + if (FirstHalfOfMandatoryField & TracebackTable::HasTraceBackTableOffsetMask) { + MCSymbol *FuncSectSym = getObjFileLowering().getFunctionEntryPointSymbol( + &(MF->getFunction()), TM); + OutStreamer->emitAbsoluteSymbolDiff(FuncEnd, FuncSectSym, 4); + } + + if (FirstHalfOfMandatoryField & TracebackTable::IsInterruptHandlerMask) + report_fatal_error("Hand_Mask not implement yes"); + + // Since we unset the Int_Handler. + if (FirstHalfOfMandatoryField & TracebackTable::HasControlledStorageMask) + report_fatal_error("Ctl_Info not implement yes"); + + if (FirstHalfOfMandatoryField & TracebackTable::IsFunctionNamePresentMask) { + StringRef Name = MF->getName(); + uint16_t NameLength = Name.size(); + CommentOS << "Function name len = " + << static_cast(NameLength); + EmitCommentAndValue(NameLength, 2); + OutStreamer->AddComment("Function Name"); + OutStreamer->emitBytes(Name); + } + + if (FirstHalfOfMandatoryField & TracebackTable::IsAllocaUsedMask) { + uint8_t AllocReg = XCOFF::AllocRegNo; + OutStreamer->AddComment("AllocaUsed"); + OutStreamer->emitIntValueInHex(AllocReg, sizeof(AllocReg)); + } +#undef GENBOOLCOMMENT +#undef GENVALUECOMMENT +} + void PPCAIXAsmPrinter::ValidateGV(const GlobalVariable *GV) { // Early error checking limiting what is supported. if (GV->isThreadLocal()) diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -7276,6 +7276,7 @@ SmallVector ArgLocs; MachineFunction &MF = DAG.getMachineFunction(); MachineFrameInfo &MFI = MF.getFrameInfo(); + PPCFunctionInfo *FuncInfo = MF.getInfo(); CCState CCInfo(CallConv, isVarArg, MF, ArgLocs, *DAG.getContext()); const EVT PtrVT = getPointerTy(MF.getDataLayout()); @@ -7303,6 +7304,18 @@ if (VA.isMemLoc() && VA.needsCustom()) continue; + if (VA.isRegLoc()) { + if (VA.getValVT().isScalarInteger()) + FuncInfo->incFixedParamNum(); + else if (VA.getValVT().isFloatingPoint()) { + FuncInfo->incFloatingPointParamNum(); + FuncInfo->setParameterType(VA.getValVT().SimpleTy == MVT::f32 + ? PPCFunctionInfo::ShortFloatPoint + : PPCFunctionInfo::LongFloatPoint, + VA.getValNo()); + } + } + if (Flags.isByVal() && VA.isMemLoc()) { const unsigned Size = alignTo(Flags.getByValSize() ? Flags.getByValSize() : PtrByteSize, @@ -7366,6 +7379,7 @@ const CCValAssign RL = ArgLocs[I++]; HandleRegLoc(RL.getLocReg(), Offset); + FuncInfo->incFixedParamNum(); } if (Offset != StackSize) { @@ -7428,7 +7442,6 @@ // aligned stack. CallerReservedArea = EnsureStackAlignment(Subtarget.getFrameLowering(), CallerReservedArea); - PPCFunctionInfo *FuncInfo = MF.getInfo(); FuncInfo->setMinReservedArea(CallerReservedArea); if (isVarArg) { diff --git a/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h b/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h --- a/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h +++ b/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h @@ -22,6 +22,10 @@ /// PPCFunctionInfo - This class is derived from MachineFunction private /// PowerPC target-specific information for each MachineFunction. class PPCFunctionInfo : public MachineFunctionInfo { +public: + enum ParamType { FixedType = 0, ShortFloatPoint = 2, LongFloatPoint = 3 }; + +private: virtual void anchor(); /// FramePointerSaveIndex - Frame index of where the old frame pointer is @@ -107,6 +111,19 @@ /// register for parameter passing. unsigned VarArgsNumFPR = 0; + /// FixedParamNum - Number of fixed parameter. + unsigned FixedParamNum = 0; + + /// FloatingParamNum - Number of floating point parameter. + unsigned FloatingPointParamNum = 0; + + /// ParamType - Encode type for every parameter + /// in the order of parameters passing in. + /// '0'b => fixed parameter. + /// '10'b => floating point short parameter. + /// '11'b => floating point long parameter. + unsigned ParameterType = 0; + /// CRSpillFrameIndex - FrameIndex for CR spill slot for 32-bit SVR4. int CRSpillFrameIndex = 0; @@ -190,6 +207,15 @@ unsigned getVarArgsNumGPR() const { return VarArgsNumGPR; } void setVarArgsNumGPR(unsigned Num) { VarArgsNumGPR = Num; } + unsigned getFixedParamNum() const { return FixedParamNum; } + void incFixedParamNum() { ++FixedParamNum; } + + unsigned getFloatingPointParamNum() const { return FloatingPointParamNum; } + void incFloatingPointParamNum() { ++FloatingPointParamNum; } + + unsigned getParameterType() const { return ParameterType; } + void setParameterType(ParamType Type, unsigned RegNo); + unsigned getVarArgsNumFPR() const { return VarArgsNumFPR; } void setVarArgsNumFPR(unsigned Num) { VarArgsNumFPR = Num; } diff --git a/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.cpp b/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.cpp --- a/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.cpp +++ b/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.cpp @@ -63,3 +63,25 @@ return LiveIn.second.isZExt(); return false; } + +void PPCFunctionInfo::setParameterType(ParamType Type, unsigned RegNo) { + unsigned CopyParamType = ParameterType; + unsigned Bits = 0; + for (unsigned I = 0; I < RegNo; I++) { + if (CopyParamType & 0x80000000) { + // '10'b => floating point short parameter. + // '11'b => floating point long parameter. + CopyParamType <<= 2; + Bits += 2; + } else { + // '0'b => fixed parameter. + CopyParamType <<= 1; + Bits++; + } + } + + if (Type == FixedType) + ParameterType |= Type << (31 - Bits); + else + ParameterType |= Type << (30 - Bits); +} diff --git a/llvm/test/CodeGen/PowerPC/aix-alias.ll b/llvm/test/CodeGen/PowerPC/aix-alias.ll --- a/llvm/test/CodeGen/PowerPC/aix-alias.ll +++ b/llvm/test/CodeGen/PowerPC/aix-alias.ll @@ -2,10 +2,10 @@ ; is implemnted. ; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr4 \ -; RUN: -mattr=-altivec -data-sections=false < %s | \ +; RUN: -mattr=-altivec -data-sections=false -xcoff-traceback-table=false < %s | \ ; RUN: FileCheck --check-prefix=ASM %s ; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr4 \ -; RUN: -mattr=-altivec -data-sections=false < %s | \ +; RUN: -mattr=-altivec -data-sections=false -xcoff-traceback-table=false < %s | \ ; RUN: FileCheck --check-prefix=ASM %s @var = global i32 42 diff --git a/llvm/test/CodeGen/PowerPC/aix-cc-ext-vec-abi.ll b/llvm/test/CodeGen/PowerPC/aix-cc-ext-vec-abi.ll --- a/llvm/test/CodeGen/PowerPC/aix-cc-ext-vec-abi.ll +++ b/llvm/test/CodeGen/PowerPC/aix-cc-ext-vec-abi.ll @@ -1,8 +1,8 @@ -; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=+altivec \ +; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=+altivec -xcoff-traceback-table=false \ ; RUN: -vec-extabi -mtriple powerpc-ibm-aix-xcoff < %s | \ ; RUN: FileCheck --check-prefixes=ASM32,ASM %s -; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=+altivec \ +; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=+altivec -xcoff-traceback-table=false \ ; RUN: -vec-extabi -mtriple powerpc64-ibm-aix-xcoff < %s | \ ; RUN: FileCheck --check-prefixes=ASM64,ASM %s diff --git a/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-clobber-register.ll b/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-clobber-register.ll new file mode 100644 --- /dev/null +++ b/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-clobber-register.ll @@ -0,0 +1,48 @@ +; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr4 \ +; RUN: -mattr=-altivec -xcoff-traceback-table=true < %s | \ +; RUN: FileCheck --check-prefixes=CHECK-ASM,COMMON %s + +; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -function-sections \ +; RUN: -mcpu=pwr4 -mattr=-altivec < %s | \ +; RUN: FileCheck --check-prefixes=CHECK-FUNC,COMMON %s + +define float @bar() #0 { +entry: + %fvalue = alloca float, align 4 + %taken = alloca i32, align 4 + %data = alloca i32, align 4 + store float 1.000000e+00, float* %fvalue, align 4 + %0 = load float, float* %fvalue, align 4 + %1 = call float asm "fneg $0,$1\0A\09", "=b,b,~{f31},~{f30},~{f29},~{f28},~{f27}"(float %0) + store float %1, float* %fvalue, align 4 + store i32 123, i32* %data, align 4 + %2 = load i32, i32* %data, align 4 + %3 = call i32 asm "cntlzw $0, $1\0A\09", "=b,b,~{r31},~{r30},~{r29},~{r28}"(i32 %2) + store i32 %3, i32* %taken, align 4 + %4 = load i32, i32* %taken, align 4 + %conv = sitofp i32 %4 to float + %5 = load float, float* %fvalue, align 4 + %add = fadd float %conv, %5 + ret float %add +} + +; COMMON: .vbyte 4, 0x00000000 # Traceback table begin +; COMMON-NEXT: .byte 0x00 # Version = 0 +; COMMON-NEXT: .byte 0x09 # Language = CPlusPlus +; COMMON-NEXT: .byte 0x22 # -IsGlobaLinkage, -IsOutOfLineEpilogOrPrologue +; COMMON-NEXT: # +HasTraceBackTableOffset, -IsInternalProcedure +; COMMON-NEXT: # -HasControlledStorage, -IsTOCless +; COMMON-NEXT: # +IsFloatingPointPresent +; COMMON-NEXT: # -IsFloatingPointOperationLogOrAbortEnabled +; COMMON-NEXT: .byte 0x60 # -IsInterruptHandler, +IsFunctionNamePresent, +IsAllocaUsed +; COMMON-NEXT: # OnConditionDirective = 0, -IsCRSaved, -IsLRSaved +; COMMON-NEXT: .byte 0x85 # +IsBackChainStored, -IsFixup, NumOfFPRsSaved = 5 +; COMMON-NEXT: .byte 0x04 # -HasExtensionTable, -HasVectorInfo, NumOfGPRsSaved = 4 +; COMMON-NEXT: .byte 0x00 # NumberOfFixedParms = 0 +; COMMON-NEXT: .byte 0x01 # NumberOfFPParms = 0, +HasParmsOnStack +; CHECK-ASM-NEXT: .vbyte 4, L..bar0-.bar # Function size +; CHECK-FUNC-NEXT: .vbyte 4, L..bar0-.bar[PR] # Function size +; COMMON-NEXT: .vbyte 2, 0x0003 # Function name len = 3 +; COMMON-NEXT: .byte 'b,'a,'r # Function Name +; COMMON-NEXT: .byte 0x1f # AllocaUsed +; COMMON-NEXT: # -- End function diff --git a/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable.ll b/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable.ll new file mode 100644 --- /dev/null +++ b/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable.ll @@ -0,0 +1,151 @@ +; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr4 \ +; RUN: -mattr=-altivec -xcoff-traceback-table=true < %s | \ +; RUN: FileCheck --check-prefixes=CHECK-ASM,COMMON %s + +; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -function-sections \ +; RUN: -mcpu=pwr4 -mattr=-altivec < %s | \ +; RUN: FileCheck --check-prefixes=CHECK-FUNC,COMMON %s + +%struct.S = type { i32, i32 } +%struct.D = type { float, double } +%struct.SD = type { %struct.S*, %struct.D } + +@__const.main.s = private unnamed_addr constant %struct.S { i32 10, i32 20 }, align 4 +@__const.main.d = private unnamed_addr constant %struct.D { float 1.000000e+01, double 2.000000e+01 }, align 8 + +define double @_Z10add_structifd1SP2SD1Di(i32 %value, float %fvalue, double %dvalue, %struct.S* byval(%struct.S) align 4 %s, %struct.SD* %dp, %struct.D* byval(%struct.D) align 4 %0, i32 %v2) #0 { +entry: + %d = alloca %struct.D, align 8 + %value.addr = alloca i32, align 4 + %fvalue.addr = alloca float, align 4 + %dvalue.addr = alloca double, align 8 + %dp.addr = alloca %struct.SD*, align 4 + %v2.addr = alloca i32, align 4 + %1 = bitcast %struct.D* %d to i8* + %2 = bitcast %struct.D* %0 to i8* + call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 %1, i8* align 4 %2, i32 16, i1 false) + store i32 %value, i32* %value.addr, align 4 + store float %fvalue, float* %fvalue.addr, align 4 + store double %dvalue, double* %dvalue.addr, align 8 + store %struct.SD* %dp, %struct.SD** %dp.addr, align 4 + store i32 %v2, i32* %v2.addr, align 4 + %3 = load double, double* %dvalue.addr, align 8 + %4 = load float, float* %fvalue.addr, align 4 + %conv = fpext float %4 to double + %add = fadd double %3, %conv + %5 = load i32, i32* %value.addr, align 4 + %conv1 = sitofp i32 %5 to double + %add2 = fadd double %add, %conv1 + %i1 = getelementptr inbounds %struct.S, %struct.S* %s, i32 0, i32 0 + %6 = load i32, i32* %i1, align 4 + %conv3 = sitofp i32 %6 to double + %add4 = fadd double %add2, %conv3 + %7 = load %struct.SD*, %struct.SD** %dp.addr, align 4 + %d5 = getelementptr inbounds %struct.SD, %struct.SD* %7, i32 0, i32 1 + %d1 = getelementptr inbounds %struct.D, %struct.D* %d5, i32 0, i32 1 + %8 = load double, double* %d1, align 8 + %add6 = fadd double %add4, %8 + %f1 = getelementptr inbounds %struct.D, %struct.D* %d, i32 0, i32 0 + %9 = load float, float* %f1, align 8 + %conv7 = fpext float %9 to double + %add8 = fadd double %add6, %conv7 + %10 = load i32, i32* %v2.addr, align 4 + %conv9 = sitofp i32 %10 to double + %add10 = fadd double %add8, %conv9 + ret double %add10 +} + +declare void @llvm.memcpy.p0i8.p0i8.i32(i8* noalias nocapture writeonly, i8* noalias nocapture readonly, i32, i1 immarg) #1 + +define i32 @main() { +entry: + %retval = alloca i32, align 4 + %s = alloca %struct.S, align 4 + %d = alloca %struct.D, align 8 + %sd = alloca %struct.SD, align 8 + %agg.tmp = alloca %struct.S, align 4 + %agg.tmp4 = alloca %struct.D, align 8 + store i32 0, i32* %retval, align 4 + %0 = bitcast %struct.S* %s to i8* + call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %0, i8* align 4 bitcast (%struct.S* @__const.main.s to i8*), i32 8, i1 false) + %1 = bitcast %struct.D* %d to i8* + call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 %1, i8* align 8 bitcast (%struct.D* @__const.main.d to i8*), i32 16, i1 false) + %sp = getelementptr inbounds %struct.SD, %struct.SD* %sd, i32 0, i32 0 + store %struct.S* %s, %struct.S** %sp, align 8 + %d1 = getelementptr inbounds %struct.SD, %struct.SD* %sd, i32 0, i32 1 + %f1 = getelementptr inbounds %struct.D, %struct.D* %d1, i32 0, i32 0 + store float 1.000000e+02, float* %f1, align 8 + %d2 = getelementptr inbounds %struct.SD, %struct.SD* %sd, i32 0, i32 1 + %d13 = getelementptr inbounds %struct.D, %struct.D* %d2, i32 0, i32 1 + store double 2.000000e+02, double* %d13, align 8 + %2 = bitcast %struct.S* %agg.tmp to i8* + %3 = bitcast %struct.S* %s to i8* + call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %2, i8* align 4 %3, i32 8, i1 false) + %4 = bitcast %struct.D* %agg.tmp4 to i8* + %5 = bitcast %struct.D* %d to i8* + call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 %4, i8* align 8 %5, i32 16, i1 false) + %call = call double @_Z10add_structifd1SP2SD1Di(i32 1, float 2.000000e+00, double 3.000000e+00, %struct.S* byval(%struct.S) align 4 %agg.tmp, %struct.SD* %sd, %struct.D* byval(%struct.D) align 4 %agg.tmp4, i32 7) + %add = fadd double %call, 1.000000e+00 + %conv = fptosi double %add to i32 + ret i32 %conv +} + +; CHECK-ASM-LABEL: ._Z10add_structifd1SP2SD1Di:{{[[:space:]] *}}# %bb.0: +; CHECK-FUNC-LABEL: csect ._Z10add_structifd1SP2SD1Di[PR],2{{[[:space:]] *}}# %bb.0: +; COMMON-NEXT: lwz 4, L..C0(2) +; COMMON-NEXT: stfs 1, -24(1) +; COMMON-NEXT: lfs 0, 0(4) +; COMMON-NEXT: lwz 4, 56(1) +; COMMON: fsub 0, 2, 0 +; COMMON-NEXT: stw 9, -36(1) +; COMMON-NEXT: fadd 1, 1, 0 +; COMMON-NEXT: blr +; COMMON-NEXT: L.._Z10add_structifd1SP2SD1Di0: +; COMMON-NEXT: .vbyte 4, 0x00000000 # Traceback table begin +; COMMON-NEXT: .byte 0x00 # Version = 0 +; COMMON-NEXT: .byte 0x09 # Language = CPlusPlus +; COMMON-NEXT: .byte 0x22 # -IsGlobaLinkage, -IsOutOfLineEpilogOrPrologue +; COMMON-NEXT: # +HasTraceBackTableOffset, -IsInternalProcedure +; COMMON-NEXT: # -HasControlledStorage, -IsTOCless +; COMMON-NEXT: # +IsFloatingPointPresent +; COMMON-NEXT: # -IsFloatingPointOperationLogOrAbortEnabled +; COMMON-NEXT: .byte 0x40 # -IsInterruptHandler, +IsFunctionNamePresent, -IsAllocaUsed +; COMMON-NEXT: # OnConditionDirective = 0, -IsCRSaved, -IsLRSaved +; COMMON-NEXT: .byte 0x80 # +IsBackChainStored, -IsFixup, NumOfFPRsSaved = 0 +; COMMON-NEXT: .byte 0x00 # -HasExtensionTable, -HasVectorInfo, NumOfGPRsSaved = 0 +; COMMON-NEXT: .byte 0x05 # NumberOfFixedParms = 5 +; COMMON-NEXT: .byte 0x05 # NumberOfFPParms = 2, +HasParmsOnStack +; COMMON-NEXT: .vbyte 4, 0x58000000 # Parameter type = i, f, d, i, i, i, i +; CHECK-ASM-NEXT: .vbyte 4, L.._Z10add_structifd1SP2SD1Di0-._Z10add_structifd1SP2SD1Di # Function size +; CHECK-FUNC-NEXT: .vbyte 4, L.._Z10add_structifd1SP2SD1Di0-._Z10add_structifd1SP2SD1Di[PR] # Function size +; COMMON-NEXT: .vbyte 2, 0x001a # Function name len = 26 +; COMMON-NEXT: .byte '_,'Z,'1,'0,'a,'d,'d,'_,'s,'t,'r,'u,'c,'t,'i,'f,'d,'1,'S,'P,'2,'S,'D,'1,'D,'i # Function Name +; COMMON-NEXT: # -- End function + + +; CHECK-ASM-LABEL: .main:{{[[:space:]] *}}# %bb.0: +; CHECK-FUNC-LABEL: .csect .main[PR],2{{[[:space:]] *}}# %bb.0 +; COMMON-NEXT: mflr 0 +; COMMON-NEXT: stw 0, 8(1) +; COMMON: mtlr 0 +; COMMON-NEXT: blr +; COMMON-NEXT: L..main0: +; COMMON-NEXT: .vbyte 4, 0x00000000 # Traceback table begin +; COMMON-NEXT: .byte 0x00 # Version = 0 +; COMMON-NEXT: .byte 0x09 # Language = CPlusPlus +; COMMON-NEXT: .byte 0x22 # -IsGlobaLinkage, -IsOutOfLineEpilogOrPrologue +; COMMON-NEXT: # +HasTraceBackTableOffset, -IsInternalProcedure +; COMMON-NEXT: # -HasControlledStorage, -IsTOCless +; COMMON-NEXT: # +IsFloatingPointPresent +; COMMON-NEXT: # -IsFloatingPointOperationLogOrAbortEnabled +; COMMON-NEXT: .byte 0x41 # -IsInterruptHandler, +IsFunctionNamePresent, -IsAllocaUsed +; COMMON-NEXT: # OnConditionDirective = 0, -IsCRSaved, +IsLRSaved +; COMMON-NEXT: .byte 0x80 # +IsBackChainStored, -IsFixup, NumOfFPRsSaved = 0 +; COMMON-NEXT: .byte 0x00 # -HasExtensionTable, -HasVectorInfo, NumOfGPRsSaved = 0 +; COMMON-NEXT: .byte 0x00 # NumberOfFixedParms = 0 +; COMMON-NEXT: .byte 0x01 # NumberOfFPParms = 0, +HasParmsOnStack +; CHECK-ASM-NEXT: .vbyte 4, L..main0-.main # Function size +; CHECK-FUNC-NEXT: .vbyte 4, L..main0-.main[PR] # Function size +; COMMON-NEXT: .vbyte 2, 0x0004 # Function name len = 4 +; COMMON-NEXT: .byte 'm,'a,'i,'n # Function Name +; COMMON-NEXT: # -- End function diff --git a/llvm/test/CodeGen/PowerPC/aix-extern-weak.ll b/llvm/test/CodeGen/PowerPC/aix-extern-weak.ll --- a/llvm/test/CodeGen/PowerPC/aix-extern-weak.ll +++ b/llvm/test/CodeGen/PowerPC/aix-extern-weak.ll @@ -1,15 +1,15 @@ ; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr4 \ -; RUN: -mattr=-altivec -data-sections=false < %s | FileCheck --check-prefixes=COMMON,BIT32 %s +; RUN: -mattr=-altivec -data-sections=false -xcoff-traceback-table=false < %s | FileCheck --check-prefixes=COMMON,BIT32 %s ; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr4 \ -; RUN: -mattr=-altivec -data-sections=false < %s | FileCheck --check-prefixes=COMMON,BIT64 %s +; RUN: -mattr=-altivec -data-sections=false -xcoff-traceback-table=false < %s | FileCheck --check-prefixes=COMMON,BIT64 %s ; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr4 \ -; RUN: -mattr=-altivec -data-sections=false -filetype=obj -o %t.o < %s +; RUN: -mattr=-altivec -data-sections=false -xcoff-traceback-table=false -filetype=obj -o %t.o < %s ; RUN: llvm-readobj --symbols %t.o | FileCheck --check-prefix=CHECKSYM %s ; RUN: not --crash llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc64-ibm-aix-xcoff \ -; RUN: -mattr=-altivec -data-sections=false -filetype=obj -o %t.o 2>&1 < %s | \ +; RUN: -mattr=-altivec -data-sections=false -xcoff-traceback-table=false -filetype=obj -o %t.o 2>&1 < %s | \ ; RUN: FileCheck --check-prefix=XCOFF64 %s ; XCOFF64: LLVM ERROR: 64-bit XCOFF object files are not supported yet. diff --git a/llvm/test/CodeGen/PowerPC/aix-extern.ll b/llvm/test/CodeGen/PowerPC/aix-extern.ll --- a/llvm/test/CodeGen/PowerPC/aix-extern.ll +++ b/llvm/test/CodeGen/PowerPC/aix-extern.ll @@ -1,15 +1,15 @@ ; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr4 \ -; RUN: -mattr=-altivec -data-sections=false < %s | FileCheck --check-prefixes=COMMON,BIT32 %s +; RUN: -mattr=-altivec -data-sections=false -xcoff-traceback-table=false < %s | FileCheck --check-prefixes=COMMON,BIT32 %s ; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr4 \ -; RUN: -mattr=-altivec -data-sections=false < %s | FileCheck --check-prefixes=COMMON,BIT64 %s +; RUN: -mattr=-altivec -data-sections=false -xcoff-traceback-table=false < %s | FileCheck --check-prefixes=COMMON,BIT64 %s ; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr4 \ -; RUN: -mattr=-altivec -data-sections=false -filetype=obj -o %t.o < %s +; RUN: -mattr=-altivec -data-sections=false -xcoff-traceback-table=false -filetype=obj -o %t.o < %s ; RUN: llvm-readobj --symbols %t.o | FileCheck --check-prefix=CHECKSYM %s ; RUN: not --crash llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc64-ibm-aix-xcoff \ -; RUN: -mattr=-altivec -data-sections=false -filetype=obj -o %t.o 2>&1 < %s | FileCheck --check-prefix=XCOFF64 %s +; RUN: -mattr=-altivec -data-sections=false -xcoff-traceback-table=false -filetype=obj -o %t.o 2>&1 < %s | FileCheck --check-prefix=XCOFF64 %s ; XCOFF64: LLVM ERROR: 64-bit XCOFF object files are not supported yet. @bar_p = global i32 (...)* @bar_ref, align 4 diff --git a/llvm/test/CodeGen/PowerPC/aix-func-align.ll b/llvm/test/CodeGen/PowerPC/aix-func-align.ll --- a/llvm/test/CodeGen/PowerPC/aix-func-align.ll +++ b/llvm/test/CodeGen/PowerPC/aix-func-align.ll @@ -1,9 +1,12 @@ ; This test tries to verify if a csect containing code would have the correct alignment. -; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck %s -; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff < %s | FileCheck %s +; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \ +; RUN: -xcoff-traceback-table=false < %s | FileCheck %s +; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff \ +; RUN: -xcoff-traceback-table=false < %s | FileCheck %s -; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s +; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \ +; RUN: -xcoff-traceback-table=false -filetype=obj -o %t.o < %s ; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=SYMS %s ; RUN: not --crash llc -mtriple powerpc64-ibm-aix-xcoff -filetype=obj < %s 2>&1 | \ diff --git a/llvm/test/CodeGen/PowerPC/aix-func-dsc-gen.ll b/llvm/test/CodeGen/PowerPC/aix-func-dsc-gen.ll --- a/llvm/test/CodeGen/PowerPC/aix-func-dsc-gen.ll +++ b/llvm/test/CodeGen/PowerPC/aix-func-dsc-gen.ll @@ -1,4 +1,5 @@ -; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s +; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \ +; RUN: -xcoff-traceback-table=false -filetype=obj -o %t.o < %s ; RUN: llvm-readobj --symbols %t.o | FileCheck %s define void @foo() { diff --git a/llvm/test/CodeGen/PowerPC/aix-return55.ll b/llvm/test/CodeGen/PowerPC/aix-return55.ll --- a/llvm/test/CodeGen/PowerPC/aix-return55.ll +++ b/llvm/test/CodeGen/PowerPC/aix-return55.ll @@ -1,5 +1,7 @@ -; RUN: llc -mcpu=pwr4 -mattr=-altivec -mtriple=powerpc-ibm-aix-xcoff -verify-machineinstrs -data-sections=false < %s | FileCheck %s -; RUN: llc -mcpu=pwr4 -mattr=-altivec -mtriple=powerpc-ibm-aix-xcoff -verify-machineinstrs -data-sections=false -filetype=obj -o %t.o < %s +; RUN: llc -mcpu=pwr4 -mattr=-altivec -mtriple=powerpc-ibm-aix-xcoff \ +; RUN: -verify-machineinstrs -data-sections=false -xcoff-traceback-table=false < %s | FileCheck %s +; RUN: llc -mcpu=pwr4 -mattr=-altivec -mtriple=powerpc-ibm-aix-xcoff \ +; RUN: -verify-machineinstrs -data-sections=false -xcoff-traceback-table=false -filetype=obj -o %t.o < %s ; RUN: llvm-objdump -D %t.o | FileCheck --check-prefix=CHECKOBJ %s ; RUN: llvm-readobj -sections %t.o | FileCheck --check-prefix=CHECKSECT %s diff --git a/llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll b/llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll --- a/llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll +++ b/llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll @@ -1,5 +1,5 @@ ; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr4 \ -; RUN: -mattr=-altivec -filetype=obj -o %t.o < %s +; RUN: -mattr=-altivec -filetype=obj -xcoff-traceback-table=false -o %t.o < %s ; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=32-SYM %s diff --git a/llvm/test/CodeGen/PowerPC/aix-weak.ll b/llvm/test/CodeGen/PowerPC/aix-weak.ll --- a/llvm/test/CodeGen/PowerPC/aix-weak.ll +++ b/llvm/test/CodeGen/PowerPC/aix-weak.ll @@ -1,10 +1,10 @@ -; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr4 \ +; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -xcoff-traceback-table=false -mcpu=pwr4 \ ; RUN: -mattr=-altivec -data-sections=false < %s | FileCheck --check-prefixes=COMMON,BIT32 %s -; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr4 \ +; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -xcoff-traceback-table=false -mcpu=pwr4 \ ; RUN: -mattr=-altivec -data-sections=false < %s | FileCheck --check-prefixes=COMMON,BIT64 %s -; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr4 \ +; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -xcoff-traceback-table=false -mcpu=pwr4 \ ; RUN: -mattr=-altivec -data-sections=false -filetype=obj -o %t.o < %s ; RUN: llvm-readobj --symbols %t.o | FileCheck --check-prefix=CHECKSYM %s diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-data-sections.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-data-sections.ll --- a/llvm/test/CodeGen/PowerPC/aix-xcoff-data-sections.ll +++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-data-sections.ll @@ -1,26 +1,33 @@ -; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff -data-sections < %s | \ +; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \ +; RUN: -data-sections -xcoff-traceback-table=false < %s | \ ; RUN: FileCheck --check-prefixes=CHECK,CHECK32 %s ; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff -data-sections < %s | \ ; RUN: FileCheck --check-prefixes=CHECK,CHECK64 %s -; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff -filetype=obj -data-sections -o %t.o < %s +; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \ +; RUN: -filetype=obj -data-sections -xcoff-traceback-table=false -o %t.o < %s ; RUN: llvm-objdump -D --symbol-description %t.o | FileCheck --check-prefix=CHECKOBJ %s ; RUN: llvm-readobj -syms %t.o | FileCheck --check-prefix=CHECKSYM %s ;; Test to see if the default is correct for -data-sections on AIX. -; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff < %s | \ +; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \ +; RUN: -xcoff-traceback-table=false < %s | \ ; RUN: FileCheck --check-prefixes=CHECK,CHECK32 %s ; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff < %s | \ ; RUN: FileCheck --check-prefixes=CHECK,CHECK64 %s -; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s +; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \ +; RUN: -xcoff-traceback-table=false -filetype=obj -o %t.o < %s ; RUN: llvm-objdump -D --symbol-description %t.o | FileCheck --check-prefix=CHECKOBJ %s ; RUN: llvm-readobj -syms %t.o | FileCheck --check-prefix=CHECKSYM %s ;; Test to see if the default is correct for -data-sections on AIX. -; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff < %s | \ +; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \ +; RUN: -xcoff-traceback-table=false < %s | \ ; RUN: FileCheck --check-prefixes=CHECK,CHECK32 %s -; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff < %s | \ +; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff \ +; RUN: -xcoff-traceback-table=false < %s | \ ; RUN: FileCheck --check-prefixes=CHECK,CHECK64 %s -; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s +; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \ +; RUN: -xcoff-traceback-table=false -filetype=obj -o %t.o < %s ; RUN: llvm-objdump -D --symbol-description %t.o | FileCheck --check-prefix=CHECKOBJ %s ; RUN: llvm-readobj -syms %t.o | FileCheck --check-prefix=CHECKSYM %s diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-explicit-section.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-explicit-section.ll --- a/llvm/test/CodeGen/PowerPC/aix-xcoff-explicit-section.ll +++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-explicit-section.ll @@ -1,6 +1,9 @@ -; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck %s -; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff < %s | FileCheck %s -; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s +; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \ +; RUN: -xcoff-traceback-table=false < %s | FileCheck %s +; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff \ +; RUN: -xcoff-traceback-table=false < %s | FileCheck %s +; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \ +; RUN: -xcoff-traceback-table=false -filetype=obj -o %t.o < %s ; RUN: llvm-objdump -D --symbol-description %t.o | FileCheck --check-prefix=CHECKOBJ %s ; RUN: llvm-readobj -syms %t.o | FileCheck --check-prefix=CHECKSYM %s diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll --- a/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll +++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll @@ -1,10 +1,13 @@ ; This file tests the codegen of mergeable const in AIX assembly. ; This file also tests mergeable const in XCOFF object file generation. -; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff -data-sections=false < %s | \ +; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \ +; RUN: -data-sections=false -xcoff-traceback-table=false < %s | \ ; RUN: FileCheck --check-prefixes=CHECK,CHECK32 %s -; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff -data-sections=false < %s | \ +; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff \ +; RUN: -xcoff-traceback-table=false -data-sections=false < %s | \ ; RUN: FileCheck --check-prefixes=CHECK,CHECK64 %s -; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff -data-sections=false -filetype=obj -o %t.o < %s +; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \ +; RUN: -xcoff-traceback-table=false -data-sections=false -filetype=obj -o %t.o < %s ; RUN: llvm-objdump -D %t.o | FileCheck --check-prefix=CHECKOBJ %s ; RUN: llvm-readobj -syms %t.o | FileCheck --check-prefix=CHECKSYM %s diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll --- a/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll +++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll @@ -3,12 +3,13 @@ ; the test in this file should be merged into aix-xcoff-data.ll with additional ; tests for XCOFF object files. -; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec \ +; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -xcoff-traceback-table=false \ ; RUN: -mtriple powerpc-ibm-aix-xcoff -data-sections=false < %s | FileCheck %s -; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec \ +; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -xcoff-traceback-table=false \ ; RUN: -mtriple powerpc64-ibm-aix-xcoff -data-sections=false < %s | FileCheck %s -; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff -data-sections=false -filetype=obj -o %t.o < %s +; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \ +; RUN: -xcoff-traceback-table=false -data-sections=false -filetype=obj -o %t.o < %s ; RUN: llvm-objdump -D %t.o | FileCheck --check-prefix=CHECKOBJ %s @magic16 = private unnamed_addr constant [4 x i16] [i16 264, i16 272, i16 213, i16 0], align 2 diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc-symb.mir b/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc-symb.mir --- a/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc-symb.mir +++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc-symb.mir @@ -1,4 +1,5 @@ -# RUN: llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc-ibm-aix-xcoff -x mir -verify-machineinstrs -start-after=lazy-machine-block-freq -filetype=obj -o %t.o < %s +# RUN: llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc-ibm-aix-xcoff -x mir -verify-machineinstrs \ +# RUN: -xcoff-traceback-table=false -start-after=lazy-machine-block-freq -filetype=obj -o %t.o < %s # RUN: llvm-readobj --relocs --expand-relocs -t %t.o | FileCheck --check-prefixes=RELOC,SYM %s # RUN: llvm-objdump -D %t.o | FileCheck --check-prefix=DIS %s diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll --- a/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll +++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll @@ -1,4 +1,5 @@ -; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc-ibm-aix-xcoff -mattr=-altivec -data-sections=false -filetype=obj -o %t.o < %s +; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc-ibm-aix-xcoff -mattr=-altivec \ +; RUN: -xcoff-traceback-table=false -data-sections=false -filetype=obj -o %t.o < %s ; RUN: llvm-readobj --section-headers --file-header %t.o | \ ; RUN: FileCheck --check-prefix=OBJ %s ; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck --check-prefix=RELOC %s diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-symbol-rename.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-symbol-rename.ll --- a/llvm/test/CodeGen/PowerPC/aix-xcoff-symbol-rename.ll +++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-symbol-rename.ll @@ -4,11 +4,11 @@ ;; tests for 64-bit mode are omitted. ; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr4 \ -; RUN: -mattr=-altivec -data-sections=false < %s | \ +; RUN: -mattr=-altivec -data-sections=false -xcoff-traceback-table=false < %s | \ ; RUN: FileCheck --check-prefix=ASM %s ; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr4 \ -; RUN: -mattr=-altivec -data-sections=false -filetype=obj -o %t.o < %s +; RUN: -mattr=-altivec -data-sections=false -xcoff-traceback-table=false -filetype=obj -o %t.o < %s ; RUN: llvm-objdump -D -r --symbol-description %t.o | \ ; RUN: FileCheck --check-prefix=OBJ %s diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-textdisassembly.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-textdisassembly.ll --- a/llvm/test/CodeGen/PowerPC/aix-xcoff-textdisassembly.ll +++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-textdisassembly.ll @@ -1,4 +1,5 @@ -; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s +; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \ +; RUN: -xcoff-traceback-table=false -filetype=obj -o %t.o < %s ; RUN: llvm-objdump -D %t.o | FileCheck --check-prefix=CHECK %s define i32 @foo() #0 { diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-toc.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-toc.ll --- a/llvm/test/CodeGen/PowerPC/aix-xcoff-toc.ll +++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-toc.ll @@ -1,9 +1,12 @@ ; This file tests TOC entry generation and undefined symbol generation. -; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck --check-prefixes CHECK,CHECK32 %s -; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff < %s 2>&1 | FileCheck --check-prefixes CHECK,CHECK64 %s +; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \ +; RUN: -xcoff-traceback-table=false < %s | FileCheck --check-prefixes CHECK,CHECK32 %s +; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff \ +; RUN: -xcoff-traceback-table=false < %s 2>&1 | FileCheck --check-prefixes CHECK,CHECK64 %s -; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s +; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \ +; RUN: --xcoff-traceback-table=false -filetype=obj -o %t.o < %s ; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=SYM %s ; RUN: not --crash llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff -filetype=obj -o %t.o 2>&1 \