Index: lib/CodeGen/ABIInfo.h =================================================================== --- lib/CodeGen/ABIInfo.h +++ lib/CodeGen/ABIInfo.h @@ -90,6 +90,10 @@ bool isHomogeneousAggregate(QualType Ty, const Type *&Base, uint64_t &Members) const; + virtual bool shouldSignExtUnsignedType(QualType Ty) const { + return false; + } + }; } // end namespace clang Index: lib/CodeGen/CGCall.cpp =================================================================== --- lib/CodeGen/CGCall.cpp +++ lib/CodeGen/CGCall.cpp @@ -1588,8 +1588,12 @@ case ABIArgInfo::Extend: if (ParamType->isSignedIntegerOrEnumerationType()) Attrs.addAttribute(llvm::Attribute::SExt); - else if (ParamType->isUnsignedIntegerOrEnumerationType()) - Attrs.addAttribute(llvm::Attribute::ZExt); + else if (ParamType->isUnsignedIntegerOrEnumerationType()) { + if(getTypes().getABIInfo().shouldSignExtUnsignedType(ParamType)) + Attrs.addAttribute(llvm::Attribute::SExt); + else + Attrs.addAttribute(llvm::Attribute::ZExt); + } // FALL THROUGH case ABIArgInfo::Direct: if (ArgNo == 0 && FI.isChainCall()) Index: lib/CodeGen/TargetInfo.cpp =================================================================== --- lib/CodeGen/TargetInfo.cpp +++ lib/CodeGen/TargetInfo.cpp @@ -5490,6 +5490,7 @@ void computeInfo(CGFunctionInfo &FI) const override; llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, CodeGenFunction &CGF) const override; + bool shouldSignExtUnsignedType(QualType Ty) const override; }; class MIPSTargetCodeGenInfo : public TargetCodeGenInfo { @@ -5792,6 +5793,14 @@ return AddrTyped; } +bool MipsABIInfo::shouldSignExtUnsignedType(QualType Ty) const { + int TySize = getContext().getTypeSize(Ty); + if(Ty->isUnsignedIntegerOrEnumerationType() && TySize == 32) + return true; + else + return false; +} + bool MIPSTargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, llvm::Value *Address) const { Index: test/CodeGen/atomics-inlining.c =================================================================== --- test/CodeGen/atomics-inlining.c +++ test/CodeGen/atomics-inlining.c @@ -76,8 +76,8 @@ // MIPS32: store atomic i32 {{.*}}, i32* @i1 seq_cst // MIPS32: call i64 @__atomic_load_8(i8* bitcast (i64* @ll1 to i8*) // MIPS32: call void @__atomic_store_8(i8* bitcast (i64* @ll1 to i8*), i64 -// MIPS32: call void @__atomic_load(i32 zeroext 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) -// MIPS32: call void @__atomic_store(i32 zeroext 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) +// MIPS32: call void @__atomic_load(i32 signext 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) +// MIPS32: call void @__atomic_store(i32 signext 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) // MIPS64-LABEL: define void @test1 // MIPS64: = load atomic i8, i8* @c1 seq_cst Index: test/CodeGen/mips-unsigned-extend.c =================================================================== --- test/CodeGen/mips-unsigned-extend.c +++ test/CodeGen/mips-unsigned-extend.c @@ -0,0 +1,15 @@ +// RUN: %clang -target mips64-unknown-linux -O0 -mabi=n64 -S -emit-llvm %s -o - | FileCheck %s -check-prefix=N64 +// RUN: %clang -target mips64-unknown-linux -O0 -mabi=n32 -S -emit-llvm %s -o - | FileCheck %s -check-prefix=N32 +// RUN: %clang -target mips-unknown-linux -O0 -mabi=o32 -S -emit-llvm %s -o - | FileCheck %s -check-prefix=O32 + +void foo(unsigned a) { +} + +void foo1() { + unsigned f = 0xffffffe0; + foo(f); +} + +// N64: call void @foo(i32 signext %0) +// N32: call void @foo(i32 signext %0) +// O32: call void @foo(i32 signext %0) \ No newline at end of file Index: test/CodeGenCXX/mips-size_t-ptrdiff_t.cpp =================================================================== --- test/CodeGenCXX/mips-size_t-ptrdiff_t.cpp +++ test/CodeGenCXX/mips-size_t-ptrdiff_t.cpp @@ -10,10 +10,10 @@ return rv; } // O32-LABEL: define i32* @_Z10alloc_longv() -// O32: call noalias i8* @_Znwj(i32 zeroext 4) +// O32: call noalias i8* @_Znwj(i32 signext 4) // N32-LABEL: define i32* @_Z10alloc_longv() -// N32: call noalias i8* @_Znwj(i32 zeroext 4) +// N32: call noalias i8* @_Znwj(i32 signext 4) // N64-LABEL: define i64* @_Z10alloc_longv() // N64: call noalias i8* @_Znwm(i64 zeroext 8) @@ -24,10 +24,10 @@ } // O32-LABEL: define i32* @_Z16alloc_long_arrayv() -// O32: call noalias i8* @_Znaj(i32 zeroext 8) +// O32: call noalias i8* @_Znaj(i32 signext 8) // N32-LABEL: define i32* @_Z16alloc_long_arrayv() -// N32: call noalias i8* @_Znaj(i32 zeroext 8) +// N32: call noalias i8* @_Znaj(i32 signext 8) // N64-LABEL: define i64* @_Z16alloc_long_arrayv() // N64: call noalias i8* @_Znam(i64 zeroext 16)