diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -7006,7 +7006,11 @@
   case ISD::STRICT_FSETCC:
   case ISD::STRICT_FSETCCS: {
     auto *FPCmp = dyn_cast<ConstrainedFPCmpIntrinsic>(&FPI);
-    Opers.push_back(DAG.getCondCode(getFCmpCondCode(FPCmp->getPredicate())));
+    ISD::CondCode Condition = getFCmpCondCode(FPCmp->getPredicate());
+    auto *FPMO = dyn_cast<FPMathOperator>(&FPI);
+    if ((FPMO && FPMO->hasNoNaNs()) || TM.Options.NoNaNsFPMath)
+      Condition = getFCmpCodeWithoutNaN(Condition);
+    Opers.push_back(DAG.getCondCode(Condition));
     break;
   }
   }
diff --git a/llvm/test/CodeGen/AArch64/arm64-fcmp-no-nans-opt.ll b/llvm/test/CodeGen/AArch64/arm64-fcmp-no-nans-opt.ll
new file mode 100644
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/arm64-fcmp-no-nans-opt.ll
@@ -0,0 +1,57 @@
+; RUN: llc < %s -mtriple=arm64-eabi -enable-no-nans-fp-math | FileCheck %s
+
+declare i1 @llvm.experimental.constrained.fcmp.f32(float, float, metadata, metadata)
+
+; CHECK-LABEL: @constrained_fcmp_ueq
+; CHECK: fcmp s0, s1
+; CHECK-NEXT: cset w0, eq
+; CHECK-NEXT: ret
+define i1 @constrained_fcmp_ueq(float %a, float %b) nounwind ssp {
+  %cmp = tail call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"ueq", metadata !"fpexcept.strict")
+  ret i1 %cmp
+}
+
+; CHECK-LABEL: @constrained_fcmp_une
+; CHECK: fcmp s0, s1
+; CHECK-NEXT: cset w0, ne
+; CHECK-NEXT: ret
+define i1 @constrained_fcmp_une(float %a, float %b) nounwind ssp {
+  %cmp = tail call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"une", metadata !"fpexcept.strict")
+  ret i1 %cmp
+}
+
+; CHECK-LABEL: @constrained_fcmp_ugt
+; CHECK: fcmp s0, s1
+; CHECK-NEXT: cset w0, gt
+; CHECK-NEXT: ret
+define i1 @constrained_fcmp_ugt(float %a, float %b) nounwind ssp {
+  %cmp = tail call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"ugt", metadata !"fpexcept.strict")
+  ret i1 %cmp
+}
+
+; CHECK-LABEL: @constrained_fcmp_uge
+; CHECK: fcmp s0, s1
+; CHECK-NEXT: cset w0, ge
+; CHECK-NEXT: ret
+define i1 @constrained_fcmp_uge(float %a, float %b) nounwind ssp {
+  %cmp = tail call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"uge", metadata !"fpexcept.strict")
+  ret i1 %cmp
+}
+
+; CHECK-LABEL: @constrained_fcmp_ult
+; CHECK: fcmp s0, s1
+; CHECK-NEXT: cset w0, lt
+; CHECK-NEXT: ret
+define i1 @constrained_fcmp_ult(float %a, float %b) nounwind ssp {
+  %cmp = tail call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"ult", metadata !"fpexcept.strict")
+  ret i1 %cmp
+}
+
+; CHECK-LABEL: @constrained_fcmp_ule
+; CHECK: fcmp s0, s1
+; CHECK-NEXT: cset w0, le
+; CHECK-NEXT: ret
+define i1 @constrained_fcmp_ule(float %a, float %b) nounwind ssp {
+  %cmp = tail call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"ule", metadata !"fpexcept.strict")
+  ret i1 %cmp
+}