diff --git a/llvm/lib/CodeGen/TargetLoweringBase.cpp b/llvm/lib/CodeGen/TargetLoweringBase.cpp
--- a/llvm/lib/CodeGen/TargetLoweringBase.cpp
+++ b/llvm/lib/CodeGen/TargetLoweringBase.cpp
@@ -140,18 +140,23 @@
     setLibcallName(RTLIB::SUB_F128, "__subkf3");
     setLibcallName(RTLIB::MUL_F128, "__mulkf3");
     setLibcallName(RTLIB::DIV_F128, "__divkf3");
+    setLibcallName(RTLIB::POWI_F128, "__powikf2");
     setLibcallName(RTLIB::FPEXT_F32_F128, "__extendsfkf2");
     setLibcallName(RTLIB::FPEXT_F64_F128, "__extenddfkf2");
     setLibcallName(RTLIB::FPROUND_F128_F32, "__trunckfsf2");
     setLibcallName(RTLIB::FPROUND_F128_F64, "__trunckfdf2");
     setLibcallName(RTLIB::FPTOSINT_F128_I32, "__fixkfsi");
     setLibcallName(RTLIB::FPTOSINT_F128_I64, "__fixkfdi");
+    setLibcallName(RTLIB::FPTOSINT_F128_I128, "__fixkfti");
     setLibcallName(RTLIB::FPTOUINT_F128_I32, "__fixunskfsi");
     setLibcallName(RTLIB::FPTOUINT_F128_I64, "__fixunskfdi");
+    setLibcallName(RTLIB::FPTOUINT_F128_I128, "__fixunskfti");
     setLibcallName(RTLIB::SINTTOFP_I32_F128, "__floatsikf");
     setLibcallName(RTLIB::SINTTOFP_I64_F128, "__floatdikf");
+    setLibcallName(RTLIB::SINTTOFP_I128_F128, "__floattikf");
     setLibcallName(RTLIB::UINTTOFP_I32_F128, "__floatunsikf");
     setLibcallName(RTLIB::UINTTOFP_I64_F128, "__floatundikf");
+    setLibcallName(RTLIB::UINTTOFP_I128_F128, "__floatuntikf");
     setLibcallName(RTLIB::OEQ_F128, "__eqkf2");
     setLibcallName(RTLIB::UNE_F128, "__nekf2");
     setLibcallName(RTLIB::OGE_F128, "__gekf2");
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -1304,8 +1304,19 @@
   setLibcallName(RTLIB::POW_F128, "powf128");
   setLibcallName(RTLIB::FMIN_F128, "fminf128");
   setLibcallName(RTLIB::FMAX_F128, "fmaxf128");
-  setLibcallName(RTLIB::POWI_F128, "__powikf2");
   setLibcallName(RTLIB::REM_F128, "fmodf128");
+  setLibcallName(RTLIB::SQRT_F128, "__sqrtieee128");
+  setLibcallName(RTLIB::CEIL_F128, "__ceilieee128");
+  setLibcallName(RTLIB::FLOOR_F128, "__floorieee128");
+  setLibcallName(RTLIB::TRUNC_F128, "__truncieee128");
+  setLibcallName(RTLIB::ROUND_F128, "__roundieee128");
+  setLibcallName(RTLIB::LROUND_F128, "__lroundieee128");
+  setLibcallName(RTLIB::LLROUND_F128, "__lroundieee128");
+  setLibcallName(RTLIB::RINT_F128, "__rintieee128");
+  setLibcallName(RTLIB::LRINT_F128, "__lrintieee128");
+  setLibcallName(RTLIB::LLRINT_F128, "__lrintieee128");
+  setLibcallName(RTLIB::NEARBYINT_F128, "__nearbyintieee128");
+  setLibcallName(RTLIB::FMA_F128, "__fmaieee128");
 
   // With 32 condition bits, we don't need to sink (and duplicate) compares
   // aggressively in CodeGenPrep.
diff --git a/llvm/test/CodeGen/PowerPC/f128-arith.ll b/llvm/test/CodeGen/PowerPC/f128-arith.ll
--- a/llvm/test/CodeGen/PowerPC/f128-arith.ll
+++ b/llvm/test/CodeGen/PowerPC/f128-arith.ll
@@ -195,7 +195,7 @@
 ; CHECK-P8-NEXT:    stdu r1, -48(r1)
 ; CHECK-P8-NEXT:    lvx v2, 0, r3
 ; CHECK-P8-NEXT:    mr r30, r4
-; CHECK-P8-NEXT:    bl sqrtl
+; CHECK-P8-NEXT:    bl __sqrtieee128
 ; CHECK-P8-NEXT:    nop
 ; CHECK-P8-NEXT:    stvx v2, 0, r30
 ; CHECK-P8-NEXT:    addi r1, r1, 48
@@ -840,7 +840,7 @@
 ; CHECK-P8-NEXT:    stdu r1, -48(r1)
 ; CHECK-P8-NEXT:    lvx v2, 0, r3
 ; CHECK-P8-NEXT:    mr r30, r4
-; CHECK-P8-NEXT:    bl ceill
+; CHECK-P8-NEXT:    bl __ceilieee128
 ; CHECK-P8-NEXT:    nop
 ; CHECK-P8-NEXT:    stvx v2, 0, r30
 ; CHECK-P8-NEXT:    addi r1, r1, 48
@@ -875,7 +875,7 @@
 ; CHECK-P8-NEXT:    stdu r1, -48(r1)
 ; CHECK-P8-NEXT:    lvx v2, 0, r3
 ; CHECK-P8-NEXT:    mr r30, r4
-; CHECK-P8-NEXT:    bl floorl
+; CHECK-P8-NEXT:    bl __floorieee128
 ; CHECK-P8-NEXT:    nop
 ; CHECK-P8-NEXT:    stvx v2, 0, r30
 ; CHECK-P8-NEXT:    addi r1, r1, 48
@@ -910,7 +910,7 @@
 ; CHECK-P8-NEXT:    stdu r1, -48(r1)
 ; CHECK-P8-NEXT:    lvx v2, 0, r3
 ; CHECK-P8-NEXT:    mr r30, r4
-; CHECK-P8-NEXT:    bl truncl
+; CHECK-P8-NEXT:    bl __truncieee128
 ; CHECK-P8-NEXT:    nop
 ; CHECK-P8-NEXT:    stvx v2, 0, r30
 ; CHECK-P8-NEXT:    addi r1, r1, 48
@@ -945,7 +945,7 @@
 ; CHECK-P8-NEXT:    stdu r1, -48(r1)
 ; CHECK-P8-NEXT:    lvx v2, 0, r3
 ; CHECK-P8-NEXT:    mr r30, r4
-; CHECK-P8-NEXT:    bl roundl
+; CHECK-P8-NEXT:    bl __roundieee128
 ; CHECK-P8-NEXT:    nop
 ; CHECK-P8-NEXT:    stvx v2, 0, r30
 ; CHECK-P8-NEXT:    addi r1, r1, 48
@@ -973,7 +973,7 @@
 ; CHECK-NEXT:    stdu r1, -48(r1)
 ; CHECK-NEXT:    lxv v2, 0(r3)
 ; CHECK-NEXT:    mr r30, r4
-; CHECK-NEXT:    bl lroundl
+; CHECK-NEXT:    bl __lroundieee128
 ; CHECK-NEXT:    nop
 ; CHECK-NEXT:    stw r3, 0(r30)
 ; CHECK-NEXT:    addi r1, r1, 48
@@ -993,7 +993,7 @@
 ; CHECK-P8-NEXT:    stdu r1, -48(r1)
 ; CHECK-P8-NEXT:    lvx v2, 0, r3
 ; CHECK-P8-NEXT:    mr r30, r4
-; CHECK-P8-NEXT:    bl lroundl
+; CHECK-P8-NEXT:    bl __lroundieee128
 ; CHECK-P8-NEXT:    nop
 ; CHECK-P8-NEXT:    stw r3, 0(r30)
 ; CHECK-P8-NEXT:    addi r1, r1, 48
@@ -1021,7 +1021,7 @@
 ; CHECK-NEXT:    stdu r1, -48(r1)
 ; CHECK-NEXT:    lxv v2, 0(r3)
 ; CHECK-NEXT:    mr r30, r4
-; CHECK-NEXT:    bl llroundl
+; CHECK-NEXT:    bl __lroundieee128
 ; CHECK-NEXT:    nop
 ; CHECK-NEXT:    std r3, 0(r30)
 ; CHECK-NEXT:    addi r1, r1, 48
@@ -1041,7 +1041,7 @@
 ; CHECK-P8-NEXT:    stdu r1, -48(r1)
 ; CHECK-P8-NEXT:    lvx v2, 0, r3
 ; CHECK-P8-NEXT:    mr r30, r4
-; CHECK-P8-NEXT:    bl llroundl
+; CHECK-P8-NEXT:    bl __lroundieee128
 ; CHECK-P8-NEXT:    nop
 ; CHECK-P8-NEXT:    std r3, 0(r30)
 ; CHECK-P8-NEXT:    addi r1, r1, 48
@@ -1076,7 +1076,7 @@
 ; CHECK-P8-NEXT:    stdu r1, -48(r1)
 ; CHECK-P8-NEXT:    lvx v2, 0, r3
 ; CHECK-P8-NEXT:    mr r30, r4
-; CHECK-P8-NEXT:    bl rintl
+; CHECK-P8-NEXT:    bl __rintieee128
 ; CHECK-P8-NEXT:    nop
 ; CHECK-P8-NEXT:    stvx v2, 0, r30
 ; CHECK-P8-NEXT:    addi r1, r1, 48
@@ -1104,7 +1104,7 @@
 ; CHECK-NEXT:    stdu r1, -48(r1)
 ; CHECK-NEXT:    lxv v2, 0(r3)
 ; CHECK-NEXT:    mr r30, r4
-; CHECK-NEXT:    bl lrintl
+; CHECK-NEXT:    bl __lrintieee128
 ; CHECK-NEXT:    nop
 ; CHECK-NEXT:    stw r3, 0(r30)
 ; CHECK-NEXT:    addi r1, r1, 48
@@ -1124,7 +1124,7 @@
 ; CHECK-P8-NEXT:    stdu r1, -48(r1)
 ; CHECK-P8-NEXT:    lvx v2, 0, r3
 ; CHECK-P8-NEXT:    mr r30, r4
-; CHECK-P8-NEXT:    bl lrintl
+; CHECK-P8-NEXT:    bl __lrintieee128
 ; CHECK-P8-NEXT:    nop
 ; CHECK-P8-NEXT:    stw r3, 0(r30)
 ; CHECK-P8-NEXT:    addi r1, r1, 48
@@ -1152,7 +1152,7 @@
 ; CHECK-NEXT:    stdu r1, -48(r1)
 ; CHECK-NEXT:    lxv v2, 0(r3)
 ; CHECK-NEXT:    mr r30, r4
-; CHECK-NEXT:    bl llrintl
+; CHECK-NEXT:    bl __lrintieee128
 ; CHECK-NEXT:    nop
 ; CHECK-NEXT:    std r3, 0(r30)
 ; CHECK-NEXT:    addi r1, r1, 48
@@ -1172,7 +1172,7 @@
 ; CHECK-P8-NEXT:    stdu r1, -48(r1)
 ; CHECK-P8-NEXT:    lvx v2, 0, r3
 ; CHECK-P8-NEXT:    mr r30, r4
-; CHECK-P8-NEXT:    bl llrintl
+; CHECK-P8-NEXT:    bl __lrintieee128
 ; CHECK-P8-NEXT:    nop
 ; CHECK-P8-NEXT:    std r3, 0(r30)
 ; CHECK-P8-NEXT:    addi r1, r1, 48
@@ -1207,7 +1207,7 @@
 ; CHECK-P8-NEXT:    stdu r1, -48(r1)
 ; CHECK-P8-NEXT:    lvx v2, 0, r3
 ; CHECK-P8-NEXT:    mr r30, r4
-; CHECK-P8-NEXT:    bl nearbyintl
+; CHECK-P8-NEXT:    bl __nearbyintieee128
 ; CHECK-P8-NEXT:    nop
 ; CHECK-P8-NEXT:    stvx v2, 0, r30
 ; CHECK-P8-NEXT:    addi r1, r1, 48
@@ -1246,7 +1246,7 @@
 ; CHECK-P8-NEXT:    lvx v3, 0, r4
 ; CHECK-P8-NEXT:    lvx v4, 0, r5
 ; CHECK-P8-NEXT:    mr r30, r6
-; CHECK-P8-NEXT:    bl fmal
+; CHECK-P8-NEXT:    bl __fmaieee128
 ; CHECK-P8-NEXT:    nop
 ; CHECK-P8-NEXT:    stvx v2, 0, r30
 ; CHECK-P8-NEXT:    addi r1, r1, 48
diff --git a/llvm/test/CodeGen/PowerPC/f128-conv.ll b/llvm/test/CodeGen/PowerPC/f128-conv.ll
--- a/llvm/test/CodeGen/PowerPC/f128-conv.ll
+++ b/llvm/test/CodeGen/PowerPC/f128-conv.ll
@@ -63,7 +63,7 @@
 ; CHECK-NEXT:    mr r30, r3
 ; CHECK-NEXT:    mr r3, r4
 ; CHECK-NEXT:    mr r4, r5
-; CHECK-NEXT:    bl __floattitf
+; CHECK-NEXT:    bl __floattikf
 ; CHECK-NEXT:    nop
 ; CHECK-NEXT:    stxv v2, 0(r30)
 ; CHECK-NEXT:    addi r1, r1, 48
@@ -84,7 +84,7 @@
 ; CHECK-P8-NEXT:    mr r30, r3
 ; CHECK-P8-NEXT:    mr r3, r4
 ; CHECK-P8-NEXT:    mr r4, r5
-; CHECK-P8-NEXT:    bl __floattitf
+; CHECK-P8-NEXT:    bl __floattikf
 ; CHECK-P8-NEXT:    nop
 ; CHECK-P8-NEXT:    std r4, 8(r30)
 ; CHECK-P8-NEXT:    std r3, 0(r30)
@@ -231,7 +231,7 @@
 ; CHECK-NEXT:    mr r30, r3
 ; CHECK-NEXT:    mr r3, r4
 ; CHECK-NEXT:    mr r4, r5
-; CHECK-NEXT:    bl __floatuntitf
+; CHECK-NEXT:    bl __floatuntikf
 ; CHECK-NEXT:    nop
 ; CHECK-NEXT:    stxv v2, 0(r30)
 ; CHECK-NEXT:    addi r1, r1, 48
@@ -252,7 +252,7 @@
 ; CHECK-P8-NEXT:    mr r30, r3
 ; CHECK-P8-NEXT:    mr r3, r4
 ; CHECK-P8-NEXT:    mr r4, r5
-; CHECK-P8-NEXT:    bl __floatuntitf
+; CHECK-P8-NEXT:    bl __floatuntikf
 ; CHECK-P8-NEXT:    nop
 ; CHECK-P8-NEXT:    std r4, 8(r30)
 ; CHECK-P8-NEXT:    std r3, 0(r30)
@@ -2068,7 +2068,7 @@
 ; CHECK-NEXT:    .cfi_def_cfa_offset 32
 ; CHECK-NEXT:    .cfi_offset lr, 16
 ; CHECK-NEXT:    lxv v2, 0(r3)
-; CHECK-NEXT:    bl __fixtfti
+; CHECK-NEXT:    bl __fixkfti
 ; CHECK-NEXT:    nop
 ; CHECK-NEXT:    addi r1, r1, 32
 ; CHECK-NEXT:    ld r0, 16(r1)
@@ -2085,7 +2085,7 @@
 ; CHECK-P8-NEXT:    ld r5, 0(r3)
 ; CHECK-P8-NEXT:    ld r4, 8(r3)
 ; CHECK-P8-NEXT:    mr r3, r5
-; CHECK-P8-NEXT:    bl __fixtfti
+; CHECK-P8-NEXT:    bl __fixkfti
 ; CHECK-P8-NEXT:    nop
 ; CHECK-P8-NEXT:    addi r1, r1, 32
 ; CHECK-P8-NEXT:    ld r0, 16(r1)
@@ -2107,7 +2107,7 @@
 ; CHECK-NEXT:    .cfi_def_cfa_offset 32
 ; CHECK-NEXT:    .cfi_offset lr, 16
 ; CHECK-NEXT:    lxv v2, 0(r3)
-; CHECK-NEXT:    bl __fixunstfti
+; CHECK-NEXT:    bl __fixunskfti
 ; CHECK-NEXT:    nop
 ; CHECK-NEXT:    addi r1, r1, 32
 ; CHECK-NEXT:    ld r0, 16(r1)
@@ -2124,7 +2124,7 @@
 ; CHECK-P8-NEXT:    ld r5, 0(r3)
 ; CHECK-P8-NEXT:    ld r4, 8(r3)
 ; CHECK-P8-NEXT:    mr r3, r5
-; CHECK-P8-NEXT:    bl __fixunstfti
+; CHECK-P8-NEXT:    bl __fixunskfti
 ; CHECK-P8-NEXT:    nop
 ; CHECK-P8-NEXT:    addi r1, r1, 32
 ; CHECK-P8-NEXT:    ld r0, 16(r1)
diff --git a/llvm/test/CodeGen/PowerPC/f128-rounding.ll b/llvm/test/CodeGen/PowerPC/f128-rounding.ll
--- a/llvm/test/CodeGen/PowerPC/f128-rounding.ll
+++ b/llvm/test/CodeGen/PowerPC/f128-rounding.ll
@@ -27,7 +27,7 @@
 ; CHECK-P8-NEXT:    mr r30, r4
 ; CHECK-P8-NEXT:    mr r3, r5
 ; CHECK-P8-NEXT:    mr r4, r6
-; CHECK-P8-NEXT:    bl truncl
+; CHECK-P8-NEXT:    bl __truncieee128
 ; CHECK-P8-NEXT:    nop
 ; CHECK-P8-NEXT:    std r3, 0(r30)
 ; CHECK-P8-NEXT:    std r4, 8(r30)
@@ -66,7 +66,7 @@
 ; CHECK-P8-NEXT:    mr r30, r4
 ; CHECK-P8-NEXT:    mr r3, r5
 ; CHECK-P8-NEXT:    mr r4, r6
-; CHECK-P8-NEXT:    bl rintl
+; CHECK-P8-NEXT:    bl __rintieee128
 ; CHECK-P8-NEXT:    nop
 ; CHECK-P8-NEXT:    std r3, 0(r30)
 ; CHECK-P8-NEXT:    std r4, 8(r30)
@@ -105,7 +105,7 @@
 ; CHECK-P8-NEXT:    mr r30, r4
 ; CHECK-P8-NEXT:    mr r3, r5
 ; CHECK-P8-NEXT:    mr r4, r6
-; CHECK-P8-NEXT:    bl nearbyintl
+; CHECK-P8-NEXT:    bl __nearbyintieee128
 ; CHECK-P8-NEXT:    nop
 ; CHECK-P8-NEXT:    std r3, 0(r30)
 ; CHECK-P8-NEXT:    std r4, 8(r30)
@@ -144,7 +144,7 @@
 ; CHECK-P8-NEXT:    mr r30, r4
 ; CHECK-P8-NEXT:    mr r3, r5
 ; CHECK-P8-NEXT:    mr r4, r6
-; CHECK-P8-NEXT:    bl roundl
+; CHECK-P8-NEXT:    bl __roundieee128
 ; CHECK-P8-NEXT:    nop
 ; CHECK-P8-NEXT:    std r3, 0(r30)
 ; CHECK-P8-NEXT:    std r4, 8(r30)
@@ -183,7 +183,7 @@
 ; CHECK-P8-NEXT:    mr r30, r4
 ; CHECK-P8-NEXT:    mr r3, r5
 ; CHECK-P8-NEXT:    mr r4, r6
-; CHECK-P8-NEXT:    bl floorl
+; CHECK-P8-NEXT:    bl __floorieee128
 ; CHECK-P8-NEXT:    nop
 ; CHECK-P8-NEXT:    std r3, 0(r30)
 ; CHECK-P8-NEXT:    std r4, 8(r30)
@@ -222,7 +222,7 @@
 ; CHECK-P8-NEXT:    mr r30, r4
 ; CHECK-P8-NEXT:    mr r3, r5
 ; CHECK-P8-NEXT:    mr r4, r6
-; CHECK-P8-NEXT:    bl ceill
+; CHECK-P8-NEXT:    bl __ceilieee128
 ; CHECK-P8-NEXT:    nop
 ; CHECK-P8-NEXT:    std r3, 0(r30)
 ; CHECK-P8-NEXT:    std r4, 8(r30)
diff --git a/llvm/test/CodeGen/PowerPC/fp-strict-conv-f128.ll b/llvm/test/CodeGen/PowerPC/fp-strict-conv-f128.ll
--- a/llvm/test/CodeGen/PowerPC/fp-strict-conv-f128.ll
+++ b/llvm/test/CodeGen/PowerPC/fp-strict-conv-f128.ll
@@ -42,7 +42,7 @@
 ; P8-NEXT:    stdu r1, -112(r1)
 ; P8-NEXT:    .cfi_def_cfa_offset 112
 ; P8-NEXT:    .cfi_offset lr, 16
-; P8-NEXT:    bl __fixtfti
+; P8-NEXT:    bl __fixkfti
 ; P8-NEXT:    nop
 ; P8-NEXT:    addi r1, r1, 112
 ; P8-NEXT:    ld r0, 16(r1)
@@ -56,7 +56,7 @@
 ; P9-NEXT:    stdu r1, -32(r1)
 ; P9-NEXT:    .cfi_def_cfa_offset 32
 ; P9-NEXT:    .cfi_offset lr, 16
-; P9-NEXT:    bl __fixtfti
+; P9-NEXT:    bl __fixkfti
 ; P9-NEXT:    nop
 ; P9-NEXT:    addi r1, r1, 32
 ; P9-NEXT:    ld r0, 16(r1)
@@ -70,7 +70,7 @@
 ; NOVSX-NEXT:    stdu r1, -32(r1)
 ; NOVSX-NEXT:    .cfi_def_cfa_offset 32
 ; NOVSX-NEXT:    .cfi_offset lr, 16
-; NOVSX-NEXT:    bl __fixtfti
+; NOVSX-NEXT:    bl __fixkfti
 ; NOVSX-NEXT:    nop
 ; NOVSX-NEXT:    addi r1, r1, 32
 ; NOVSX-NEXT:    ld r0, 16(r1)
@@ -89,7 +89,7 @@
 ; P8-NEXT:    stdu r1, -112(r1)
 ; P8-NEXT:    .cfi_def_cfa_offset 112
 ; P8-NEXT:    .cfi_offset lr, 16
-; P8-NEXT:    bl __fixunstfti
+; P8-NEXT:    bl __fixunskfti
 ; P8-NEXT:    nop
 ; P8-NEXT:    addi r1, r1, 112
 ; P8-NEXT:    ld r0, 16(r1)
@@ -103,7 +103,7 @@
 ; P9-NEXT:    stdu r1, -32(r1)
 ; P9-NEXT:    .cfi_def_cfa_offset 32
 ; P9-NEXT:    .cfi_offset lr, 16
-; P9-NEXT:    bl __fixunstfti
+; P9-NEXT:    bl __fixunskfti
 ; P9-NEXT:    nop
 ; P9-NEXT:    addi r1, r1, 32
 ; P9-NEXT:    ld r0, 16(r1)
@@ -117,7 +117,7 @@
 ; NOVSX-NEXT:    stdu r1, -32(r1)
 ; NOVSX-NEXT:    .cfi_def_cfa_offset 32
 ; NOVSX-NEXT:    .cfi_offset lr, 16
-; NOVSX-NEXT:    bl __fixunstfti
+; NOVSX-NEXT:    bl __fixunskfti
 ; NOVSX-NEXT:    nop
 ; NOVSX-NEXT:    addi r1, r1, 32
 ; NOVSX-NEXT:    ld r0, 16(r1)
diff --git a/llvm/test/CodeGen/PowerPC/recipest.ll b/llvm/test/CodeGen/PowerPC/recipest.ll
--- a/llvm/test/CodeGen/PowerPC/recipest.ll
+++ b/llvm/test/CodeGen/PowerPC/recipest.ll
@@ -1155,7 +1155,7 @@
 ; CHECK-P7-NEXT:    mflr 0
 ; CHECK-P7-NEXT:    std 0, 16(1)
 ; CHECK-P7-NEXT:    stdu 1, -112(1)
-; CHECK-P7-NEXT:    bl sqrtl
+; CHECK-P7-NEXT:    bl __sqrtieee128
 ; CHECK-P7-NEXT:    nop
 ; CHECK-P7-NEXT:    addi 1, 1, 112
 ; CHECK-P7-NEXT:    ld 0, 16(1)
@@ -1167,7 +1167,7 @@
 ; CHECK-P8-NEXT:    mflr 0
 ; CHECK-P8-NEXT:    std 0, 16(1)
 ; CHECK-P8-NEXT:    stdu 1, -32(1)
-; CHECK-P8-NEXT:    bl sqrtl
+; CHECK-P8-NEXT:    bl __sqrtieee128
 ; CHECK-P8-NEXT:    nop
 ; CHECK-P8-NEXT:    addi 1, 1, 32
 ; CHECK-P8-NEXT:    ld 0, 16(1)
@@ -1188,7 +1188,7 @@
 ; CHECK-P7-NEXT:    mflr 0
 ; CHECK-P7-NEXT:    std 0, 16(1)
 ; CHECK-P7-NEXT:    stdu 1, -112(1)
-; CHECK-P7-NEXT:    bl sqrtl
+; CHECK-P7-NEXT:    bl __sqrtieee128
 ; CHECK-P7-NEXT:    nop
 ; CHECK-P7-NEXT:    addi 1, 1, 112
 ; CHECK-P7-NEXT:    ld 0, 16(1)
@@ -1200,7 +1200,7 @@
 ; CHECK-P8-NEXT:    mflr 0
 ; CHECK-P8-NEXT:    std 0, 16(1)
 ; CHECK-P8-NEXT:    stdu 1, -32(1)
-; CHECK-P8-NEXT:    bl sqrtl
+; CHECK-P8-NEXT:    bl __sqrtieee128
 ; CHECK-P8-NEXT:    nop
 ; CHECK-P8-NEXT:    addi 1, 1, 32
 ; CHECK-P8-NEXT:    ld 0, 16(1)