Index: llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
===================================================================
--- llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
+++ llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
@@ -196,7 +196,7 @@
   markSuperRegs(Reserved, ARM::PC);
   markSuperRegs(Reserved, ARM::FPSCR);
   markSuperRegs(Reserved, ARM::APSR_NZCV);
-  if (TFI->hasFP(MF))
+  if (TFI->hasFP(MF) || STI.isTargetDarwin())
     markSuperRegs(Reserved, getFramePointerReg(STI));
   if (hasBasePointer(MF))
     markSuperRegs(Reserved, BasePtr);
Index: llvm/lib/Target/ARM/ARMFrameLowering.cpp
===================================================================
--- llvm/lib/Target/ARM/ARMFrameLowering.cpp
+++ llvm/lib/Target/ARM/ARMFrameLowering.cpp
@@ -1641,6 +1641,10 @@
   // Spill the first NumSpills D-registers after realigning the stack.
   MF.getInfo<ARMFunctionInfo>()->setNumAlignedDPRCS2Regs(NumSpills);
 
+  // Mark the stack as being realigned so later code knows a frame pointer
+  // is needed.
+  MF.getFrameInfo().ensureMaxAlignment(16);
+
   // A scratch register is required for the vst1 / vld1 instructions.
   SavedRegs.set(ARM::R4);
 }
@@ -1679,7 +1683,6 @@
   MachineRegisterInfo &MRI = MF.getRegInfo();
   const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
   (void)TRI;  // Silence unused warning in non-assert builds.
-  Register FramePtr = RegInfo->getFrameRegister(MF);
 
   // Spill R4 if Thumb2 function requires stack realignment - it will be used as
   // scratch register. Also spill R4 if Thumb2 function has varsized objects,
@@ -1901,6 +1904,7 @@
     AFI->setHasStackFrame(true);
 
     if (HasFP) {
+      Register FramePtr = RegInfo->getFrameRegister(MF);
       SavedRegs.set(FramePtr);
       // If the frame pointer is required by the ABI, also spill LR so that we
       // emit a complete frame record.
Index: llvm/test/CodeGen/ARM/machine-outliner-thunk.ll
===================================================================
--- llvm/test/CodeGen/ARM/machine-outliner-thunk.ll
+++ llvm/test/CodeGen/ARM/machine-outliner-thunk.ll
@@ -113,7 +113,7 @@
 
 ; MACHO-LABEL: name:            OUTLINED_FUNCTION_0
 ; MACHO:        bb.0:
-; MACHO-NEXT:   liveins: $r7, $r6, $r5, $r4, $r11, $r10, $r8, $d15, $d14, $d13, $d12, $d11, $d10, $d9, $d8
+; MACHO-NEXT:   liveins: $r6, $r5, $r4, $r11, $r10, $r8, $d15, $d14, $d13, $d12, $d11, $d10, $d9, $d8
 ; MACHO:        $r0, dead $cpsr = tMOVi8 1, 14 /* CC::al */, $noreg
 ; MACHO-NEXT:   $r1, dead $cpsr = tMOVi8 2, 14 /* CC::al */, $noreg
 ; MACHO-NEXT:   $r2, dead $cpsr = tMOVi8 3, 14 /* CC::al */, $noreg
Index: llvm/test/CodeGen/ARM/r7-fixed-darwin.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/ARM/r7-fixed-darwin.ll
@@ -0,0 +1,15 @@
+; RUN: llc -mtriple=thumbv7k-apple-watchos %s -o - | FileCheck %s
+
+; r7 is FP on Darwin, and should be preserved even if we don't create a new
+; frame record for this leaf function. So make huge register pressure to try &
+; tempt LLVM to use it.
+define void @foo([16 x i32]* %ptr) {
+; CHECK-LABEL: foo:
+; CHECK: push.w
+; CHECK: .cfi_offset r7
+; CHECK-NOT: r7
+; CHECK: pop.w
+  %val = load volatile [16 x i32], [16 x i32]* %ptr
+  store volatile [16 x i32] %val, [16 x i32]* %ptr
+  ret void
+}
Index: llvm/test/CodeGen/ARM/realign-adds-fp.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/ARM/realign-adds-fp.ll
@@ -0,0 +1,12 @@
+; RUN: llc -mtriple=armv7-apple-ios %s -o - | FileCheck %s
+
+; Realigning the stack pointer to push DPRs should trigger the creation of a
+; proper frame pointer, but previously we didn't push r7 here.
+
+; CHECK-LABEL: foo:
+; CHECK: push {r4, r7, lr}
+; CHECK: add r7, sp, #4
+define void @foo() "frame-pointer"="non-leaf" {
+  tail call void asm sideeffect "", "~{d8},~{d9},~{d10}"()
+  ret void
+}
Index: llvm/test/CodeGen/Thumb/long.ll
===================================================================
--- llvm/test/CodeGen/Thumb/long.ll
+++ llvm/test/CodeGen/Thumb/long.ll
@@ -234,7 +234,7 @@
   %c = add i64 %y, 47
   call void @f13(i64 %c)
 ; CHECK: adds
-; CHECK-NEXT: adcs
+; CHECK: adcs
 ; CHECK: bl
   ret void
 }
Index: llvm/test/CodeGen/Thumb2/2010-03-15-AsmCCClobber.ll
===================================================================
--- llvm/test/CodeGen/Thumb2/2010-03-15-AsmCCClobber.ll
+++ llvm/test/CodeGen/Thumb2/2010-03-15-AsmCCClobber.ll
@@ -17,7 +17,7 @@
 ; CHECK: bl _f2
 ; CHECK: clz {{r[0-9]+}}
 ; CHECK-DAG: lsrs    {{r[0-9]+}}
-; CHECK-DAG: lsls    {{r[0-9]+}}
+; CHECK-DAG: lsl.w    {{r[0-9]+}}
 ; CHECK-NEXT: orr.w   {{r[0-9]+}}
 ; CHECK-NEXT: InlineAsm Start
 define void @test(%s1* %this, i32 %format, i32 %w, i32 %h, i32 %levels, i32* %s, i8* %data, i32* nocapture %rowbytes, void (i8*, i8*)* %release, i8* %info) nounwind {