diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -139,6 +139,15 @@ //===----------------------------------------------------------------------===// bool ISD::isConstantSplatVector(const SDNode *N, APInt &SplatVal) { + if (N->getOpcode() == ISD::SPLAT_VECTOR) { + unsigned EltSize = + N->getValueType(0).getVectorElementType().getSizeInBits(); + if (auto *Op0 = dyn_cast(N->getOperand(0))) { + SplatVal = Op0->getAPIntValue().truncOrSelf(EltSize); + return true; + } + } + auto *BV = dyn_cast(N); if (!BV) return false; diff --git a/llvm/test/CodeGen/AArch64/sve-gep.ll b/llvm/test/CodeGen/AArch64/sve-gep.ll --- a/llvm/test/CodeGen/AArch64/sve-gep.ll +++ b/llvm/test/CodeGen/AArch64/sve-gep.ll @@ -105,11 +105,9 @@ ; CHECK-LABEL: scalable_of_scalable_1: ; CHECK: // %bb.0: ; CHECK-NEXT: rdvl x8, #1 -; CHECK-NEXT: mov z1.d, #1 // =0x1 -; CHECK-NEXT: mov z0.d, x0 -; CHECK-NEXT: mov z2.d, x8 -; CHECK-NEXT: ptrue p0.d -; CHECK-NEXT: mla z0.d, p0/m, z2.d, z1.d +; CHECK-NEXT: mov z0.d, x8 +; CHECK-NEXT: mov z1.d, x0 +; CHECK-NEXT: add z0.d, z1.d, z0.d ; CHECK-NEXT: ret %idx = shufflevector insertelement ( undef, i64 1, i32 0), zeroinitializer, zeroinitializer %d = getelementptr , * %base, %idx @@ -120,10 +118,8 @@ ; CHECK-LABEL: scalable_of_scalable_2: ; CHECK: // %bb.0: ; CHECK-NEXT: rdvl x8, #1 -; CHECK-NEXT: mov z1.d, #1 // =0x1 -; CHECK-NEXT: mov z2.d, x8 -; CHECK-NEXT: ptrue p0.d -; CHECK-NEXT: mla z0.d, p0/m, z2.d, z1.d +; CHECK-NEXT: mov z1.d, x8 +; CHECK-NEXT: add z0.d, z0.d, z1.d ; CHECK-NEXT: ret %idx = shufflevector insertelement ( undef, i64 1, i32 0), zeroinitializer, zeroinitializer %d = getelementptr , *> %base, %idx