diff --git a/llvm/lib/Target/AArch64/AArch64.td b/llvm/lib/Target/AArch64/AArch64.td
--- a/llvm/lib/Target/AArch64/AArch64.td
+++ b/llvm/lib/Target/AArch64/AArch64.td
@@ -280,11 +280,6 @@
     "nv", "HasNV", "true",
     "Enable v8.4-A Nested Virtualization Enchancement">;
 
-def FeatureRASv8_4 : SubtargetFeature<
-    "rasv8_4", "HasRASv8_4", "true",
-    "Enable v8.4-A Reliability, Availability and Serviceability extension",
-    [FeatureRAS]>;
-
 def FeatureMPAM : SubtargetFeature<
     "mpam", "HasMPAM", "true",
     "Enable v8.4-A Memory system Partitioning and Monitoring extension">;
@@ -427,7 +422,7 @@
 
 def HasV8_4aOps : SubtargetFeature<"v8.4a", "HasV8_4aOps", "true",
   "Support ARM v8.4a instructions", [HasV8_3aOps, FeatureDotProd,
-  FeatureNV, FeatureRASv8_4, FeatureMPAM, FeatureDIT,
+  FeatureNV, FeatureMPAM, FeatureDIT,
   FeatureTRACEV8_4, FeatureAM, FeatureSEL2, FeaturePMU, FeatureTLB_RMI,
   FeatureFMI, FeatureRCPC_IMMO]>;
 
@@ -454,7 +449,7 @@
   FeatureComplxNum, FeatureCCIDX, FeatureJS,
   FeaturePA, FeatureRCPC,
   //v8.4
-  FeatureDotProd, FeatureFP16FML, FeatureRASv8_4, FeatureTRACEV8_4,
+  FeatureDotProd, FeatureFP16FML, FeatureTRACEV8_4,
   FeatureTLB_RMI, FeatureFMI, FeatureDIT, FeatureSEL2, FeatureRCPC_IMMO,
   //v8.5
   FeatureSSBS, FeaturePredRes, FeatureSB, FeatureSpecRestrict]>;
diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.td b/llvm/lib/Target/AArch64/AArch64InstrInfo.td
--- a/llvm/lib/Target/AArch64/AArch64InstrInfo.td
+++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.td
@@ -46,9 +46,6 @@
 def HasNV            : Predicate<"Subtarget->hasNV()">,
                        AssemblerPredicate<(all_of FeatureNV), "nv">;
 
-def HasRASv8_4       : Predicate<"Subtarget->hasRASv8_4()">,
-                       AssemblerPredicate<(all_of FeatureRASv8_4), "rasv8_4">;
-
 def HasMPAM          : Predicate<"Subtarget->hasMPAM()">,
                        AssemblerPredicate<(all_of FeatureMPAM), "mpam">;
 
diff --git a/llvm/lib/Target/AArch64/AArch64Subtarget.h b/llvm/lib/Target/AArch64/AArch64Subtarget.h
--- a/llvm/lib/Target/AArch64/AArch64Subtarget.h
+++ b/llvm/lib/Target/AArch64/AArch64Subtarget.h
@@ -130,7 +130,6 @@
 
   // ARMv8.4 extensions
   bool HasNV = false;
-  bool HasRASv8_4 = false;
   bool HasMPAM = false;
   bool HasDIT = false;
   bool HasTRACEV8_4 = false;
@@ -486,7 +485,6 @@
   bool hasComplxNum() const { return HasComplxNum; }
 
   bool hasNV() const { return HasNV; }
-  bool hasRASv8_4() const { return HasRASv8_4; }
   bool hasMPAM() const { return HasMPAM; }
   bool hasDIT() const { return HasDIT; }
   bool hasTRACEV8_4() const { return HasTRACEV8_4; }
diff --git a/llvm/lib/Target/AArch64/AArch64SystemOperands.td b/llvm/lib/Target/AArch64/AArch64SystemOperands.td
--- a/llvm/lib/Target/AArch64/AArch64SystemOperands.td
+++ b/llvm/lib/Target/AArch64/AArch64SystemOperands.td
@@ -1335,13 +1335,11 @@
 
 // v8.4a RAS registers
 //                              Op0   Op1    CRn     CRm     Op2
-let Requires = [{ {AArch64::FeatureRASv8_4} }] in {
 def : RWSysReg<"ERXPFGCTL_EL1", 0b11, 0b000, 0b0101, 0b0100, 0b101>;
 def : RWSysReg<"ERXPFGCDN_EL1", 0b11, 0b000, 0b0101, 0b0100, 0b110>;
 def : RWSysReg<"ERXMISC2_EL1",  0b11, 0b000, 0b0101, 0b0101, 0b010>;
 def : RWSysReg<"ERXMISC3_EL1",  0b11, 0b000, 0b0101, 0b0101, 0b011>;
 def : ROSysReg<"ERXPFGF_EL1",   0b11, 0b000, 0b0101, 0b0100, 0b100>;
-} // FeatureRASv8_4
 
 // v8.4a MPAM registers
 //                             Op0   Op1    CRn     CRm     Op2
diff --git a/llvm/test/MC/AArch64/armv8.4a-ras.s b/llvm/test/MC/AArch64/armv8.4a-ras.s
--- a/llvm/test/MC/AArch64/armv8.4a-ras.s
+++ b/llvm/test/MC/AArch64/armv8.4a-ras.s
@@ -1,8 +1,6 @@
-// RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+v8.4a < %s 2> %t | FileCheck %s --check-prefix=CHECK
+// RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding < %s 2> %t | FileCheck %s --check-prefix=CHECK
 // RUN: FileCheck --check-prefix=CHECK-RO < %t %s
 
-// RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=-v8.4a < %s 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR
-
 //------------------------------------------------------------------------------
 // ARMV8.4-A RAS Extensions
 //------------------------------------------------------------------------------
@@ -14,32 +12,24 @@
 
 //CHECK:  msr ERXPFGCTL_EL1, x0       // encoding: [0xa0,0x54,0x18,0xd5]
 //CHECK:  mrs x0, ERXPFGCTL_EL1       // encoding: [0xa0,0x54,0x38,0xd5]
-//CHECK-ERROR: error: expected writable system register or pstate
-//CHECK-ERROR: error: expected readable system register
 
   msr ERXPFGCDN_EL1, x0
   mrs x0,ERXPFGCDN_EL1
 
 //CHECK:  msr ERXPFGCDN_EL1, x0       // encoding: [0xc0,0x54,0x18,0xd5]
 //CHECK:  mrs x0, ERXPFGCDN_EL1       // encoding: [0xc0,0x54,0x38,0xd5]
-//CHECK-ERROR: error: expected writable system register or pstate
-//CHECK-ERROR: error: expected readable system register
 
   msr ERXMISC2_EL1, x0
   mrs x0, ERXMISC2_EL1
 
 //CHECK:   msr ERXMISC2_EL1, x0        // encoding: [0x40,0x55,0x18,0xd5]
 //CHECK:   mrs x0, ERXMISC2_EL1        // encoding: [0x40,0x55,0x38,0xd5]
-//CHECK-ERROR: error: expected writable system register or pstate
-//CHECK-ERROR: error: expected readable system register
 
   msr ERXMISC3_EL1, x0
   mrs x0, ERXMISC3_EL1
 
 //CHECK:  msr ERXMISC3_EL1, x0        // encoding: [0x60,0x55,0x18,0xd5]
 //CHECK:  mrs x0, ERXMISC3_EL1        // encoding: [0x60,0x55,0x38,0xd5]
-//CHECK-ERROR: error: expected writable system register or pstate
-//CHECK-ERROR: error: expected readable system register
 
 // Read-only registers:
 
@@ -48,5 +38,3 @@
 
 //CHECK:  mrs x0, ERXPFGF_EL1         // encoding: [0x80,0x54,0x38,0xd5]
 //CHECK-RO: error: expected writable system register or pstate
-//CHECK-ERROR: error: expected readable system register
-//CHECK-ERROR: error: expected writable system register or pstate