diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -3759,9 +3759,13 @@ break; } - // FIXME: It seems Legalized is false iff CCCode is Legal. I don't - // understand if this code is useful for strict nodes. - assert(!IsStrict && "Don't know how to expand for strict nodes."); + if (IsStrict) { + // FIXME: We may need to add STRICT_FSELECT_CC and STRICT_FSELECT_CCS + // handing for target that only supports SELECT_CC. + assert(!TLI.isStrictFPEnabled() && + "Expanding to SELECT_CC is not supported for strict nodes."); + break; + } // Otherwise, SETCC for the given comparison type must be completely // illegal; expand it into a SELECT_CC. @@ -3785,7 +3789,7 @@ break; } case ISD::SELECT_CC: { - // TODO: need to add STRICT_SELECT_CC and STRICT_SELECT_CCS + // TODO: need to add STRICT_FSELECT_CC and STRICT_FSELECT_CCS Tmp1 = Node->getOperand(0); // LHS Tmp2 = Node->getOperand(1); // RHS Tmp3 = Node->getOperand(2); // True @@ -3860,7 +3864,7 @@ break; } case ISD::BR_CC: { - // TODO: need to add STRICT_BR_CC and STRICT_BR_CCS + // TODO: need to add STRICT_FBR_CC and STRICT_FBR_CCS SDValue Chain; Tmp1 = Node->getOperand(0); // Chain Tmp2 = Node->getOperand(2); // LHS diff --git a/llvm/test/CodeGen/WebAssembly/pr47990.ll b/llvm/test/CodeGen/WebAssembly/pr47990.ll new file mode 100644 --- /dev/null +++ b/llvm/test/CodeGen/WebAssembly/pr47990.ll @@ -0,0 +1,29 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc < %s | FileCheck %s + +target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" +target triple = "wasm32-unknown-wasi" + +@b = global double 0.000000e+00, align 8 +@a = global double 0.000000e+00, align 8 + +define i32 @c() nounwind strictfp { +; CHECK-LABEL: c: +; CHECK: .functype c () -> (i32) +; CHECK-NEXT: # %bb.0: # %entry +; CHECK-NEXT: global.get __stack_pointer +; CHECK-NEXT: i32.const 16 +; CHECK-NEXT: i32.sub +; CHECK-NEXT: i32.load 12 +; CHECK-NEXT: # fallthrough-return +entry: + %retval = alloca i32, align 4 + %0 = load double, double* @b, align 8 + %1 = load double, double* @a, align 8 + %cmp = call i1 @llvm.experimental.constrained.fcmp.f64(double %0, double %1, metadata !"oeq", metadata !"fpexcept.strict") strictfp + %conv = zext i1 %cmp to i32 + %2 = load i32, i32* %retval, align 4 + ret i32 %2 +} + +declare i1 @llvm.experimental.constrained.fcmp.f64(double, double, metadata, metadata) strictfp