diff --git a/llvm/lib/Target/PowerPC/PPCCallingConv.td b/llvm/lib/Target/PowerPC/PPCCallingConv.td --- a/llvm/lib/Target/PowerPC/PPCCallingConv.td +++ b/llvm/lib/Target/PowerPC/PPCCallingConv.td @@ -129,7 +129,9 @@ CCIfType<[i16], CCPromoteToType>, CCIfType<[i32], CCPromoteToType>, CCIfType<[i64], CCAssignToReg<[X3, X4, X5, X6, X7, X8, X9, X10]>>, - CCIfType<[f32, f64], CCAssignToReg<[F1, F2, F3, F4, F5, F6, F7, F8]>> + CCIfType<[f32, f64], CCAssignToReg<[F1, F2, F3, F4, F5, F6, F7, F8]>>, + CCIfType<[f128], + CCAssignToReg<[V2, V3, V4, V5, V6, V7, V8, V9, V10, V11, V12, V13]>> ]>; // Simple return-value convention for 64-bit ELF PowerPC fast isel. diff --git a/llvm/test/CodeGen/PowerPC/f128-passByValue.ll b/llvm/test/CodeGen/PowerPC/f128-passByValue.ll --- a/llvm/test/CodeGen/PowerPC/f128-passByValue.ll +++ b/llvm/test/CodeGen/PowerPC/f128-passByValue.ll @@ -266,3 +266,32 @@ store double %conv1, double* %d1, align 8 ret void } + +; Function Attrs: noinline optnone +define signext i32 @noopt_call_crash() #0 { +; CHECK-LABEL: noopt_call_crash: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: mflr r0 +; CHECK-NEXT: std r0, 16(r1) +; CHECK-NEXT: stdu r1, -96(r1) +; CHECK-NEXT: .cfi_def_cfa_offset 96 +; CHECK-NEXT: .cfi_offset lr, 16 +; CHECK-NEXT: bl in +; CHECK-NEXT: nop +; CHECK-NEXT: bl out +; CHECK-NEXT: nop +; CHECK-NEXT: li r3, 0 +; CHECK-NEXT: addi r1, r1, 96 +; CHECK-NEXT: ld r0, 16(r1) +; CHECK-NEXT: mtlr r0 +; CHECK-NEXT: blr +entry: + %call = call fp128 @in() + call void @out(fp128 %call) + ret i32 0 +} + +declare void @out(fp128) +declare fp128 @in() + +attributes #0 = { noinline optnone }