diff --git a/llvm/include/llvm/Analysis/TargetTransformInfo.h b/llvm/include/llvm/Analysis/TargetTransformInfo.h --- a/llvm/include/llvm/Analysis/TargetTransformInfo.h +++ b/llvm/include/llvm/Analysis/TargetTransformInfo.h @@ -21,6 +21,7 @@ #ifndef LLVM_ANALYSIS_TARGETTRANSFORMINFO_H #define LLVM_ANALYSIS_TARGETTRANSFORMINFO_H +#include "llvm/IR/InstrTypes.h" #include "llvm/IR/Operator.h" #include "llvm/IR/PassManager.h" #include "llvm/Pass.h" @@ -1092,10 +1093,14 @@ /// \returns The expected cost of compare and select instructions. If there /// is an existing instruction that holds Opcode, it may be passed in the - /// 'I' parameter. - int getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy = nullptr, - TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput, - const Instruction *I = nullptr) const; + /// 'I' parameter. For vector selects, the optional \p VecPred parameter can + /// be used to indicate the select is using a compare with the specified + /// predicate as condition. + int getCmpSelInstrCost( + unsigned Opcode, Type *ValTy, Type *CondTy = nullptr, + TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput, + const Instruction *I = nullptr, + CmpInst::Predicate VecPred = CmpInst::BAD_ICMP_PREDICATE) const; /// \return The expected cost of vector Insert and Extract. /// Use -1 to indicate that there is no information on the index value. @@ -1533,9 +1538,10 @@ VectorType *VecTy, unsigned Index) = 0; virtual int getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind) = 0; - virtual int getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, - TTI::TargetCostKind CostKind, - const Instruction *I) = 0; + virtual int getCmpSelInstrCost( + unsigned Opcode, Type *ValTy, Type *CondTy, TTI::TargetCostKind CostKind, + const Instruction *I, + CmpInst::Predicate VecPred = CmpInst::BAD_ICMP_PREDICATE) = 0; virtual int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index) = 0; virtual int getMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment, @@ -1974,10 +1980,11 @@ int getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind) override { return Impl.getCFInstrCost(Opcode, CostKind); } - int getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, - TTI::TargetCostKind CostKind, - const Instruction *I) override { - return Impl.getCmpSelInstrCost(Opcode, ValTy, CondTy, CostKind, I); + int getCmpSelInstrCost( + unsigned Opcode, Type *ValTy, Type *CondTy, TTI::TargetCostKind CostKind, + const Instruction *I, + CmpInst::Predicate VecPred = CmpInst::BAD_ICMP_PREDICATE) override { + return Impl.getCmpSelInstrCost(Opcode, ValTy, CondTy, CostKind, I, VecPred); } int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index) override { return Impl.getVectorInstrCost(Opcode, Val, Index); diff --git a/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h b/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h --- a/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h +++ b/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h @@ -477,9 +477,10 @@ return 1; } - unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, - TTI::TargetCostKind CostKind, - const Instruction *I) const { + unsigned getCmpSelInstrCost( + unsigned Opcode, Type *ValTy, Type *CondTy, TTI::TargetCostKind CostKind, + const Instruction *I, + CmpInst::Predicate VecPred = CmpInst::BAD_ICMP_PREDICATE) const { return 1; } diff --git a/llvm/include/llvm/CodeGen/BasicTTIImpl.h b/llvm/include/llvm/CodeGen/BasicTTIImpl.h --- a/llvm/include/llvm/CodeGen/BasicTTIImpl.h +++ b/llvm/include/llvm/CodeGen/BasicTTIImpl.h @@ -880,16 +880,19 @@ return BaseT::getCFInstrCost(Opcode, CostKind); } - unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, - TTI::TargetCostKind CostKind, - const Instruction *I = nullptr) { + unsigned + getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, + TTI::TargetCostKind CostKind, + const Instruction *I = nullptr, + CmpInst::Predicate VecPred = CmpInst::BAD_ICMP_PREDICATE) { const TargetLoweringBase *TLI = getTLI(); int ISD = TLI->InstructionOpcodeToISD(Opcode); assert(ISD && "Invalid opcode"); // TODO: Handle other cost kinds. if (CostKind != TTI::TCK_RecipThroughput) - return BaseT::getCmpSelInstrCost(Opcode, ValTy, CondTy, CostKind, I); + return BaseT::getCmpSelInstrCost(Opcode, ValTy, CondTy, CostKind, I, + VecPred); // Selects on vectors are actually vector selects. if (ISD == ISD::SELECT) { diff --git a/llvm/lib/Analysis/TargetTransformInfo.cpp b/llvm/lib/Analysis/TargetTransformInfo.cpp --- a/llvm/lib/Analysis/TargetTransformInfo.cpp +++ b/llvm/lib/Analysis/TargetTransformInfo.cpp @@ -808,10 +808,12 @@ int TargetTransformInfo::getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, TTI::TargetCostKind CostKind, - const Instruction *I) const { + const Instruction *I, + CmpInst::Predicate VecPred) const { assert((I == nullptr || I->getOpcode() == Opcode) && "Opcode should reflect passed instruction."); - int Cost = TTIImpl->getCmpSelInstrCost(Opcode, ValTy, CondTy, CostKind, I); + int Cost = + TTIImpl->getCmpSelInstrCost(Opcode, ValTy, CondTy, CostKind, I, VecPred); assert(Cost >= 0 && "TTI should not produce negative costs!"); return Cost; } diff --git a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h --- a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h +++ b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h @@ -140,9 +140,10 @@ int getAddressComputationCost(Type *Ty, ScalarEvolution *SE, const SCEV *Ptr); - int getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, - TTI::TargetCostKind CostKind, - const Instruction *I = nullptr); + int getCmpSelInstrCost( + unsigned Opcode, Type *ValTy, Type *CondTy, TTI::TargetCostKind CostKind, + const Instruction *I = nullptr, + CmpInst::Predicate VecPred = CmpInst::BAD_ICMP_PREDICATE); TTI::MemCmpExpansionOptions enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const; diff --git a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp --- a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp +++ b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp @@ -6,8 +6,8 @@ // //===----------------------------------------------------------------------===// -#include "AArch64ExpandImm.h" #include "AArch64TargetTransformInfo.h" +#include "AArch64ExpandImm.h" #include "MCTargetDesc/AArch64AddressingModes.h" #include "llvm/Analysis/LoopInfo.h" #include "llvm/Analysis/TargetTransformInfo.h" @@ -16,9 +16,11 @@ #include "llvm/CodeGen/TargetLowering.h" #include "llvm/IR/IntrinsicInst.h" #include "llvm/IR/IntrinsicsAArch64.h" +#include "llvm/IR/PatternMatch.h" #include "llvm/Support/Debug.h" #include using namespace llvm; +using namespace llvm::PatternMatch; #define DEBUG_TYPE "aarch64tti" @@ -677,7 +679,8 @@ int AArch64TTIImpl::getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, TTI::TargetCostKind CostKind, - const Instruction *I) { + const Instruction *I, + CmpInst::Predicate VecPred) { // TODO: Handle other cost kinds. if (CostKind != TTI::TCK_RecipThroughput) return BaseT::getCmpSelInstrCost(Opcode, ValTy, CondTy, CostKind, I); @@ -688,6 +691,26 @@ if (ValTy->isVectorTy() && ISD == ISD::SELECT) { // We would need this many instructions to hide the scalarization happening. const int AmortizationCost = 20; + + // If VecPred is not set, check if we can get a predicate from the context + // instruction, if its type matches the requested ValTy. + if (VecPred == CmpInst::BAD_ICMP_PREDICATE && I && I->getType() == ValTy) { + CmpInst::Predicate CurrentPred; + if (match(I, m_Select(m_Cmp(CurrentPred, m_Value(), m_Value()), m_Value(), + m_Value()))) + VecPred = CurrentPred; + } + // Check if we have a compare/select chain that can be lowered using CMxx & + // BFI pair. + if (CmpInst::isIntPredicate(VecPred)) { + static const auto ValidMinMaxTys = {MVT::v8i8, MVT::v16i8, MVT::v4i16, + MVT::v8i16, MVT::v2i32, MVT::v4i32, + MVT::v2i64}; + auto LT = TLI->getTypeLegalizationCost(DL, ValTy); + if (any_of(ValidMinMaxTys, [<](MVT M) { return M == LT.second; })) + return LT.first; + } + static const TypeConversionCostTblEntry VectorSelectTbl[] = { { ISD::SELECT, MVT::v16i1, MVT::v16i16, 16 }, diff --git a/llvm/lib/Target/ARM/ARMTargetTransformInfo.h b/llvm/lib/Target/ARM/ARMTargetTransformInfo.h --- a/llvm/lib/Target/ARM/ARMTargetTransformInfo.h +++ b/llvm/lib/Target/ARM/ARMTargetTransformInfo.h @@ -212,9 +212,10 @@ TTI::CastContextHint CCH, TTI::TargetCostKind CostKind, const Instruction *I = nullptr); - int getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, - TTI::TargetCostKind CostKind, - const Instruction *I = nullptr); + int getCmpSelInstrCost( + unsigned Opcode, Type *ValTy, Type *CondTy, TTI::TargetCostKind CostKind, + const Instruction *I = nullptr, + CmpInst::Predicate VecPred = CmpInst::BAD_ICMP_PREDICATE); int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index); diff --git a/llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp b/llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp --- a/llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp +++ b/llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp @@ -811,7 +811,8 @@ int ARMTTIImpl::getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, TTI::TargetCostKind CostKind, - const Instruction *I) { + const Instruction *I, + CmpInst::Predicate VecPred) { int ISD = TLI->InstructionOpcodeToISD(Opcode); // Thumb scalar code size cost for select. @@ -839,7 +840,8 @@ } if (CostKind != TTI::TCK_RecipThroughput) - return BaseT::getCmpSelInstrCost(Opcode, ValTy, CondTy, CostKind, I); + return BaseT::getCmpSelInstrCost(Opcode, ValTy, CondTy, CostKind, I, + VecPred); // On NEON a vector select gets lowered to vbsl. if (ST->hasNEON() && ValTy->isVectorTy() && ISD == ISD::SELECT) { @@ -866,8 +868,8 @@ int BaseCost = ST->hasMVEIntegerOps() && ValTy->isVectorTy() ? ST->getMVEVectorCostFactor() : 1; - return BaseCost * BaseT::getCmpSelInstrCost(Opcode, ValTy, CondTy, CostKind, - I); + return BaseCost * + BaseT::getCmpSelInstrCost(Opcode, ValTy, CondTy, CostKind, I, VecPred); } int ARMTTIImpl::getAddressComputationCost(Type *Ty, ScalarEvolution *SE, diff --git a/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h b/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h --- a/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h +++ b/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h @@ -133,9 +133,11 @@ Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind = TTI::TCK_SizeAndLatency, bool UseMaskForCond = false, bool UseMaskForGaps = false); - unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, - TTI::TargetCostKind CostKind, - const Instruction *I = nullptr); + unsigned + getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, + TTI::TargetCostKind CostKind, + const Instruction *I = nullptr, + CmpInst::Predicate VecPred = CmpInst::BAD_ICMP_PREDICATE); unsigned getArithmeticInstrCost( unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput, diff --git a/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp b/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp --- a/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp +++ b/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp @@ -242,13 +242,16 @@ } unsigned HexagonTTIImpl::getCmpSelInstrCost(unsigned Opcode, Type *ValTy, - Type *CondTy, TTI::TargetCostKind CostKind, const Instruction *I) { + Type *CondTy, + TTI::TargetCostKind CostKind, + const Instruction *I, + CmpInst::Predicate VecPred) { if (ValTy->isVectorTy() && CostKind == TTI::TCK_RecipThroughput) { std::pair LT = TLI.getTypeLegalizationCost(DL, ValTy); if (Opcode == Instruction::FCmp) return LT.first + FloatFactor * getTypeNumElements(ValTy); } - return BaseT::getCmpSelInstrCost(Opcode, ValTy, CondTy, CostKind, I); + return BaseT::getCmpSelInstrCost(Opcode, ValTy, CondTy, CostKind, I, VecPred); } unsigned HexagonTTIImpl::getArithmeticInstrCost( diff --git a/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h b/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h --- a/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h +++ b/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h @@ -112,9 +112,10 @@ TTI::CastContextHint CCH, TTI::TargetCostKind CostKind, const Instruction *I = nullptr); int getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind); - int getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, - TTI::TargetCostKind CostKind, - const Instruction *I = nullptr); + int getCmpSelInstrCost( + unsigned Opcode, Type *ValTy, Type *CondTy, TTI::TargetCostKind CostKind, + const Instruction *I = nullptr, + CmpInst::Predicate VecPred = CmpInst::BAD_ICMP_PREDICATE); int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index); int getMemoryOpCost(unsigned Opcode, Type *Src, MaybeAlign Alignment, unsigned AddressSpace, diff --git a/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp b/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp --- a/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp +++ b/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp @@ -979,8 +979,10 @@ int PPCTTIImpl::getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, TTI::TargetCostKind CostKind, - const Instruction *I) { - int Cost = BaseT::getCmpSelInstrCost(Opcode, ValTy, CondTy, CostKind, I); + const Instruction *I, + CmpInst::Predicate VecPred) { + int Cost = + BaseT::getCmpSelInstrCost(Opcode, ValTy, CondTy, CostKind, I, VecPred); // TODO: Handle other cost kinds. if (CostKind != TTI::TCK_RecipThroughput) return Cost; diff --git a/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h b/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h --- a/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h +++ b/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h @@ -96,9 +96,10 @@ int getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind, const Instruction *I = nullptr); - int getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, - TTI::TargetCostKind CostKind, - const Instruction *I = nullptr); + int getCmpSelInstrCost( + unsigned Opcode, Type *ValTy, Type *CondTy, TTI::TargetCostKind CostKind, + const Instruction *I = nullptr, + CmpInst::Predicate VecPred = CmpInst::BAD_ICMP_PREDICATE); int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index); bool isFoldableLoad(const LoadInst *Ld, const Instruction *&FoldedValue); int getMemoryOpCost(unsigned Opcode, Type *Src, MaybeAlign Alignment, diff --git a/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp b/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp --- a/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp +++ b/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp @@ -849,9 +849,11 @@ int SystemZTTIImpl::getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, TTI::TargetCostKind CostKind, - const Instruction *I) { + const Instruction *I, + CmpInst::Predicate VecPred) { if (CostKind != TTI::TCK_RecipThroughput) - return BaseT::getCmpSelInstrCost(Opcode, ValTy, CondTy, CostKind); + return BaseT::getCmpSelInstrCost(Opcode, ValTy, CondTy, CostKind, nullptr, + VecPred); if (!ValTy->isVectorTy()) { switch (Opcode) { diff --git a/llvm/lib/Target/X86/X86TargetTransformInfo.h b/llvm/lib/Target/X86/X86TargetTransformInfo.h --- a/llvm/lib/Target/X86/X86TargetTransformInfo.h +++ b/llvm/lib/Target/X86/X86TargetTransformInfo.h @@ -132,9 +132,10 @@ int getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind, const Instruction *I = nullptr); - int getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, - TTI::TargetCostKind CostKind, - const Instruction *I = nullptr); + int getCmpSelInstrCost( + unsigned Opcode, Type *ValTy, Type *CondTy, TTI::TargetCostKind CostKind, + const Instruction *I = nullptr, + CmpInst::Predicate VecPred = CmpInst::BAD_ICMP_PREDICATE); int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index); unsigned getScalarizationOverhead(VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract); diff --git a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp --- a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp +++ b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp @@ -2085,10 +2085,12 @@ int X86TTIImpl::getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, TTI::TargetCostKind CostKind, - const Instruction *I) { + const Instruction *I, + CmpInst::Predicate VecPred) { // TODO: Handle other cost kinds. if (CostKind != TTI::TCK_RecipThroughput) - return BaseT::getCmpSelInstrCost(Opcode, ValTy, CondTy, CostKind, I); + return BaseT::getCmpSelInstrCost(Opcode, ValTy, CondTy, CostKind, I, + VecPred); // Legalize the type. std::pair LT = TLI->getTypeLegalizationCost(DL, ValTy); @@ -2272,7 +2274,7 @@ if (const auto *Entry = CostTableLookup(SSE1CostTbl, ISD, MTy)) return LT.first * (ExtraCost + Entry->Cost); - return BaseT::getCmpSelInstrCost(Opcode, ValTy, CondTy, CostKind, I); + return BaseT::getCmpSelInstrCost(Opcode, ValTy, CondTy, CostKind, I, VecPred); } unsigned X86TTIImpl::getAtomicMemIntrinsicMaxElementSize() const { return 16; } diff --git a/llvm/test/Analysis/CostModel/AArch64/vector-select.ll b/llvm/test/Analysis/CostModel/AArch64/vector-select.ll --- a/llvm/test/Analysis/CostModel/AArch64/vector-select.ll +++ b/llvm/test/Analysis/CostModel/AArch64/vector-select.ll @@ -3,7 +3,7 @@ ; COST-LABEL: v8i8_select_eq ; COST-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %cmp.1 = icmp eq <8 x i8> %a, %b -; COST-NEXT: Cost Model: Found an estimated cost of 29 for instruction: %s.1 = select <8 x i1> %cmp.1, <8 x i8> %a, <8 x i8> %c +; COST-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s.1 = select <8 x i1> %cmp.1, <8 x i8> %a, <8 x i8> %c ; CODE-LABEL: v8i8_select_eq ; CODE: bb.0 @@ -19,7 +19,7 @@ ; COST-LABEL: v16i8_select_sgt ; COST-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %cmp.1 = icmp sgt <16 x i8> %a, %b -; COST-NEXT: Cost Model: Found an estimated cost of 61 for instruction: %s.1 = select <16 x i1> %cmp.1, <16 x i8> %a, <16 x i8> %c +; COST-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s.1 = select <16 x i1> %cmp.1, <16 x i8> %a, <16 x i8> %c ; CODE-LABEL: v16i8_select_sgt ; CODE: bb.0 @@ -35,7 +35,7 @@ ; COST-LABEL: v4i16_select_ne ; COST-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %cmp.1 = icmp ne <4 x i16> %a, %b -; COST-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %s.1 = select <4 x i1> %cmp.1, <4 x i16> %a, <4 x i16> %c +; COST-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s.1 = select <4 x i1> %cmp.1, <4 x i16> %a, <4 x i16> %c ; CODE-LABEL: v4i16_select_ne ; CODE: bb.0 @@ -52,7 +52,7 @@ ; COST-LABEL: v8i16_select_ugt ; COST-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %cmp.1 = icmp ugt <8 x i16> %a, %b -; COST-NEXT: Cost Model: Found an estimated cost of 29 for instruction: %s.1 = select <8 x i1> %cmp.1, <8 x i16> %a, <8 x i16> %c +; COST-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s.1 = select <8 x i1> %cmp.1, <8 x i16> %a, <8 x i16> %c ; CODE-LABEL: v8i16_select_ugt ; CODE: bb.0 @@ -68,7 +68,7 @@ ; COST-LABEL: v2i32_select_ule ; COST-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %cmp.1 = icmp ule <2 x i32> %a, %b -; COST-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %s.1 = select <2 x i1> %cmp.1, <2 x i32> %a, <2 x i32> %c +; COST-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s.1 = select <2 x i1> %cmp.1, <2 x i32> %a, <2 x i32> %c ; CODE-LABEL: v2i32_select_ule ; CODE: bb.0 @@ -84,7 +84,7 @@ ; COST-LABEL: v4i32_select_ult ; COST-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %cmp.1 = icmp ult <4 x i32> %a, %b -; COST-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %s.1 = select <4 x i1> %cmp.1, <4 x i32> %a, <4 x i32> %c +; COST-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s.1 = select <4 x i1> %cmp.1, <4 x i32> %a, <4 x i32> %c ; CODE-LABEL: v4i32_select_ult ; CODE: bb.0 @@ -100,7 +100,7 @@ ; COST-LABEL: v2i64_select_sle ; COST-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %cmp.1 = icmp sle <2 x i64> %a, %b -; COST-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %s.1 = select <2 x i1> %cmp.1, <2 x i64> %a, <2 x i64> %c +; COST-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s.1 = select <2 x i1> %cmp.1, <2 x i64> %a, <2 x i64> %c ; CODE-LABEL: v2i64_select_sle ; CODE: bb.0 @@ -116,7 +116,7 @@ ; COST-LABEL: v3i64_select_sle ; COST-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %cmp.1 = icmp sle <3 x i64> %a, %b -; COST-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %s.1 = select <3 x i1> %cmp.1, <3 x i64> %a, <3 x i64> %c +; COST-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %s.1 = select <3 x i1> %cmp.1, <3 x i64> %a, <3 x i64> %c ; CODE-LABEL: v3i64_select_sle ; CODE: bb.0