Index: llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
===================================================================
--- llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
+++ llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
@@ -17,6 +17,8 @@
   CalleeSaveStackSlotSize = 8;
   IsLittleEndian = false;
 
+  MaxInstLength = 6;
+
   CommentString = "#";
   ZeroDirective = "\t.space\t";
   Data64bitsDirective = "\t.quad\t";
Index: llvm/test/CodeGen/SystemZ/Large/branch-range-13.py
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/SystemZ/Large/branch-range-13.py
@@ -0,0 +1,41 @@
+# Test that inline assembly get the right size value so that a branch across
+# a block containing them gets relaxed.
+
+# RUN: python %s | llc -mtriple=s390x-linux-gnu -mcpu=z196 -enable-post-misched=false \
+# RUN:    | FileCheck %s
+
+# Construct:
+#
+# entry:
+#   branch to block
+#
+# block:
+#   sequence of call asm
+#   unconditional branch to block
+#
+# exit:
+#   ret void
+
+# CHECK-LABEL: f1
+# CHECK: jg
+# CHECK-NEXT: .Lfunc_end0:
+
+from __future__ import print_function
+
+num = 11000
+
+print('define void @f1() {')
+print('entry:')
+print('  br label %block')
+print('')
+print('block:')
+
+for i in range(num):
+    print('  tail call i64 asm "lang\\09$0,$2,$1\\0A", "=d,=*Q,d,*Q"(i32* undef, i32 undef, i32* undef)')
+
+print('  br label %block')
+
+print('')
+print('exit:')
+print('  ret void')
+print('}')