diff --git a/llvm/include/llvm/MC/MCStreamer.h b/llvm/include/llvm/MC/MCStreamer.h --- a/llvm/include/llvm/MC/MCStreamer.h +++ b/llvm/include/llvm/MC/MCStreamer.h @@ -443,6 +443,8 @@ /// so we can sort on them later. void AssignFragment(MCSymbol *Symbol, MCFragment *Fragment); + virtual StringRef getMnemonic(MCInst &MI) { return ""; } + /// Emit a label for \p Symbol into the current section. /// /// This corresponds to an assembler statement such as: diff --git a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp --- a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp +++ b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp @@ -1135,11 +1135,10 @@ int NumInstsInFunction = 0; bool CanDoExtraAnalysis = ORE->allowExtraAnalysis(DEBUG_TYPE); - const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo(); for (auto &MBB : *MF) { // Print a label for the basic block. emitBasicBlockStart(MBB); - DenseMap OpcodeCounts; + DenseMap> OpcodeCounts; for (auto &MI : MBB) { // Print the assembly for the instruction. if (!MI.isPosition() && !MI.isImplicitDef() && !MI.isKill() && @@ -1206,8 +1205,8 @@ default: emitInstruction(&MI); if (CanDoExtraAnalysis) { - auto I = OpcodeCounts.insert({MI.getOpcode(), 0u}); - I.first->second++; + auto I = OpcodeCounts.insert({MI.getOpcode(), {&MI, 0u}}); + I.first->second.second++; } break; } @@ -1265,8 +1264,11 @@ // names, then sort them in descending order by count and name. SmallVector, 128> OpcodeCountsVec; for (auto &KV : OpcodeCounts) { - auto Name = (Twine("INST_") + TII->getName(KV.first)).str(); - OpcodeCountsVec.emplace_back(Name, KV.second); + MCInst MCI; + auto *MI = KV.second.first; + MCI.setOpcode(MI->getOpcode()); + auto Name = (Twine("INST_") + OutStreamer->getMnemonic(MCI)).str(); + OpcodeCountsVec.emplace_back(StringRef(Name).trim(), KV.second.second); } sort(OpcodeCountsVec, [](const std::pair &A, const std::pair &B) { diff --git a/llvm/lib/MC/MCAsmStreamer.cpp b/llvm/lib/MC/MCAsmStreamer.cpp --- a/llvm/lib/MC/MCAsmStreamer.cpp +++ b/llvm/lib/MC/MCAsmStreamer.cpp @@ -144,6 +144,11 @@ const MCSymbol *Aliasee) override; void emitLOHDirective(MCLOHType Kind, const MCLOHArgs &Args) override; + + StringRef getMnemonic(MCInst &MI) override { + return InstPrinter->getMnemonic(&MI).first; + } + void emitLabel(MCSymbol *Symbol, SMLoc Loc = SMLoc()) override; void emitAssemblerFlag(MCAssemblerFlag Flag) override; diff --git a/llvm/test/CodeGen/AArch64/arm64-instruction-mix-remarks.ll b/llvm/test/CodeGen/AArch64/arm64-instruction-mix-remarks.ll --- a/llvm/test/CodeGen/AArch64/arm64-instruction-mix-remarks.ll +++ b/llvm/test/CodeGen/AArch64/arm64-instruction-mix-remarks.ll @@ -11,11 +11,11 @@ ; YAML-NEXT: DebugLoc: { File: arm64-instruction-mix-remarks.ll, Line: 10, Column: 10 } ; YAML-NEXT: Function: foo ; YAML-NEXT: Args: -; YAML: - BasicBlock: entry -; YAML: - INST_ADDWrs: '1' -; YAML: - INST_Bcc: '1' -; YAML: - INST_LDRWui: '1' -; YAML: - INST_SUBSWri: '1' +; YAML: - BasicBlock: entry +; YAML: - INST_add: '1' +; YAML: - INST_b.: '1' +; YAML: - INST_ldr: '1' +; YAML: - INST_subs: '1' ; CHECK-LABEL: %then @@ -26,9 +26,9 @@ ; YAML-NEXT: DebugLoc: { File: arm64-instruction-mix-remarks.ll, Line: 20, Column: 20 } ; YAML-NEXT: Function: foo ; YAML-NEXT: Args: -; YAML: - BasicBlock: then -; YAML: - INST_ORRWrs: '1' -; YAML: - INST_RET: '1' +; YAML: - BasicBlock: then +; YAML: - INST_orr: '1' +; YAML: - INST_ret: '1' ; CHECK-LABEL: %else ; CHECK-NEXT: mul w8, w8, w1 @@ -42,11 +42,11 @@ ; YAML-NEXT: DebugLoc: { File: arm64-instruction-mix-remarks.ll, Line: 30, Column: 30 } ; YAML-NEXT: Function: foo ; YAML-NEXT: Args: -; YAML: - BasicBlock: else -; YAML: - INST_MADDWrrr: '2' -; YAML: - INST_ORRWrs: '1' -; YAML: - INST_RET: '1' -; YAML: - INST_STRWui: '1' +; YAML: - BasicBlock: else +; YAML: - INST_madd: '2' +; YAML: - INST_orr: '1' +; YAML: - INST_ret: '1' +; YAML: - INST_str: '1' define i32 @foo(i32* %ptr, i32 %x) !dbg !3 { entry: %l = load i32, i32* %ptr, !dbg !4