diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.h b/llvm/lib/Target/ARM/ARMBaseInstrInfo.h --- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.h +++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.h @@ -181,8 +181,6 @@ // Load, scaled register offset, not plus LSL2 bool isLdstScaledRegNotPlusLsl2(const MachineInstr &MI, unsigned Op) const; - // Minus reg for ldstso addr mode - bool isLdstSoMinusReg(const MachineInstr &MI, unsigned Op) const; // Scaled register offset in address mode 2 bool isAm2ScaledReg(const MachineInstr &MI, unsigned Op) const; diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp --- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -634,13 +634,6 @@ return !SimpleScaled; } -// Minus reg for ldstso addr mode -bool ARMBaseInstrInfo::isLdstSoMinusReg(const MachineInstr &MI, - unsigned Op) const { - unsigned OffImm = MI.getOperand(Op + 2).getImm(); - return ARM_AM::getAM2Op(OffImm) == ARM_AM::sub; -} - // Load, scaled register offset bool ARMBaseInstrInfo::isAm2ScaledReg(const MachineInstr &MI, unsigned Op) const { diff --git a/llvm/lib/Target/ARM/ARMSchedule.td b/llvm/lib/Target/ARM/ARMSchedule.td --- a/llvm/lib/Target/ARM/ARMSchedule.td +++ b/llvm/lib/Target/ARM/ARMSchedule.td @@ -168,6 +168,10 @@ def CheckExtNoShift : CheckImmOperand_s<4, "ARM_AM::no_shift">; } +let FunctionMapper = "ARM_AM::getAM2Op" in { + class CheckAM2OpSub : CheckImmOperand_s {} +} + def IsLDMBaseRegInList : CheckFunctionPredicate< "ARM_MC::isLDMBaseRegInList", "ARM_MC::isLDMBaseRegInList" >; diff --git a/llvm/lib/Target/ARM/ARMScheduleA57.td b/llvm/lib/Target/ARM/ARMScheduleA57.td --- a/llvm/lib/Target/ARM/ARMScheduleA57.td +++ b/llvm/lib/Target/ARM/ARMScheduleA57.td @@ -51,12 +51,9 @@ def IsLdstsoScaledPredX2 : MCSchedPredicate>; -def IsLdstsoMinusRegPredX0 : - SchedPredicate<[{TII->isLdstSoMinusReg(*MI, 0)}]>; -def IsLdstsoMinusRegPred : - SchedPredicate<[{TII->isLdstSoMinusReg(*MI, 1)}]>; -def IsLdstsoMinusRegPredX2 : - SchedPredicate<[{TII->isLdstSoMinusReg(*MI, 2)}]>; +def IsLdstsoMinusRegPredX0 : MCSchedPredicate>; +def IsLdstsoMinusRegPred : MCSchedPredicate>; +def IsLdstsoMinusRegPredX2 : MCSchedPredicate>; // Load, scaled register offset def IsLdrAm2ScaledPred : diff --git a/llvm/test/tools/llvm-mca/ARM/cortex-a57-memory-instructions.s b/llvm/test/tools/llvm-mca/ARM/cortex-a57-memory-instructions.s --- a/llvm/test/tools/llvm-mca/ARM/cortex-a57-memory-instructions.s +++ b/llvm/test/tools/llvm-mca/ARM/cortex-a57-memory-instructions.s @@ -175,13 +175,13 @@ # CHECK-NEXT: 2 4 1.00 * ldr r1, [r2], #30 # CHECK-NEXT: 2 4 1.00 * ldr r3, [r1], #-30 # CHECK-NEXT: 1 4 1.00 * ldr r3, [r8, r1] -# CHECK-NEXT: 1 4 1.00 * ldr r2, [r5, -r3] +# CHECK-NEXT: 2 5 1.00 * ldr r2, [r5, -r3] # CHECK-NEXT: 2 4 1.00 * ldr r1, [r5, r9]! # CHECK-NEXT: 2 4 1.00 * ldr r6, [r7, -r8]! # CHECK-NEXT: 2 4 1.00 * ldr r1, [r0, r2, lsr #3]! # CHECK-NEXT: 2 4 1.00 * ldr r5, [r9], r2 # CHECK-NEXT: 2 4 1.00 * ldr r4, [r3], -r6 -# CHECK-NEXT: 1 4 1.00 * ldr r3, [r8, -r2, lsl #15] +# CHECK-NEXT: 2 5 1.00 * ldr r3, [r8, -r2, lsl #15] # CHECK-NEXT: 2 4 1.00 * ldr r1, [r5], r3, asr #15 # CHECK-NEXT: 1 4 1.00 * ldrb r3, [r8] # CHECK-NEXT: 1 4 1.00 * ldrb r1, [sp, #63] @@ -189,12 +189,12 @@ # CHECK-NEXT: 2 4 1.00 * ldrb r8, [r1], #22 # CHECK-NEXT: 2 4 1.00 * ldrb r2, [r7], #-19 # CHECK-NEXT: 1 4 1.00 * ldrb r9, [r8, r5] -# CHECK-NEXT: 1 4 1.00 * ldrb r1, [r5, -r1] +# CHECK-NEXT: 2 5 1.00 * ldrb r1, [r5, -r1] # CHECK-NEXT: 2 4 1.00 * ldrb r3, [r5, r2]! # CHECK-NEXT: 2 4 1.00 * ldrb r6, [r9, -r3]! # CHECK-NEXT: 2 4 1.00 * ldrb r2, [r1], r4 # CHECK-NEXT: 2 4 1.00 * ldrb r8, [r4], -r5 -# CHECK-NEXT: 1 4 1.00 * ldrb r7, [r12, -r1, lsl #15] +# CHECK-NEXT: 2 5 1.00 * ldrb r7, [r12, -r1, lsl #15] # CHECK-NEXT: 2 4 1.00 * ldrb r5, [r2], r9, asr #15 # CHECK-NEXT: 2 4 1.00 * ldrbt r3, [r1], #4 # CHECK-NEXT: 2 4 1.00 * ldrbt r2, [r8], #-8 @@ -271,13 +271,13 @@ # CHECK-NEXT: 2 1 1.00 * str r9, [sp], #4095 # CHECK-NEXT: 2 1 1.00 * str r1, [r7], #-128 # CHECK-NEXT: 1 1 1.00 * str r9, [r6, r3] -# CHECK-NEXT: 1 1 1.00 * str r8, [r0, -r2] +# CHECK-NEXT: 2 3 1.00 * str r8, [r0, -r2] # CHECK-NEXT: 2 1 1.00 * str r7, [r1, r6]! # CHECK-NEXT: 2 2 1.00 * str r7, [r1, r6, lsl #2]! -# CHECK-NEXT: 2 1 1.00 * str r6, [sp, -r1]! +# CHECK-NEXT: 2 3 1.00 * str r6, [sp, -r1]! # CHECK-NEXT: 2 2 1.00 * str r5, [r3], r9 # CHECK-NEXT: 2 2 1.00 * str r4, [r2], -r5 -# CHECK-NEXT: 1 1 1.00 * str r3, [r4, -r2, lsl #2] +# CHECK-NEXT: 2 3 1.00 * str r3, [r4, -r2, lsl #2] # CHECK-NEXT: 2 2 1.00 * str r2, [r7], r3, asr #24 # CHECK-NEXT: 1 1 1.00 * strb r9, [r2] # CHECK-NEXT: 1 1 1.00 * strb r7, [r1, #3] @@ -285,12 +285,12 @@ # CHECK-NEXT: 2 1 1.00 * strb r5, [r7], #72 # CHECK-NEXT: 2 1 1.00 * strb r1, [sp], #-1 # CHECK-NEXT: 1 1 1.00 * strb r1, [r2, r9] -# CHECK-NEXT: 1 1 1.00 * strb r2, [r3, -r8] +# CHECK-NEXT: 2 3 1.00 * strb r2, [r3, -r8] # CHECK-NEXT: 2 1 1.00 * strb r3, [r4, r7]! -# CHECK-NEXT: 2 1 1.00 * strb r4, [r5, -r6]! +# CHECK-NEXT: 2 3 1.00 * strb r4, [r5, -r6]! # CHECK-NEXT: 2 2 1.00 * strb r5, [r6], r5 # CHECK-NEXT: 2 2 1.00 * strb r6, [r2], -r4 -# CHECK-NEXT: 1 1 1.00 * strb r7, [r12, -r3, lsl #5] +# CHECK-NEXT: 2 3 1.00 * strb r7, [r12, -r3, lsl #5] # CHECK-NEXT: 2 2 1.00 * strb sp, [r7], r2, asr #12 # CHECK-NEXT: 2 1 1.00 U strbt r6, [r2], #12 # CHECK-NEXT: 2 1 1.00 U strbt r5, [r6], #-13 @@ -335,7 +335,7 @@ # CHECK: Resource pressure per iteration: # CHECK-NEXT: [0] [1.0] [1.1] [2] [3] [4] [5] [6] -# CHECK-NEXT: - 65.00 65.00 167.00 9.00 57.00 - - +# CHECK-NEXT: - 69.00 69.00 167.00 9.00 57.00 - - # CHECK: Resource pressure by instruction: # CHECK-NEXT: [0] [1.0] [1.1] [2] [3] [4] [5] [6] Instructions: @@ -347,13 +347,13 @@ # CHECK-NEXT: - 0.50 0.50 1.00 - - - - ldr r1, [r2], #30 # CHECK-NEXT: - 0.50 0.50 1.00 - - - - ldr r3, [r1], #-30 # CHECK-NEXT: - - - 1.00 - - - - ldr r3, [r8, r1] -# CHECK-NEXT: - - - 1.00 - - - - ldr r2, [r5, -r3] +# CHECK-NEXT: - 0.50 0.50 1.00 - - - - ldr r2, [r5, -r3] # CHECK-NEXT: - 0.50 0.50 1.00 - - - - ldr r1, [r5, r9]! # CHECK-NEXT: - 0.50 0.50 1.00 - - - - ldr r6, [r7, -r8]! # CHECK-NEXT: - 0.50 0.50 1.00 - - - - ldr r1, [r0, r2, lsr #3]! # CHECK-NEXT: - 0.50 0.50 1.00 - - - - ldr r5, [r9], r2 # CHECK-NEXT: - 0.50 0.50 1.00 - - - - ldr r4, [r3], -r6 -# CHECK-NEXT: - - - 1.00 - - - - ldr r3, [r8, -r2, lsl #15] +# CHECK-NEXT: - 0.50 0.50 1.00 - - - - ldr r3, [r8, -r2, lsl #15] # CHECK-NEXT: - 0.50 0.50 1.00 - - - - ldr r1, [r5], r3, asr #15 # CHECK-NEXT: - - - 1.00 - - - - ldrb r3, [r8] # CHECK-NEXT: - - - 1.00 - - - - ldrb r1, [sp, #63] @@ -361,12 +361,12 @@ # CHECK-NEXT: - 0.50 0.50 1.00 - - - - ldrb r8, [r1], #22 # CHECK-NEXT: - 0.50 0.50 1.00 - - - - ldrb r2, [r7], #-19 # CHECK-NEXT: - - - 1.00 - - - - ldrb r9, [r8, r5] -# CHECK-NEXT: - - - 1.00 - - - - ldrb r1, [r5, -r1] +# CHECK-NEXT: - 0.50 0.50 1.00 - - - - ldrb r1, [r5, -r1] # CHECK-NEXT: - 0.50 0.50 1.00 - - - - ldrb r3, [r5, r2]! # CHECK-NEXT: - 0.50 0.50 1.00 - - - - ldrb r6, [r9, -r3]! # CHECK-NEXT: - 0.50 0.50 1.00 - - - - ldrb r2, [r1], r4 # CHECK-NEXT: - 0.50 0.50 1.00 - - - - ldrb r8, [r4], -r5 -# CHECK-NEXT: - - - 1.00 - - - - ldrb r7, [r12, -r1, lsl #15] +# CHECK-NEXT: - 0.50 0.50 1.00 - - - - ldrb r7, [r12, -r1, lsl #15] # CHECK-NEXT: - 0.50 0.50 1.00 - - - - ldrb r5, [r2], r9, asr #15 # CHECK-NEXT: - 0.50 0.50 1.00 - - - - ldrbt r3, [r1], #4 # CHECK-NEXT: - 0.50 0.50 1.00 - - - - ldrbt r2, [r8], #-8 @@ -443,13 +443,13 @@ # CHECK-NEXT: - 0.50 0.50 - - 1.00 - - str r9, [sp], #4095 # CHECK-NEXT: - 0.50 0.50 - - 1.00 - - str r1, [r7], #-128 # CHECK-NEXT: - - - - - 1.00 - - str r9, [r6, r3] -# CHECK-NEXT: - - - - - 1.00 - - str r8, [r0, -r2] +# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - str r8, [r0, -r2] # CHECK-NEXT: - 0.50 0.50 - - 1.00 - - str r7, [r1, r6]! # CHECK-NEXT: - - - - 1.00 1.00 - - str r7, [r1, r6, lsl #2]! # CHECK-NEXT: - 0.50 0.50 - - 1.00 - - str r6, [sp, -r1]! # CHECK-NEXT: - - - - 1.00 1.00 - - str r5, [r3], r9 # CHECK-NEXT: - - - - 1.00 1.00 - - str r4, [r2], -r5 -# CHECK-NEXT: - - - - - 1.00 - - str r3, [r4, -r2, lsl #2] +# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - str r3, [r4, -r2, lsl #2] # CHECK-NEXT: - - - - 1.00 1.00 - - str r2, [r7], r3, asr #24 # CHECK-NEXT: - - - - - 1.00 - - strb r9, [r2] # CHECK-NEXT: - - - - - 1.00 - - strb r7, [r1, #3] @@ -457,12 +457,12 @@ # CHECK-NEXT: - 0.50 0.50 - - 1.00 - - strb r5, [r7], #72 # CHECK-NEXT: - 0.50 0.50 - - 1.00 - - strb r1, [sp], #-1 # CHECK-NEXT: - - - - - 1.00 - - strb r1, [r2, r9] -# CHECK-NEXT: - - - - - 1.00 - - strb r2, [r3, -r8] +# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - strb r2, [r3, -r8] # CHECK-NEXT: - 0.50 0.50 - - 1.00 - - strb r3, [r4, r7]! # CHECK-NEXT: - 0.50 0.50 - - 1.00 - - strb r4, [r5, -r6]! # CHECK-NEXT: - - - - 1.00 1.00 - - strb r5, [r6], r5 # CHECK-NEXT: - - - - 1.00 1.00 - - strb r6, [r2], -r4 -# CHECK-NEXT: - - - - - 1.00 - - strb r7, [r12, -r3, lsl #5] +# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - strb r7, [r12, -r3, lsl #5] # CHECK-NEXT: - - - - 1.00 1.00 - - strb sp, [r7], r2, asr #12 # CHECK-NEXT: - 0.50 0.50 - - 1.00 - - strbt r6, [r2], #12 # CHECK-NEXT: - 0.50 0.50 - - 1.00 - - strbt r5, [r6], #-13