Index: lib/CodeGen/MachineLICM.cpp
===================================================================
--- lib/CodeGen/MachineLICM.cpp
+++ lib/CodeGen/MachineLICM.cpp
@@ -251,11 +251,6 @@
     /// if there is little to no overhead moving instructions into loops.
     void SinkIntoLoop();
 
-    /// getRegisterClassIDAndCost - For a given register return the ID and cost
-    /// of its representative register class by reference.
-    void getRegisterClassIDAndCost(unsigned Reg, unsigned &RCId,
-                                   unsigned &RCCost) const;
-
     /// InitRegPressure - Find all virtual register references that are liveout
     /// of the preheader to initialize the starting "register pressure". Note
     /// this does not count live through (livein but not used) registers.
@@ -360,13 +355,12 @@
 
   if (PreRegAlloc) {
     // Estimate register pressure during pre-regalloc pass.
-    unsigned NumRC = TRI->getNumRegClasses();
+    unsigned NumRC = TRI->getNumRegPressureSets();
     RegPressure.resize(NumRC);
     std::fill(RegPressure.begin(), RegPressure.end(), 0);
     RegLimit.resize(NumRC);
-    for (TargetRegisterInfo::regclass_iterator I = TRI->regclass_begin(),
-           E = TRI->regclass_end(); I != E; ++I)
-      RegLimit[(*I)->getID()] = TRI->getRegPressureLimit(*I, MF);
+    for (unsigned i = 0, e = NumRC; i != e; ++i)
+      RegLimit[i] = TRI->getRegPressureSetLimit(MF, i);
   }
 
   // Get our Loop information...
@@ -842,19 +836,6 @@
   return MO.isKill() || MRI->hasOneNonDBGUse(MO.getReg());
 }
 
-void MachineLICM::getRegisterClassIDAndCost(unsigned Reg, unsigned &RCId,
-                                            unsigned &RCCost) const {
-  const TargetRegisterClass *RC = MRI->getRegClass(Reg);
-  MVT VT = *RC->vt_begin();
-  if (VT == MVT::Untyped) {
-    RCId = RC->getID();
-    RCCost = 1;
-  } else {
-    RCId = TLI->getRepRegClassFor(VT)->getID();
-    RCCost = TLI->getRepRegClassCostFor(VT);
-  }
-}
-
 /// InitRegPressure - Find all virtual register references that are liveout of
 /// the preheader to initialize the starting "register pressure". Note this
 /// does not count live through (livein but not used) registers.
@@ -906,20 +887,26 @@
 
     // FIXME: It seems bad to use RegSeen only for some of these calculations.
     bool isNew = ConsiderSeen ? RegSeen.insert(Reg).second : false;
-    unsigned RCId, RCCost;
-    getRegisterClassIDAndCost(Reg, RCId, RCCost);
-    int PriorCost = 0;
-    if (Cost.find(RCId) != Cost.end())
-      PriorCost = Cost[RCId];
+    const TargetRegisterClass *RC = MRI->getRegClass(Reg);
+
+    RegClassWeight W = TRI->getRegClassWeight(RC);
+    int RCCost = 0;
     if (MO.isDef())
-      Cost[RCId] = PriorCost + RCCost;
+      RCCost = W.RegWeight;
     else {
       bool isKill = isOperandKill(MO, MRI);
       if (isNew && !isKill && ConsiderUnseenAsDef)
         // Haven't seen this, it must be a livein.
-        Cost[RCId] = PriorCost + RCCost;
+        RCCost = W.RegWeight;
       else if (!isNew && isKill)
-        Cost[RCId] = PriorCost - RCCost;
+        RCCost = -W.RegWeight;
+    }
+    const int *PS = TRI->getRegClassPressureSets(RC);
+    for (; *PS != -1; ++PS) {
+      if (Cost.find(*PS) != Cost.end())
+        Cost[*PS] = RCCost;
+      else
+        Cost[*PS] += RCCost;
     }
   }
   return Cost;