Index: llvm/lib/CodeGen/PrologEpilogInserter.cpp =================================================================== --- llvm/lib/CodeGen/PrologEpilogInserter.cpp +++ llvm/lib/CodeGen/PrologEpilogInserter.cpp @@ -1077,7 +1077,26 @@ // If the frame pointer is eliminated, all frame offsets will be relative to // SP not FP. Align to MaxAlign so this works. StackAlign = std::max(StackAlign, MaxAlign); + int64_t OffsetBeforeAlignment = Offset; Offset = alignTo(Offset, StackAlign, Skew); + + // If we have increased the offset to fulfill the alignment constrants, + // then the scavenging spill slots may become harder to reach from the + // stack pointer, float them so they stay close. + if (OffsetBeforeAlignment != Offset && RS && !EarlyScavengingSlots) { + SmallVector SFIs; + RS->getScavengingFrameIndices(SFIs); + LLVM_DEBUG(if (!SFIs.empty()) llvm::dbgs() + << "Adjusting emergency spill slots!\n";); + int64_t Delta = Offset - OffsetBeforeAlignment; + for (SmallVectorImpl::iterator I = SFIs.begin(), IE = SFIs.end(); + I != IE; ++I) { + LLVM_DEBUG(llvm::dbgs() << "Adjusting offset of emergency spill slot #" + << *I << " from " << MFI.getObjectOffset(*I);); + MFI.setObjectOffset(*I, MFI.getObjectOffset(*I) - Delta); + LLVM_DEBUG(llvm::dbgs() << " to " << MFI.getObjectOffset(*I) << "\n";); + } + } } // Update frame info to pretend that this is part of the stack... Index: llvm/test/CodeGen/AArch64/framelayout-scavengingslot.mir =================================================================== --- llvm/test/CodeGen/AArch64/framelayout-scavengingslot.mir +++ llvm/test/CodeGen/AArch64/framelayout-scavengingslot.mir @@ -5,10 +5,10 @@ name: LateScavengingSlotRealignment # CHECK-LABEL: name: LateScavengingSlotRealignment # CHECK: bb.0: -# CHECK: STRXui killed $[[SCRATCH:x[0-9]+]], $sp, 3 +# CHECK: STRXui killed $[[SCRATCH:x[0-9]+]], $sp, 0 # CHECK-NEXT: $[[SCRATCH]] = ADDXri $sp, 40, 0 # CHECK-NEXT: STRXui $x0, killed $[[SCRATCH]], 4095 -# CHECK-NEXT: $[[SCRATCH]] = LDRXui $sp, 3 +# CHECK-NEXT: $[[SCRATCH]] = LDRXui $sp, 0 # CHECK: bb.1: tracksRegLiveness: true frameInfo: Index: llvm/test/CodeGen/AArch64/framelayout-sve-scavengingslot.mir =================================================================== --- llvm/test/CodeGen/AArch64/framelayout-sve-scavengingslot.mir +++ llvm/test/CodeGen/AArch64/framelayout-sve-scavengingslot.mir @@ -7,7 +7,7 @@ # CHECK: $sp = frame-setup ADDVL_XXI $sp, -1 # CHECK-NEXT: $sp = frame-setup SUBXri $sp, 8, 12 # CHECK-NEXT: $sp = frame-setup SUBXri $sp, 16, 0 -# CHECK: STRXui killed $[[SCRATCH:x[0-9]+]], $sp, 1 +# CHECK: STRXui killed $[[SCRATCH:x[0-9]+]], $sp, 0 # CHECK-NEXT: $[[SCRATCH]] = ADDVL_XXI $fp, -1 # CHECK-NEXT: STRXui $x0, killed $[[SCRATCH]], 0 # CHECK: bb.1: Index: llvm/test/CodeGen/AArch64/swiftself-scavenger.ll =================================================================== --- llvm/test/CodeGen/AArch64/swiftself-scavenger.ll +++ llvm/test/CodeGen/AArch64/swiftself-scavenger.ll @@ -2,10 +2,10 @@ ; Check that we reserve an emergency spill slot, even if we added an extra ; CSR spill for the values used by the swiftself parameter. ; CHECK-LABEL: func: -; CHECK: str [[REG:x[0-9]+]], [sp, #8] +; CHECK: str [[REG:x[0-9]+]], [sp] ; CHECK: add [[REG]], sp, #248 ; CHECK: str xzr, [{{\s*}}[[REG]], #32760] -; CHECK: ldr [[REG]], [sp, #8] +; CHECK: ldr [[REG]], [sp] target triple = "arm64-apple-ios" @ptr8 = external global i8* Index: llvm/test/CodeGen/AMDGPU/pei-scavenge-vgpr-spill.mir =================================================================== --- llvm/test/CodeGen/AMDGPU/pei-scavenge-vgpr-spill.mir +++ llvm/test/CodeGen/AMDGPU/pei-scavenge-vgpr-spill.mir @@ -28,16 +28,14 @@ ; GFX8: $sgpr4 = frame-setup S_ADD_U32 $sgpr32, 524224, implicit-def $scc ; GFX8: $sgpr33 = frame-setup S_AND_B32 killed $sgpr4, 4294443008, implicit-def $scc ; GFX8: $sgpr32 = frame-setup S_ADD_U32 $sgpr32, 1572864, implicit-def $scc - ; GFX8: $sgpr4 = S_ADD_U32 $sgpr33, 524544, implicit-def $scc - ; GFX8: BUFFER_STORE_DWORD_OFFSET killed $vgpr3, $sgpr0_sgpr1_sgpr2_sgpr3, killed $sgpr4, 0, 0, 0, 0, 0, 0, implicit $exec :: (store 4 into %stack.3, addrspace 5) + ; GFX8: BUFFER_STORE_DWORD_OFFSET killed $vgpr3, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr33, 12, 0, 0, 0, 0, 0, implicit $exec :: (store 4 into %stack.3, addrspace 5) ; GFX8: $vgpr3 = V_LSHRREV_B32_e64 6, $sgpr33, implicit $exec ; GFX8: $vcc_lo = S_MOV_B32 8192 ; GFX8: $vgpr3, dead $vcc = V_ADD_CO_U32_e64 killed $vcc_lo, killed $vgpr3, 0, implicit $exec ; GFX8: $vgpr0 = V_OR_B32_e32 killed $vgpr3, $vgpr1, implicit $exec ; GFX8: $sgpr32 = frame-destroy S_SUB_U32 $sgpr32, 1572864, implicit-def $scc ; GFX8: $sgpr33 = V_READLANE_B32_vi $vgpr2, 0 - ; GFX8: $sgpr4 = S_ADD_U32 $sgpr33, 524544, implicit-def $scc - ; GFX8: $vgpr3 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, killed $sgpr4, 0, 0, 0, 0, 0, 0, implicit $exec :: (load 4 from %stack.3, addrspace 5) + ; GFX8: $vgpr3 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr33, 12, 0, 0, 0, 0, 0, implicit $exec :: (load 4 from %stack.3, addrspace 5) ; GFX8: S_ENDPGM 0, csr_amdgpu_allvgprs ; GFX9-LABEL: name: pei_scavenge_vgpr_spill ; GFX9: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255, $vgpr2 @@ -45,15 +43,13 @@ ; GFX9: $sgpr4 = frame-setup S_ADD_U32 $sgpr32, 524224, implicit-def $scc ; GFX9: $sgpr33 = frame-setup S_AND_B32 killed $sgpr4, 4294443008, implicit-def $scc ; GFX9: $sgpr32 = frame-setup S_ADD_U32 $sgpr32, 1572864, implicit-def $scc - ; GFX9: $sgpr4 = S_ADD_U32 $sgpr33, 524544, implicit-def $scc - ; GFX9: BUFFER_STORE_DWORD_OFFSET killed $vgpr3, $sgpr0_sgpr1_sgpr2_sgpr3, killed $sgpr4, 0, 0, 0, 0, 0, 0, implicit $exec :: (store 4 into %stack.3, addrspace 5) + ; GFX9: BUFFER_STORE_DWORD_OFFSET killed $vgpr3, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr33, 12, 0, 0, 0, 0, 0, implicit $exec :: (store 4 into %stack.3, addrspace 5) ; GFX9: $vgpr3 = V_LSHRREV_B32_e64 6, $sgpr33, implicit $exec ; GFX9: $vgpr3 = V_ADD_U32_e32 8192, killed $vgpr3, implicit $exec ; GFX9: $vgpr0 = V_OR_B32_e32 killed $vgpr3, $vgpr1, implicit $exec ; GFX9: $sgpr32 = frame-destroy S_SUB_U32 $sgpr32, 1572864, implicit-def $scc ; GFX9: $sgpr33 = V_READLANE_B32_vi $vgpr2, 0 - ; GFX9: $sgpr4 = S_ADD_U32 $sgpr33, 524544, implicit-def $scc - ; GFX9: $vgpr3 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, killed $sgpr4, 0, 0, 0, 0, 0, 0, implicit $exec :: (load 4 from %stack.3, addrspace 5) + ; GFX9: $vgpr3 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr33, 12, 0, 0, 0, 0, 0, implicit $exec :: (load 4 from %stack.3, addrspace 5) ; GFX9: S_ENDPGM 0, csr_amdgpu_allvgprs $vgpr0 = V_OR_B32_e32 %stack.1, $vgpr1, implicit $exec S_ENDPGM 0, csr_amdgpu_allvgprs Index: llvm/test/CodeGen/RISCV/out-of-reach-emergency-slot.mir =================================================================== --- /dev/null +++ llvm/test/CodeGen/RISCV/out-of-reach-emergency-slot.mir @@ -0,0 +1,499 @@ +# RUN: llc -mtriple riscv64 -x mir -start-before=prologepilog -o - \ +# RUN: -simplify-mir -verify-machineinstrs < %s | FileCheck %s + +# CHECK: sd a0, 0(sp) +# CHECK: lui a0, 1 +# CHECK: addiw a0, a0, -16 +# CHECK: add a0, a0, sp +# CHECK: sd a2, 0(a0) +# CHECK: ld a0, 0(sp) + +--- | + ; ModuleID = 't2.ll' + source_filename = "frame_layout-1253b1.cpp" + target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n64-S128" + target triple = "riscv64-unknown-linux-gnu" + + %struct.au = type { i8*, i32 } + + $_Z2axILi4096ELi0ELi204848ELi1ELi1EJiiiiiiiiiiiiiiiiiiiiddddddddddddddddddddEEvDpT4_PcP2aud = comdat any + + ; Function Attrs: argmemonly nounwind willreturn + declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #0 + + ; Function Attrs: nounwind + define weak_odr dso_local void @_Z2axILi4096ELi0ELi204848ELi1ELi1EJiiiiiiiiiiiiiiiiiiiiddddddddddddddddddddEEvDpT4_PcP2aud(i32 signext %0, i32 signext %1, i32 signext %2, i32 signext %3, i32 signext %4, i32 signext %5, i32 signext %6, i32 signext %7, i32 %8, i32 %9, i32 %10, i32 %11, i32 %12, i32 %13, i32 %14, i32 %15, i32 %16, i32 %17, i32 %18, i32 %19, double %20, double %21, double %22, double %23, double %24, double %25, double %26, double %27, double %28, double %29, double %30, double %31, double %32, double %33, double %34, double %35, double %36, double %37, double %38, double %39, i8* %ay, %struct.au* %az, double %40) local_unnamed_addr #1 comdat { + entry: + %ba = alloca double, align 4096 + %41 = bitcast double* %ba to i8* + call void @llvm.lifetime.start.p0i8(i64 8, i8* nonnull %41) #2 + %42 = bitcast %struct.au* %az to double** + store double* %ba, double** %42, align 8, !tbaa !4 + %43 = load i8, i8* %ay, align 1, !tbaa !10 + %conv = zext i8 %43 to i32 + %add30.i = add nuw nsw i32 %conv, 5 + %add33.i = add nuw nsw i32 %add30.i, %conv + %add41.i = add nuw nsw i32 %conv, 20 + %add44.i = add nuw nsw i32 %add41.i, %conv + %44 = zext i8 %43 to i16 + %div.i.lhs.trunc = mul nuw nsw i16 %44, 5 + %45 = zext i8 %43 to i16 + %div.i.rhs.trunc = mul nuw nsw i16 %45, 3 + %div.i171 = udiv i16 %div.i.lhs.trunc, %div.i.rhs.trunc + %46 = zext i8 %43 to i16 + %div2.i.rhs.trunc = add nuw nsw i16 %46, 32 + %div2.i172 = udiv i16 %div.i171, %div2.i.rhs.trunc + %47 = zext i8 %43 to i16 + %div3.i.rhs.trunc = add nuw nsw i16 %47, 29 + %div3.i173 = udiv i16 %div2.i172, %div3.i.rhs.trunc + %48 = zext i8 %43 to i16 + %div4.i.rhs.trunc = add nuw nsw i16 %48, 28 + %div4.i174 = udiv i16 %div3.i173, %div4.i.rhs.trunc + %49 = zext i8 %43 to i16 + %div5.i.rhs.trunc = add nuw nsw i16 %49, 27 + %div5.i175 = udiv i16 %div4.i174, %div5.i.rhs.trunc + %50 = zext i8 %43 to i16 + %div6.i.rhs.trunc = add nuw nsw i16 %50, 6 + %div6.i176 = sdiv i16 %div5.i175, %div6.i.rhs.trunc + %51 = zext i8 %43 to i16 + %div7.i.rhs.trunc = add nuw nsw i16 %51, 25 + %div7.i177 = sdiv i16 %div6.i176, %div7.i.rhs.trunc + %52 = zext i8 %43 to i16 + %div8.i.rhs.trunc = add nuw nsw i16 %52, 24 + %div8.i178 = sdiv i16 %div7.i177, %div8.i.rhs.trunc + %53 = zext i8 %43 to i16 + %div9.i.rhs.trunc = add nuw nsw i16 %53, 2 + %div9.i179 = sdiv i16 %div8.i178, %div9.i.rhs.trunc + %div10.i.rhs.trunc = trunc i32 %add44.i to i16 + %div10.i180 = sdiv i16 %div9.i179, %div10.i.rhs.trunc + %54 = zext i8 %43 to i16 + %div11.i.rhs.trunc = add nuw nsw i16 %54, 9 + %div11.i181 = sdiv i16 %div10.i180, %div11.i.rhs.trunc + %55 = zext i8 %43 to i16 + %div12.i.rhs.trunc = add nuw nsw i16 %55, 8 + %div12.i182 = sdiv i16 %div11.i181, %div12.i.rhs.trunc + %56 = zext i8 %43 to i16 + %div13.i.rhs.trunc = add nuw nsw i16 %56, 7 + %div13.i183 = sdiv i16 %div12.i182, %div13.i.rhs.trunc + %div14.i.rhs.trunc = trunc i32 %add33.i to i16 + %div14.i184 = sdiv i16 %div13.i183, %div14.i.rhs.trunc + %div15.i.lhs.trunc = trunc i16 %div14.i184 to i8 + %div15.i185 = sdiv i8 %div15.i.lhs.trunc, 6 + %div16.i.lhs.trunc = sext i8 %div15.i185 to i16 + %57 = zext i8 %43 to i16 + %div16.i.rhs.trunc = add nuw nsw i16 %57, 4 + %div16.i186 = sdiv i16 %div16.i.lhs.trunc, %div16.i.rhs.trunc + %div17.i.lhs.trunc = trunc i16 %div16.i186 to i8 + %div17.i187 = sdiv i8 %div17.i.lhs.trunc, 3 + %div18.i.lhs.trunc = sext i8 %div17.i187 to i16 + %58 = zext i8 %43 to i16 + %div18.i.rhs.trunc = mul nuw nsw i16 %58, 7 + %div18.i188 = sdiv i16 %div18.i.lhs.trunc, %div18.i.rhs.trunc + %59 = zext i8 %43 to i16 + %div19.i.rhs.trunc = mul nuw nsw i16 %59, 6 + %div19.i189 = sdiv i16 %div18.i188, %div19.i.rhs.trunc + %conv.tr = zext i8 %43 to i16 + %div20.i.rhs.trunc = shl nuw nsw i16 %conv.tr, 1 + %div20.i190 = sdiv i16 %div19.i189, %div20.i.rhs.trunc + %div20.i.sext = sext i16 %div20.i190 to i32 + %div.i65.lhs.trunc = zext i8 %43 to i16 + %div.i65191 = udiv i16 %div.i65.lhs.trunc, %div20.i.rhs.trunc + %div2.i67192 = udiv i16 %div.i65191, %div20.i.rhs.trunc + %div3.i69193 = udiv i16 %div2.i67192, %div.i.rhs.trunc + %conv.tr223 = zext i8 %43 to i16 + %div4.i71.rhs.trunc = shl nuw nsw i16 %conv.tr223, 2 + %div4.i71194 = udiv i16 %div3.i69193, %div4.i71.rhs.trunc + %div5.i73195 = udiv i16 %div4.i71194, %div.i.lhs.trunc + %div6.i75196 = udiv i16 %div5.i73195, %div19.i.rhs.trunc + %div7.i77197 = sdiv i16 %div6.i75196, %div18.i.rhs.trunc + %div8.i79.rhs.trunc = shl nuw nsw i16 %div.i65.lhs.trunc, 3 + %div8.i79198 = sdiv i16 %div7.i77197, %div8.i79.rhs.trunc + %div9.i81199 = sdiv i16 %div8.i79198, 3 + %div10.i83200 = sdiv i16 %div9.i81199, %div16.i.rhs.trunc + %div11.i85.rhs.trunc = trunc i32 %add30.i to i16 + %div11.i85201 = sdiv i16 %div10.i83200, %div11.i85.rhs.trunc + %div12.i87202 = sdiv i16 %div11.i85201, %div14.i.rhs.trunc + %div13.i89203 = sdiv i16 %div12.i87202, %div13.i.rhs.trunc + %div14.i91204 = sdiv i16 %div13.i89203, %div12.i.rhs.trunc + %div15.i93205 = sdiv i16 %div14.i91204, %div11.i.rhs.trunc + %div16.i95.rhs.trunc = trunc i32 %add41.i to i16 + %div16.i95206 = sdiv i16 %div15.i93205, %div16.i95.rhs.trunc + %div17.i97207 = sdiv i16 %div16.i95206, %div10.i.rhs.trunc + %div18.i99208 = sdiv i16 %div17.i97207, %div9.i.rhs.trunc + %div19.i100.lhs.trunc = trunc i16 %div18.i99208 to i8 + %div19.i100209 = sdiv i8 %div19.i100.lhs.trunc, 24 + %div20.i102.lhs.trunc = sext i8 %div19.i100209 to i16 + %div20.i102210 = sdiv i16 %div20.i102.lhs.trunc, %div8.i.rhs.trunc + %div21.i211 = sdiv i16 %div20.i102210, %div7.i.rhs.trunc + %div22.i212 = sdiv i16 %div21.i211, %div6.i.rhs.trunc + %div23.i213 = sdiv i16 %div22.i212, %div5.i.rhs.trunc + %div24.i214 = sdiv i16 %div23.i213, %div4.i.rhs.trunc + %div25.i215 = sdiv i16 %div24.i214, %div3.i.rhs.trunc + %div26.i216 = sdiv i16 %div25.i215, %div3.i.rhs.trunc + %div27.i217 = sdiv i16 %div26.i216, %div2.i.rhs.trunc + %div28.i218 = sdiv i16 %div27.i217, %div2.i.rhs.trunc + %div29.i219 = sdiv i16 %div28.i218, %div.i.rhs.trunc + %div30.i220 = sdiv i16 %div29.i219, %div4.i71.rhs.trunc + %div31.i221 = sdiv i16 %div30.i220, %div.i.lhs.trunc + %div32.i222 = sdiv i16 %div31.i221, %div.i65.lhs.trunc + %div32.i.sext = sext i16 %div32.i222 to i32 + %mul.i = mul nuw nsw i32 %div32.i.sext, %div20.i.sext + %l = getelementptr inbounds %struct.au, %struct.au* %az, i64 0, i32 1 + store i32 %mul.i, i32* %l, align 8, !tbaa !11 + call void @llvm.lifetime.end.p0i8(i64 8, i8* nonnull %41) #2 + ret void + } + + ; Function Attrs: argmemonly nounwind willreturn + declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #0 + + attributes #0 = { argmemonly nounwind willreturn } + attributes #1 = { nounwind "disable-tail-calls"="false" "frame-pointer"="none" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+a,+c,+d,+f,+m,+relax,-save-restore" "unsafe-fp-math"="false" "use-soft-float"="false" } + attributes #2 = { nounwind } + + !llvm.module.flags = !{!0, !1, !2} + !llvm.ident = !{!3} + + !0 = !{i32 1, !"wchar_size", i32 4} + !1 = !{i32 1, !"target-abi", !"lp64d"} + !2 = !{i32 1, !"SmallDataLimit", i32 8} + !3 = !{!"clang version 12.0.0 (https://github.com/llvm/llvm-project.git 4aa6abe4efc1b648e7ede290210569ca7a703867)"} + !4 = !{!5, !6, i64 0} + !5 = !{!"_ZTS2au", !6, i64 0, !9, i64 8} + !6 = !{!"any pointer", !7, i64 0} + !7 = !{!"omnipotent char", !8, i64 0} + !8 = !{!"Simple C++ TBAA"} + !9 = !{!"int", !7, i64 0} + !10 = !{!7, !7, i64 0} + !11 = !{!5, !9, i64 8} + +... +--- +name: _Z2axILi4096ELi0ELi204848ELi1ELi1EJiiiiiiiiiiiiiiiiiiiiddddddddddddddddddddEEvDpT4_PcP2aud +alignment: 2 +exposesReturnsTwice: false +legalized: false +regBankSelected: false +selected: false +failedISel: false +tracksRegLiveness: true +hasWinCFI: false +registers: [] +liveins: [] +frameInfo: + isFrameAddressTaken: false + isReturnAddressTaken: false + hasStackMap: false + hasPatchPoint: false + stackSize: 0 + offsetAdjustment: 0 + maxAlignment: 4096 + adjustsStack: false + hasCalls: false + stackProtector: '' + maxCallFrameSize: 4294967295 + cvBytesOfCalleeSavedRegisters: 0 + hasOpaqueSPAdjustment: false + hasVAStart: false + hasMustTailInVarArgFunc: false + localFrameSize: 0 + savePoint: '' + restorePoint: '' +fixedStack: + - { id: 0, type: default, offset: 208, size: 8, alignment: 16, stack-id: default, + isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } + - { id: 1, type: default, offset: 200, size: 8, alignment: 8, stack-id: default, + isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } + - { id: 2, type: default, offset: 192, size: 8, alignment: 16, stack-id: default, + isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } + - { id: 3, type: default, offset: 184, size: 8, alignment: 8, stack-id: default, + isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } + - { id: 4, type: default, offset: 176, size: 8, alignment: 16, stack-id: default, + isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } + - { id: 5, type: default, offset: 168, size: 8, alignment: 8, stack-id: default, + isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } + - { id: 6, type: default, offset: 160, size: 8, alignment: 16, stack-id: default, + isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } + - { id: 7, type: default, offset: 152, size: 8, alignment: 8, stack-id: default, + isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } + - { id: 8, type: default, offset: 144, size: 8, alignment: 16, stack-id: default, + isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } + - { id: 9, type: default, offset: 136, size: 8, alignment: 8, stack-id: default, + isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } + - { id: 10, type: default, offset: 128, size: 8, alignment: 16, stack-id: default, + isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } + - { id: 11, type: default, offset: 120, size: 8, alignment: 8, stack-id: default, + isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } + - { id: 12, type: default, offset: 112, size: 8, alignment: 16, stack-id: default, + isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } + - { id: 13, type: default, offset: 104, size: 8, alignment: 8, stack-id: default, + isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } + - { id: 14, type: default, offset: 96, size: 8, alignment: 16, stack-id: default, + isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } + - { id: 15, type: default, offset: 88, size: 8, alignment: 8, stack-id: default, + isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } + - { id: 16, type: default, offset: 80, size: 8, alignment: 16, stack-id: default, + isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } + - { id: 17, type: default, offset: 72, size: 8, alignment: 8, stack-id: default, + isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } + - { id: 18, type: default, offset: 64, size: 8, alignment: 16, stack-id: default, + isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } + - { id: 19, type: default, offset: 56, size: 8, alignment: 8, stack-id: default, + isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } + - { id: 20, type: default, offset: 48, size: 8, alignment: 16, stack-id: default, + isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } + - { id: 21, type: default, offset: 40, size: 8, alignment: 8, stack-id: default, + isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } + - { id: 22, type: default, offset: 32, size: 8, alignment: 16, stack-id: default, + isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } + - { id: 23, type: default, offset: 24, size: 8, alignment: 8, stack-id: default, + isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } + - { id: 24, type: default, offset: 16, size: 8, alignment: 16, stack-id: default, + isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } + - { id: 25, type: default, offset: 8, size: 8, alignment: 8, stack-id: default, + isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } + - { id: 26, type: default, offset: 0, size: 8, alignment: 16, stack-id: default, + isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } +stack: + - { id: 0, name: ba, type: default, offset: 0, size: 8, alignment: 4096, + stack-id: default, callee-saved-register: '', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } + - { id: 1, name: '', type: spill-slot, offset: 0, size: 8, alignment: 8, + stack-id: default, callee-saved-register: '', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } + - { id: 2, name: '', type: spill-slot, offset: 0, size: 8, alignment: 8, + stack-id: default, callee-saved-register: '', callee-saved-restored: true, + debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } +callSites: [] +constants: [] +machineFunctionInfo: {} +body: | + bb.0.entry: + renamable $x12 = LD %fixed-stack.1, 0 :: (load 8 from %fixed-stack.1) + SD renamable $x12, %stack.1, 0 + renamable $x10 = LD %fixed-stack.2, 0 :: (load 8 from %fixed-stack.2, align 16) + renamable $x11 = ADDI %stack.0.ba, 0 + SD killed renamable $x11, killed renamable $x12, 0 :: (store 8 into %ir.42, !tbaa !4) + renamable $x11 = LBU killed renamable $x10, 0 :: (load 1 from %ir.ay, !tbaa !10) + renamable $x22 = ADDI renamable $x11, 5 + renamable $x19 = ADD renamable $x22, renamable $x11 + renamable $x28 = ADDI renamable $x11, 20 + renamable $x7 = ADD renamable $x28, renamable $x11 + renamable $x31 = SLLI renamable $x11, 2 + renamable $x30 = ADD renamable $x31, renamable $x11 + renamable $x14 = SLLI renamable $x11, 1 + renamable $x21 = ADD renamable $x14, renamable $x11 + renamable $x10 = DIVU renamable $x30, renamable $x21 + renamable $x23 = nuw nsw ADDI renamable $x11, 32 + renamable $x10 = DIVU killed renamable $x10, renamable $x23 + renamable $x24 = nuw nsw ADDI renamable $x11, 29 + renamable $x10 = DIVU killed renamable $x10, renamable $x24 + renamable $x17 = nuw nsw ADDI renamable $x11, 28 + renamable $x10 = DIVU killed renamable $x10, renamable $x17 + renamable $x5 = nuw nsw ADDI renamable $x11, 27 + renamable $x10 = DIVU killed renamable $x10, renamable $x5 + renamable $x10 = SLLI killed renamable $x10, 48 + renamable $x10 = SRAI killed renamable $x10, 48 + renamable $x6 = nuw nsw ADDI renamable $x11, 6 + renamable $x10 = DIV killed renamable $x10, renamable $x6 + renamable $x10 = SLLI killed renamable $x10, 48 + renamable $x10 = SRAI killed renamable $x10, 48 + renamable $x29 = nuw nsw ADDI renamable $x11, 25 + renamable $x10 = DIV killed renamable $x10, renamable $x29 + renamable $x10 = SLLI killed renamable $x10, 48 + renamable $x10 = SRAI killed renamable $x10, 48 + renamable $x18 = nuw nsw ADDI renamable $x11, 24 + renamable $x10 = DIV killed renamable $x10, renamable $x18 + renamable $x10 = SLLI killed renamable $x10, 48 + renamable $x10 = SRAI killed renamable $x10, 48 + renamable $x25 = nuw nsw ADDI renamable $x11, 2 + renamable $x10 = DIV killed renamable $x10, renamable $x25 + renamable $x10 = SLLI killed renamable $x10, 48 + renamable $x10 = SRAI killed renamable $x10, 48 + renamable $x10 = DIV killed renamable $x10, renamable $x7 + renamable $x10 = SLLI killed renamable $x10, 48 + renamable $x10 = SRAI killed renamable $x10, 48 + renamable $x26 = nuw nsw ADDI renamable $x11, 9 + renamable $x10 = DIV killed renamable $x10, renamable $x26 + renamable $x10 = SLLI killed renamable $x10, 48 + renamable $x10 = SRAI killed renamable $x10, 48 + renamable $x27 = nuw nsw ADDI renamable $x11, 8 + renamable $x10 = DIV killed renamable $x10, renamable $x27 + renamable $x10 = SLLI killed renamable $x10, 48 + renamable $x15 = SRAI killed renamable $x10, 48 + renamable $x10 = nuw nsw ADDI renamable $x11, 7 + renamable $x15 = DIV killed renamable $x15, renamable $x10 + renamable $x15 = SLLI killed renamable $x15, 48 + renamable $x15 = SRAI killed renamable $x15, 48 + renamable $x15 = DIV killed renamable $x15, renamable $x19 + renamable $x15 = SLLI killed renamable $x15, 56 + renamable $x12 = SRAI killed renamable $x15, 56 + renamable $x15 = LUI 10923 + renamable $x15 = ADDIW killed renamable $x15, -1365 + renamable $x15 = SLLI killed renamable $x15, 12 + renamable $x15 = ADDI killed renamable $x15, -1365 + renamable $x15 = SLLI killed renamable $x15, 12 + renamable $x15 = ADDI killed renamable $x15, -1365 + renamable $x15 = SLLI killed renamable $x15, 12 + renamable $x1 = ADDI killed renamable $x15, -1365 + renamable $x12 = MULH killed renamable $x12, renamable $x1 + renamable $x13 = SRLI renamable $x12, 63 + renamable $x12 = ADD killed renamable $x12, killed renamable $x13 + renamable $x12 = SLLI killed renamable $x12, 56 + renamable $x12 = SRAI killed renamable $x12, 56 + renamable $x13 = nuw nsw ADDI renamable $x11, 4 + renamable $x12 = DIV killed renamable $x12, renamable $x13 + renamable $x12 = SLLI killed renamable $x12, 56 + renamable $x12 = SRAI killed renamable $x12, 56 + renamable $x9 = LUI 21845 + renamable $x9 = ADDIW killed renamable $x9, 1365 + renamable $x9 = SLLI killed renamable $x9, 12 + renamable $x9 = ADDI killed renamable $x9, 1365 + renamable $x9 = SLLI killed renamable $x9, 12 + renamable $x9 = ADDI killed renamable $x9, 1365 + renamable $x9 = SLLI killed renamable $x9, 12 + renamable $x9 = ADDI killed renamable $x9, 1366 + renamable $x12 = MULH killed renamable $x12, renamable $x9 + renamable $x15 = SRLI renamable $x12, 63 + renamable $x12 = ADD killed renamable $x12, killed renamable $x15 + renamable $x12 = SLLI killed renamable $x12, 56 + renamable $x12 = SRAI killed renamable $x12, 56 + renamable $x15 = SLLI renamable $x11, 3 + renamable $x20 = SUB renamable $x15, renamable $x11 + renamable $x12 = DIV killed renamable $x12, renamable $x20 + renamable $x12 = SLLI killed renamable $x12, 48 + renamable $x12 = SRAI killed renamable $x12, 48 + renamable $x16 = ADDI $x0, 6 + renamable $x16 = nuw nsw MUL renamable $x11, killed renamable $x16 + renamable $x12 = DIV killed renamable $x12, renamable $x16 + renamable $x12 = SLLI killed renamable $x12, 48 + renamable $x12 = SRAI killed renamable $x12, 48 + renamable $x12 = DIV killed renamable $x12, renamable $x14 + SD killed renamable $x12, %stack.2, 0 + renamable $x12 = DIVU renamable $x11, renamable $x14 + renamable $x12 = DIVU killed renamable $x12, killed renamable $x14 + renamable $x12 = DIVU killed renamable $x12, renamable $x21 + renamable $x12 = DIVU killed renamable $x12, renamable $x31 + renamable $x12 = DIVU killed renamable $x12, renamable $x30 + renamable $x12 = DIVU killed renamable $x12, killed renamable $x16 + renamable $x12 = SLLI killed renamable $x12, 48 + renamable $x12 = SRAI killed renamable $x12, 48 + renamable $x12 = DIV killed renamable $x12, killed renamable $x20 + renamable $x12 = SLLI killed renamable $x12, 48 + renamable $x12 = SRAI killed renamable $x12, 48 + renamable $x12 = DIV killed renamable $x12, killed renamable $x15 + renamable $x12 = SLLI killed renamable $x12, 48 + renamable $x12 = SRAI killed renamable $x12, 48 + renamable $x12 = MULH killed renamable $x12, killed renamable $x9 + renamable $x14 = SRLI renamable $x12, 63 + renamable $x12 = ADD killed renamable $x12, killed renamable $x14 + renamable $x12 = SLLI killed renamable $x12, 48 + renamable $x12 = SRAI killed renamable $x12, 48 + renamable $x12 = DIV killed renamable $x12, killed renamable $x13 + renamable $x12 = SLLI killed renamable $x12, 48 + renamable $x12 = SRAI killed renamable $x12, 48 + renamable $x12 = DIV killed renamable $x12, killed renamable $x22 + renamable $x12 = SLLI killed renamable $x12, 48 + renamable $x12 = SRAI killed renamable $x12, 48 + renamable $x12 = DIV killed renamable $x12, killed renamable $x19 + renamable $x12 = SLLI killed renamable $x12, 48 + renamable $x12 = SRAI killed renamable $x12, 48 + renamable $x10 = DIV killed renamable $x12, killed renamable $x10 + renamable $x10 = SLLI killed renamable $x10, 48 + renamable $x10 = SRAI killed renamable $x10, 48 + renamable $x10 = DIV killed renamable $x10, killed renamable $x27 + renamable $x10 = SLLI killed renamable $x10, 48 + renamable $x10 = SRAI killed renamable $x10, 48 + renamable $x10 = DIV killed renamable $x10, killed renamable $x26 + renamable $x10 = SLLI killed renamable $x10, 48 + renamable $x10 = SRAI killed renamable $x10, 48 + renamable $x10 = DIV killed renamable $x10, killed renamable $x28 + renamable $x10 = SLLI killed renamable $x10, 48 + renamable $x10 = SRAI killed renamable $x10, 48 + renamable $x10 = DIV killed renamable $x10, killed renamable $x7 + renamable $x10 = SLLI killed renamable $x10, 48 + renamable $x10 = SRAI killed renamable $x10, 48 + renamable $x10 = DIV killed renamable $x10, killed renamable $x25 + renamable $x10 = SLLI killed renamable $x10, 56 + renamable $x10 = SRAI killed renamable $x10, 56 + renamable $x10 = MULH killed renamable $x10, killed renamable $x1 + renamable $x12 = SRLI renamable $x10, 63 + renamable $x10 = SRLI killed renamable $x10, 2 + renamable $x10 = ADD killed renamable $x10, killed renamable $x12 + renamable $x10 = SLLI killed renamable $x10, 56 + renamable $x10 = SRAI killed renamable $x10, 56 + renamable $x10 = DIV killed renamable $x10, killed renamable $x18 + renamable $x10 = SLLI killed renamable $x10, 48 + renamable $x10 = SRAI killed renamable $x10, 48 + renamable $x10 = DIV killed renamable $x10, killed renamable $x29 + renamable $x10 = SLLI killed renamable $x10, 48 + renamable $x10 = SRAI killed renamable $x10, 48 + renamable $x10 = DIV killed renamable $x10, killed renamable $x6 + renamable $x10 = SLLI killed renamable $x10, 48 + renamable $x10 = SRAI killed renamable $x10, 48 + renamable $x10 = DIV killed renamable $x10, killed renamable $x5 + renamable $x10 = SLLI killed renamable $x10, 48 + renamable $x10 = SRAI killed renamable $x10, 48 + renamable $x10 = DIV killed renamable $x10, killed renamable $x17 + renamable $x10 = SLLI killed renamable $x10, 48 + renamable $x10 = SRAI killed renamable $x10, 48 + renamable $x10 = DIV killed renamable $x10, renamable $x24 + renamable $x10 = SLLI killed renamable $x10, 48 + renamable $x10 = SRAI killed renamable $x10, 48 + renamable $x10 = DIV killed renamable $x10, killed renamable $x24 + renamable $x10 = SLLI killed renamable $x10, 48 + renamable $x10 = SRAI killed renamable $x10, 48 + renamable $x10 = DIV killed renamable $x10, renamable $x23 + renamable $x10 = SLLI killed renamable $x10, 48 + renamable $x10 = SRAI killed renamable $x10, 48 + renamable $x10 = DIV killed renamable $x10, killed renamable $x23 + renamable $x10 = SLLI killed renamable $x10, 48 + renamable $x10 = SRAI killed renamable $x10, 48 + renamable $x10 = DIV killed renamable $x10, killed renamable $x21 + renamable $x10 = SLLI killed renamable $x10, 48 + renamable $x10 = SRAI killed renamable $x10, 48 + renamable $x10 = DIV killed renamable $x10, killed renamable $x31 + renamable $x10 = SLLI killed renamable $x10, 48 + renamable $x10 = SRAI killed renamable $x10, 48 + renamable $x10 = DIV killed renamable $x10, killed renamable $x30 + renamable $x10 = SLLI killed renamable $x10, 48 + renamable $x10 = SRAI killed renamable $x10, 48 + renamable $x10 = DIV killed renamable $x10, killed renamable $x11 + renamable $x11 = LD %stack.2, 0 + renamable $x11 = SLLI killed renamable $x11, 48 + renamable $x11 = SRAI killed renamable $x11, 48 + renamable $x10 = SLLI killed renamable $x10, 48 + renamable $x10 = SRAI killed renamable $x10, 48 + renamable $x10 = MUL killed renamable $x10, killed renamable $x11 + renamable $x11 = LD %stack.1, 0 + SW killed renamable $x10, killed renamable $x11, 8 :: (store 4 into %ir.l, align 8, !tbaa !11) + PseudoRET + +... Index: llvm/test/CodeGen/Thumb/emergency-spill-slot.ll =================================================================== --- llvm/test/CodeGen/Thumb/emergency-spill-slot.ll +++ llvm/test/CodeGen/Thumb/emergency-spill-slot.ll @@ -253,10 +253,10 @@ ; CHECK-NEXT: adds r1, #1 ; CHECK-NEXT: @APP ; CHECK-NEXT: @NO_APP -; CHECK-NEXT: str r0, [sp, #12] +; CHECK-NEXT: str r0, [sp] ; CHECK-NEXT: ldr r0, .LCPI5_0 ; CHECK-NEXT: str r5, [r0, r7] -; CHECK-NEXT: ldr r0, [sp, #12] +; CHECK-NEXT: ldr r0, [sp] ; CHECK-NEXT: @APP ; CHECK-NEXT: @NO_APP ; CHECK-NEXT: subs r4, r7, #7