diff --git a/llvm/lib/CodeGen/MachineBasicBlock.cpp b/llvm/lib/CodeGen/MachineBasicBlock.cpp
--- a/llvm/lib/CodeGen/MachineBasicBlock.cpp
+++ b/llvm/lib/CodeGen/MachineBasicBlock.cpp
@@ -956,17 +956,6 @@
   }
 
   MachineFunction *MF = getParent();
-
-  LivePhysRegs LiveRegs;
-  if (UpdateLiveIns) {
-    // Make sure we add any physregs we define in the block as liveins to the
-    // new block.
-    LiveRegs.init(*MF->getSubtarget().getRegisterInfo());
-    LiveRegs.addLiveOuts(*this);
-    for (auto I = rbegin(), E = SplitPoint.getReverse(); I != E; ++I)
-      LiveRegs.stepBackward(*I);
-  }
-
   MachineBasicBlock *SplitBB = MF->CreateMachineBasicBlock(getBasicBlock());
 
   MF->insert(++MachineFunction::iterator(this), SplitBB);
@@ -975,8 +964,10 @@
   SplitBB->transferSuccessorsAndUpdatePHIs(this);
   addSuccessor(SplitBB);
 
-  if (UpdateLiveIns)
-    addLiveIns(*SplitBB, LiveRegs);
+  if (UpdateLiveIns) {
+    LivePhysRegs LiveRegs;
+    computeAndAddLiveIns(LiveRegs, *SplitBB);
+  }
 
   if (LIS)
     LIS->insertMBBInMaps(SplitBB, &MI);
diff --git a/llvm/test/CodeGen/AMDGPU/si-lower-control-flow.mir b/llvm/test/CodeGen/AMDGPU/si-lower-control-flow.mir
--- a/llvm/test/CodeGen/AMDGPU/si-lower-control-flow.mir
+++ b/llvm/test/CodeGen/AMDGPU/si-lower-control-flow.mir
@@ -233,7 +233,6 @@
   ; GCN:   $exec = S_OR_B64_term $exec, [[COPY3]], implicit-def $scc
   ; GCN: bb.3:
   ; GCN:   successors: %bb.2(0x80000000)
-  ; GCN:   liveins: $vgpr3
   ; GCN:   $vgpr3 = V_MOV_B32_e32 0, implicit $exec
   ; GCN:   $sgpr4_sgpr5 = S_MOV_B64 32
   ; GCN: bb.2: