diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -7587,6 +7587,10 @@
         LibInfo->hasOptimizedCodeGen(Func)) {
       switch (Func) {
       default: break;
+      case LibFunc_bcmp:
+        if (visitMemCmpCall(I))
+          return;
+        break;
       case LibFunc_copysign:
       case LibFunc_copysignf:
       case LibFunc_copysignl:
diff --git a/llvm/test/CodeGen/SystemZ/bcmp.ll b/llvm/test/CodeGen/SystemZ/bcmp.ll
new file mode 100644
--- /dev/null
+++ b/llvm/test/CodeGen/SystemZ/bcmp.ll
@@ -0,0 +1,29 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
+
+declare signext i32 @bcmp(i8* nocapture, i8* nocapture, i64)
+
+define zeroext i1 @test_bcmp_eq_0(i8* nocapture readonly %A, i8* nocapture readonly %B) {
+; CHECK-LABEL: test_bcmp_eq_0:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    clc 0(2,%r3), 0(%r2)
+; CHECK-NEXT:    ipm %r0
+; CHECK-NEXT:    afi %r0, -268435456
+; CHECK-NEXT:    risbg %r2, %r0, 63, 191, 33
+; CHECK-NEXT:    br %r14
+  %c = tail call signext i32 @bcmp(i8* %A, i8* %B, i64 2)
+  %res  = icmp eq i32 %c, 0
+  ret i1 %res
+}
+
+define signext i32 @test_bcmp(i8* nocapture readonly %A, i8* nocapture readonly %B) {
+; CHECK-LABEL: test_bcmp:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    clc 0(2,%r3), 0(%r2)
+; CHECK-NEXT:    ipm %r0
+; CHECK-NEXT:    sllg %r0, %r0, 34
+; CHECK-NEXT:    srag %r2, %r0, 62
+; CHECK-NEXT:    br %r14
+  %res = tail call signext i32 @bcmp(i8* %A, i8* %B, i64 2)
+  ret i32 %res
+}