Index: llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
===================================================================
--- llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
+++ llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
@@ -997,6 +997,12 @@
   SmallVector<const Use *, 32> UndefUsesToFix;
   for (Value* V : Postorder) {
     unsigned NewAddrSpace = InferredAddrSpace.lookup(V);
+
+    // In some degenerate cases (e.g. invalid IR in unreachable code), we may
+    // not even infer the value to have its original address space.
+    if (NewAddrSpace == UninitializedAddressSpace)
+      continue;
+
     if (V->getType()->getPointerAddressSpace() != NewAddrSpace) {
       Value *New = cloneValueWithNewAddressSpace(
           V, NewAddrSpace, ValueWithNewAddrSpace, &UndefUsesToFix);
Index: llvm/test/Transforms/InferAddressSpaces/AMDGPU/self-phi.ll
===================================================================
--- /dev/null
+++ llvm/test/Transforms/InferAddressSpaces/AMDGPU/self-phi.ll
@@ -0,0 +1,28 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -S -infer-address-spaces %s | FileCheck %s
+
+define amdgpu_kernel void @phi_self(i8 addrspace(1)* %arg) {
+; CHECK-LABEL: @phi_self(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    br label [[LOOP:%.*]]
+; CHECK:       loop:
+; CHECK-NEXT:    [[I:%.*]] = phi i8 addrspace(1)* [ [[I]], [[LOOP]] ], [ [[ARG:%.*]], [[ENTRY:%.*]] ]
+; CHECK-NEXT:    [[I1:%.*]] = load i8, i8 addrspace(1)* [[I]], align 1
+; CHECK-NEXT:    [[I2:%.*]] = icmp eq i8 [[I1]], 0
+; CHECK-NEXT:    br i1 [[I2]], label [[LOOP]], label [[RET:%.*]]
+; CHECK:       ret:
+; CHECK-NEXT:    ret void
+;
+entry:
+  %cast = addrspacecast i8 addrspace(1)* %arg to i8*
+  br label %loop
+
+loop:
+  %i = phi i8* [%i, %loop], [%cast, %entry]
+  %i1 = load i8, i8* %i, align 1
+  %i2 = icmp eq i8 %i1, 0
+  br i1 %i2, label %loop, label %ret
+
+ret:
+  ret void
+}
Index: llvm/test/Transforms/InferAddressSpaces/AMDGPU/unreachable-code-assert.ll
===================================================================
--- /dev/null
+++ llvm/test/Transforms/InferAddressSpaces/AMDGPU/unreachable-code-assert.ll
@@ -0,0 +1,27 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -S -infer-address-spaces %s | FileCheck %s
+
+define amdgpu_kernel void @subclass_data_assert() {
+; CHECK-LABEL: @subclass_data_assert(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    unreachable
+; CHECK:       strlen.while11:
+; CHECK-NEXT:    [[I:%.*]] = getelementptr i8, i8* [[I]], i64 1
+; CHECK-NEXT:    [[I1:%.*]] = load i8, i8* [[I]], align 1
+; CHECK-NEXT:    [[I2:%.*]] = icmp eq i8 [[I1]], 0
+; CHECK-NEXT:    br i1 [[I2]], label [[STRLEN_WHILE_DONE12:%.*]], label [[STRLEN_WHILE11:%.*]]
+; CHECK:       strlen.while.done12:
+; CHECK-NEXT:    ret void
+;
+entry:
+  unreachable
+
+strlen.while11:                                   ; preds = %strlen.while11
+  %i = getelementptr i8, i8* %i, i64 1
+  %i1 = load i8, i8* %i, align 1
+  %i2 = icmp eq i8 %i1, 0
+  br i1 %i2, label %strlen.while.done12, label %strlen.while11
+
+strlen.while.done12:                              ; preds = %strlen.while11
+  ret void
+}