diff --git a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
--- a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+++ b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
@@ -5601,6 +5601,19 @@
         std::min(*BestKnownTC / VF.getKnownMinValue(), MaxInterleaveCount);
   }
 
+  // Interleave should be greater than 0.
+  MaxInterleaveCount = std::max(1u, MaxInterleaveCount);
+
+  // Clamp the calculated IC to be between the 1 and the max interleave count
+  // that the target and trip count allows.
+  if (IC > MaxInterleaveCount)
+    IC = MaxInterleaveCount;
+  else
+    // Interleave should be greater than 0.
+    IC = std::max(1u, IC);
+
+  assert(IC > 0 && "Interleave should be greater than 0.");
+
   // If we did not calculate the cost for VF (because the user selected the VF)
   // then we calculate the cost of VF here.
   if (LoopCost == 0)
@@ -5608,13 +5621,6 @@
 
   assert(LoopCost && "Non-zero loop cost expected");
 
-  // Clamp the calculated IC to be between the 1 and the max interleave count
-  // that the target and trip count allows.
-  if (IC > MaxInterleaveCount)
-    IC = MaxInterleaveCount;
-  else if (IC < 1)
-    IC = 1;
-
   // Interleave if we vectorized this loop and there is a reduction that could
   // benefit from interleaving.
   if (VF.isVector() && HasReductions) {
diff --git a/llvm/test/Transforms/LoopVectorize/SystemZ/zero_unroll.ll b/llvm/test/Transforms/LoopVectorize/SystemZ/zero_unroll.ll
new file mode 100644
--- /dev/null
+++ b/llvm/test/Transforms/LoopVectorize/SystemZ/zero_unroll.ll
@@ -0,0 +1,22 @@
+; RUN: opt -S -loop-vectorize -mtriple=s390x-linux-gnu -tiny-trip-count-interleave-threshold=4 -vectorizer-min-trip-count=8 < %s | FileCheck %s
+; RUN: opt -S -passes=loop-vectorize -mtriple=s390x-linux-gnu -tiny-trip-count-interleave-threshold=4 -vectorizer-min-trip-count=8 < %s | FileCheck %s
+
+define i32 @main(i32 %arg, i8** nocapture readnone %arg1) #0 {
+;CHECK: vector.body:
+entry:
+  %0 = alloca i8, align 1
+  br label %loop
+
+loop:
+  %storemerge.i.i = phi i8 [ 0, %entry ], [ %tmp12.i.i, %loop ]
+  store i8 %storemerge.i.i, i8* %0, align 2
+  %tmp8.i.i = icmp ult i8 %storemerge.i.i, 8
+  %tmp12.i.i = add nuw nsw i8 %storemerge.i.i, 1
+  br i1 %tmp8.i.i, label %loop, label %ret
+
+ret:
+  ret i32 0
+}
+
+attributes #0 = { "target-cpu"="z13" }
+