Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp =================================================================== --- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -14059,13 +14059,16 @@ } static SDValue visitFMinMax(SelectionDAG &DAG, SDNode *N, - APFloat (*Op)(const APFloat &, const APFloat &), - bool PropagatesNaN) { + APFloat (*Op)(const APFloat &, const APFloat &)) { SDValue N0 = N->getOperand(0); SDValue N1 = N->getOperand(1); EVT VT = N->getValueType(0); const ConstantFPSDNode *N0CFP = isConstOrConstSplatFP(N0); const ConstantFPSDNode *N1CFP = isConstOrConstSplatFP(N1); + const SDNodeFlags Flags = N->getFlags(); + unsigned Opc = N->getOpcode(); + bool PropagatesNaN = Opc == ISD::FMINIMUM || Opc == ISD::FMAXIMUM; + bool IsMin = Opc == ISD::FMINNUM || Opc == ISD::FMINIMUM; if (N0CFP && N1CFP) { const APFloat &C0 = N0CFP->getValueAPF(); @@ -14078,30 +14081,57 @@ !isConstantFPBuildVectorOrConstantFP(N1)) return DAG.getNode(N->getOpcode(), SDLoc(N), VT, N1, N0); - // minnum(X, nan) -> X - // maxnum(X, nan) -> X - // minimum(X, nan) -> nan - // maximum(X, nan) -> nan - if (N1CFP && N1CFP->isNaN()) - return PropagatesNaN ? N->getOperand(1) : N->getOperand(0); + if (N1CFP) { + const APFloat &AF = N1CFP->getValueAPF(); + + // minnum(X, nan) -> X + // maxnum(X, nan) -> X + // minimum(X, nan) -> nan + // maximum(X, nan) -> nan + if (AF.isNaN()) + return PropagatesNaN ? N->getOperand(1) : N->getOperand(0); + + // In the following folds, inf can be replaced with the largest finite + // float, if the ninf flag is set. + bool IsLargest = (AF.isInfinity() && !AF.isNegative()) || + (Flags.hasNoInfs() && AF.isLargest()); + bool IsSmallest = (AF.isInfinity() && AF.isNegative()) || + (Flags.hasNoInfs() && AF.isSmallest()); + + // minnum(X, -inf) -> -inf + // maxnum(X, +inf) -> +inf + // maximum(X, -inf) -> -inf if nnan + // minimum(X, +inf) -> +inf if nnan + if ((IsMin ? IsSmallest : IsLargest) && + (!PropagatesNaN || Flags.hasNoNaNs())) + return N->getOperand(1); + + // minnum(X, +inf) -> X if nnan + // maxnum(X, -inf) -> X if nnan + // minimum(X, +inf) -> X + // maximum(X, +inf) -> X + if ((IsMin ? IsLargest : IsSmallest) && + (PropagatesNaN || Flags.hasNoNaNs())) + return N->getOperand(0); + } return SDValue(); } SDValue DAGCombiner::visitFMINNUM(SDNode *N) { - return visitFMinMax(DAG, N, minnum, /* PropagatesNaN */ false); + return visitFMinMax(DAG, N, minnum); } SDValue DAGCombiner::visitFMAXNUM(SDNode *N) { - return visitFMinMax(DAG, N, maxnum, /* PropagatesNaN */ false); + return visitFMinMax(DAG, N, maxnum); } SDValue DAGCombiner::visitFMINIMUM(SDNode *N) { - return visitFMinMax(DAG, N, minimum, /* PropagatesNaN */ true); + return visitFMinMax(DAG, N, minimum); } SDValue DAGCombiner::visitFMAXIMUM(SDNode *N) { - return visitFMinMax(DAG, N, maximum, /* PropagatesNaN */ true); + return visitFMinMax(DAG, N, maximum); } SDValue DAGCombiner::visitFABS(SDNode *N) { Index: llvm/test/CodeGen/ARM/fminmax-folds.ll =================================================================== --- llvm/test/CodeGen/ARM/fminmax-folds.ll +++ llvm/test/CodeGen/ARM/fminmax-folds.ll @@ -61,15 +61,9 @@ define float @test_maxnum_const_inf(float %x) { ; CHECK-LABEL: test_maxnum_const_inf: ; CHECK: @ %bb.0: -; CHECK-NEXT: vldr s0, .LCPI5_0 -; CHECK-NEXT: vmov s2, r0 -; CHECK-NEXT: vmaxnm.f32 s0, s2, s0 -; CHECK-NEXT: vmov r0, s0 +; CHECK-NEXT: movw r0, #0 +; CHECK-NEXT: movt r0, #32640 ; CHECK-NEXT: bx lr -; CHECK-NEXT: .p2align 2 -; CHECK-NEXT: @ %bb.1: -; CHECK-NEXT: .LCPI5_0: -; CHECK-NEXT: .long 0x7f800000 @ float +Inf %r = call float @llvm.maxnum.f32(float %x, float 0x7ff0000000000000) ret float %r } @@ -93,15 +87,7 @@ define float @test_minimum_const_inf(float %x) { ; CHECK-LABEL: test_minimum_const_inf: ; CHECK: @ %bb.0: -; CHECK-NEXT: vldr s0, .LCPI7_0 -; CHECK-NEXT: vmov s2, r0 -; CHECK-NEXT: vmin.f32 d0, d1, d0 -; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: bx lr -; CHECK-NEXT: .p2align 2 -; CHECK-NEXT: @ %bb.1: -; CHECK-NEXT: .LCPI7_0: -; CHECK-NEXT: .long 0x7f800000 @ float +Inf %r = call float @llvm.minimum.f32(float %x, float 0x7ff0000000000000) ret float %r } @@ -109,15 +95,9 @@ define float @test_minnum_const_neg_inf(float %x) { ; CHECK-LABEL: test_minnum_const_neg_inf: ; CHECK: @ %bb.0: -; CHECK-NEXT: vldr s0, .LCPI8_0 -; CHECK-NEXT: vmov s2, r0 -; CHECK-NEXT: vminnm.f32 s0, s2, s0 -; CHECK-NEXT: vmov r0, s0 +; CHECK-NEXT: movw r0, #0 +; CHECK-NEXT: movt r0, #65408 ; CHECK-NEXT: bx lr -; CHECK-NEXT: .p2align 2 -; CHECK-NEXT: @ %bb.1: -; CHECK-NEXT: .LCPI8_0: -; CHECK-NEXT: .long 0xff800000 @ float -Inf %r = call float @llvm.minnum.f32(float %x, float 0xfff0000000000000) ret float %r } @@ -141,15 +121,7 @@ define float @test_maximum_const_neg_inf(float %x) { ; CHECK-LABEL: test_maximum_const_neg_inf: ; CHECK: @ %bb.0: -; CHECK-NEXT: vldr s0, .LCPI10_0 -; CHECK-NEXT: vmov s2, r0 -; CHECK-NEXT: vmax.f32 d0, d1, d0 -; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: bx lr -; CHECK-NEXT: .p2align 2 -; CHECK-NEXT: @ %bb.1: -; CHECK-NEXT: .LCPI10_0: -; CHECK-NEXT: .long 0xff800000 @ float -Inf %r = call float @llvm.maximum.f32(float %x, float 0xfff0000000000000) ret float %r } @@ -173,15 +145,7 @@ define float @test_minnum_const_inf_nnan(float %x) { ; CHECK-LABEL: test_minnum_const_inf_nnan: ; CHECK: @ %bb.0: -; CHECK-NEXT: vldr s0, .LCPI12_0 -; CHECK-NEXT: vmov s2, r0 -; CHECK-NEXT: vminnm.f32 s0, s2, s0 -; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: bx lr -; CHECK-NEXT: .p2align 2 -; CHECK-NEXT: @ %bb.1: -; CHECK-NEXT: .LCPI12_0: -; CHECK-NEXT: .long 0x7f800000 @ float +Inf %r = call nnan float @llvm.minnum.f32(float %x, float 0x7ff0000000000000) ret float %r } @@ -189,15 +153,9 @@ define float @test_maxnum_const_inf_nnan(float %x) { ; CHECK-LABEL: test_maxnum_const_inf_nnan: ; CHECK: @ %bb.0: -; CHECK-NEXT: vldr s0, .LCPI13_0 -; CHECK-NEXT: vmov s2, r0 -; CHECK-NEXT: vmaxnm.f32 s0, s2, s0 -; CHECK-NEXT: vmov r0, s0 +; CHECK-NEXT: movw r0, #0 +; CHECK-NEXT: movt r0, #32640 ; CHECK-NEXT: bx lr -; CHECK-NEXT: .p2align 2 -; CHECK-NEXT: @ %bb.1: -; CHECK-NEXT: .LCPI13_0: -; CHECK-NEXT: .long 0x7f800000 @ float +Inf %r = call nnan float @llvm.maxnum.f32(float %x, float 0x7ff0000000000000) ret float %r } @@ -205,15 +163,9 @@ define float @test_maximum_const_inf_nnan(float %x) { ; CHECK-LABEL: test_maximum_const_inf_nnan: ; CHECK: @ %bb.0: -; CHECK-NEXT: vldr s0, .LCPI14_0 -; CHECK-NEXT: vmov s2, r0 -; CHECK-NEXT: vmax.f32 d0, d1, d0 -; CHECK-NEXT: vmov r0, s0 +; CHECK-NEXT: movw r0, #0 +; CHECK-NEXT: movt r0, #32640 ; CHECK-NEXT: bx lr -; CHECK-NEXT: .p2align 2 -; CHECK-NEXT: @ %bb.1: -; CHECK-NEXT: .LCPI14_0: -; CHECK-NEXT: .long 0x7f800000 @ float +Inf %r = call nnan float @llvm.maximum.f32(float %x, float 0x7ff0000000000000) ret float %r } @@ -221,15 +173,7 @@ define float @test_minimum_const_inf_nnan(float %x) { ; CHECK-LABEL: test_minimum_const_inf_nnan: ; CHECK: @ %bb.0: -; CHECK-NEXT: vldr s0, .LCPI15_0 -; CHECK-NEXT: vmov s2, r0 -; CHECK-NEXT: vmin.f32 d0, d1, d0 -; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: bx lr -; CHECK-NEXT: .p2align 2 -; CHECK-NEXT: @ %bb.1: -; CHECK-NEXT: .LCPI15_0: -; CHECK-NEXT: .long 0x7f800000 @ float +Inf %r = call nnan float @llvm.minimum.f32(float %x, float 0x7ff0000000000000) ret float %r } @@ -237,15 +181,9 @@ define float @test_minnum_const_neg_inf_nnan(float %x) { ; CHECK-LABEL: test_minnum_const_neg_inf_nnan: ; CHECK: @ %bb.0: -; CHECK-NEXT: vldr s0, .LCPI16_0 -; CHECK-NEXT: vmov s2, r0 -; CHECK-NEXT: vminnm.f32 s0, s2, s0 -; CHECK-NEXT: vmov r0, s0 +; CHECK-NEXT: movw r0, #0 +; CHECK-NEXT: movt r0, #65408 ; CHECK-NEXT: bx lr -; CHECK-NEXT: .p2align 2 -; CHECK-NEXT: @ %bb.1: -; CHECK-NEXT: .LCPI16_0: -; CHECK-NEXT: .long 0xff800000 @ float -Inf %r = call nnan float @llvm.minnum.f32(float %x, float 0xfff0000000000000) ret float %r } @@ -253,15 +191,7 @@ define float @test_maxnum_const_neg_inf_nnan(float %x) { ; CHECK-LABEL: test_maxnum_const_neg_inf_nnan: ; CHECK: @ %bb.0: -; CHECK-NEXT: vldr s0, .LCPI17_0 -; CHECK-NEXT: vmov s2, r0 -; CHECK-NEXT: vmaxnm.f32 s0, s2, s0 -; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: bx lr -; CHECK-NEXT: .p2align 2 -; CHECK-NEXT: @ %bb.1: -; CHECK-NEXT: .LCPI17_0: -; CHECK-NEXT: .long 0xff800000 @ float -Inf %r = call nnan float @llvm.maxnum.f32(float %x, float 0xfff0000000000000) ret float %r } @@ -269,15 +199,7 @@ define float @test_maximum_const_neg_inf_nnan(float %x) { ; CHECK-LABEL: test_maximum_const_neg_inf_nnan: ; CHECK: @ %bb.0: -; CHECK-NEXT: vldr s0, .LCPI18_0 -; CHECK-NEXT: vmov s2, r0 -; CHECK-NEXT: vmax.f32 d0, d1, d0 -; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: bx lr -; CHECK-NEXT: .p2align 2 -; CHECK-NEXT: @ %bb.1: -; CHECK-NEXT: .LCPI18_0: -; CHECK-NEXT: .long 0xff800000 @ float -Inf %r = call nnan float @llvm.maximum.f32(float %x, float 0xfff0000000000000) ret float %r } @@ -285,15 +207,9 @@ define float @test_minimum_const_neg_inf_nnan(float %x) { ; CHECK-LABEL: test_minimum_const_neg_inf_nnan: ; CHECK: @ %bb.0: -; CHECK-NEXT: vldr s0, .LCPI19_0 -; CHECK-NEXT: vmov s2, r0 -; CHECK-NEXT: vmin.f32 d0, d1, d0 -; CHECK-NEXT: vmov r0, s0 +; CHECK-NEXT: movw r0, #0 +; CHECK-NEXT: movt r0, #65408 ; CHECK-NEXT: bx lr -; CHECK-NEXT: .p2align 2 -; CHECK-NEXT: @ %bb.1: -; CHECK-NEXT: .LCPI19_0: -; CHECK-NEXT: .long 0xff800000 @ float -Inf %r = call nnan float @llvm.minimum.f32(float %x, float 0xfff0000000000000) ret float %r } @@ -445,15 +361,9 @@ define float @test_maxnum_const_max_ninf(float %x) { ; CHECK-LABEL: test_maxnum_const_max_ninf: ; CHECK: @ %bb.0: -; CHECK-NEXT: vldr s0, .LCPI29_0 -; CHECK-NEXT: vmov s2, r0 -; CHECK-NEXT: vmaxnm.f32 s0, s2, s0 -; CHECK-NEXT: vmov r0, s0 +; CHECK-NEXT: movw r0, #65535 +; CHECK-NEXT: movt r0, #32639 ; CHECK-NEXT: bx lr -; CHECK-NEXT: .p2align 2 -; CHECK-NEXT: @ %bb.1: -; CHECK-NEXT: .LCPI29_0: -; CHECK-NEXT: .long 0x7f7fffff @ float 3.40282347E+38 %r = call ninf float @llvm.maxnum.f32(float %x, float 0x47efffffe0000000) ret float %r } @@ -477,15 +387,7 @@ define float @test_minimum_const_max_ninf(float %x) { ; CHECK-LABEL: test_minimum_const_max_ninf: ; CHECK: @ %bb.0: -; CHECK-NEXT: vldr s0, .LCPI31_0 -; CHECK-NEXT: vmov s2, r0 -; CHECK-NEXT: vmin.f32 d0, d1, d0 -; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: bx lr -; CHECK-NEXT: .p2align 2 -; CHECK-NEXT: @ %bb.1: -; CHECK-NEXT: .LCPI31_0: -; CHECK-NEXT: .long 0x7f7fffff @ float 3.40282347E+38 %r = call ninf float @llvm.minimum.f32(float %x, float 0x47efffffe0000000) ret float %r } @@ -509,15 +411,8 @@ define float @test_maxnum_const_neg_max_ninf(float %x) { ; CHECK-LABEL: test_maxnum_const_neg_max_ninf: ; CHECK: @ %bb.0: -; CHECK-NEXT: vldr s0, .LCPI33_0 -; CHECK-NEXT: vmov s2, r0 -; CHECK-NEXT: vmaxnm.f32 s0, s2, s0 -; CHECK-NEXT: vmov r0, s0 +; CHECK-NEXT: mvn r0, #8388608 ; CHECK-NEXT: bx lr -; CHECK-NEXT: .p2align 2 -; CHECK-NEXT: @ %bb.1: -; CHECK-NEXT: .LCPI33_0: -; CHECK-NEXT: .long 0xff7fffff @ float -3.40282347E+38 %r = call ninf float @llvm.maxnum.f32(float %x, float 0xc7efffffe0000000) ret float %r } @@ -541,15 +436,7 @@ define float @test_minimum_const_neg_max_ninf(float %x) { ; CHECK-LABEL: test_minimum_const_neg_max_ninf: ; CHECK: @ %bb.0: -; CHECK-NEXT: vldr s0, .LCPI35_0 -; CHECK-NEXT: vmov s2, r0 -; CHECK-NEXT: vmin.f32 d0, d1, d0 -; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: bx lr -; CHECK-NEXT: .p2align 2 -; CHECK-NEXT: @ %bb.1: -; CHECK-NEXT: .LCPI35_0: -; CHECK-NEXT: .long 0xff7fffff @ float -3.40282347E+38 %r = call ninf float @llvm.minimum.f32(float %x, float 0xc7efffffe0000000) ret float %r } @@ -557,15 +444,7 @@ define float @test_minnum_const_max_nnan_ninf(float %x) { ; CHECK-LABEL: test_minnum_const_max_nnan_ninf: ; CHECK: @ %bb.0: -; CHECK-NEXT: vldr s0, .LCPI36_0 -; CHECK-NEXT: vmov s2, r0 -; CHECK-NEXT: vminnm.f32 s0, s2, s0 -; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: bx lr -; CHECK-NEXT: .p2align 2 -; CHECK-NEXT: @ %bb.1: -; CHECK-NEXT: .LCPI36_0: -; CHECK-NEXT: .long 0x7f7fffff @ float 3.40282347E+38 %r = call nnan ninf float @llvm.minnum.f32(float %x, float 0x47efffffe0000000) ret float %r } @@ -573,15 +452,9 @@ define float @test_maxnum_const_max_nnan_ninf(float %x) { ; CHECK-LABEL: test_maxnum_const_max_nnan_ninf: ; CHECK: @ %bb.0: -; CHECK-NEXT: vldr s0, .LCPI37_0 -; CHECK-NEXT: vmov s2, r0 -; CHECK-NEXT: vmaxnm.f32 s0, s2, s0 -; CHECK-NEXT: vmov r0, s0 +; CHECK-NEXT: movw r0, #65535 +; CHECK-NEXT: movt r0, #32639 ; CHECK-NEXT: bx lr -; CHECK-NEXT: .p2align 2 -; CHECK-NEXT: @ %bb.1: -; CHECK-NEXT: .LCPI37_0: -; CHECK-NEXT: .long 0x7f7fffff @ float 3.40282347E+38 %r = call nnan ninf float @llvm.maxnum.f32(float %x, float 0x47efffffe0000000) ret float %r } @@ -589,15 +462,9 @@ define float @test_maximum_const_max_nnan_ninf(float %x) { ; CHECK-LABEL: test_maximum_const_max_nnan_ninf: ; CHECK: @ %bb.0: -; CHECK-NEXT: vldr s0, .LCPI38_0 -; CHECK-NEXT: vmov s2, r0 -; CHECK-NEXT: vmax.f32 d0, d1, d0 -; CHECK-NEXT: vmov r0, s0 +; CHECK-NEXT: movw r0, #65535 +; CHECK-NEXT: movt r0, #32639 ; CHECK-NEXT: bx lr -; CHECK-NEXT: .p2align 2 -; CHECK-NEXT: @ %bb.1: -; CHECK-NEXT: .LCPI38_0: -; CHECK-NEXT: .long 0x7f7fffff @ float 3.40282347E+38 %r = call nnan ninf float @llvm.maximum.f32(float %x, float 0x47efffffe0000000) ret float %r } @@ -605,15 +472,7 @@ define float @test_minimum_const_max_nnan_ninf(float %x) { ; CHECK-LABEL: test_minimum_const_max_nnan_ninf: ; CHECK: @ %bb.0: -; CHECK-NEXT: vldr s0, .LCPI39_0 -; CHECK-NEXT: vmov s2, r0 -; CHECK-NEXT: vmin.f32 d0, d1, d0 -; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: bx lr -; CHECK-NEXT: .p2align 2 -; CHECK-NEXT: @ %bb.1: -; CHECK-NEXT: .LCPI39_0: -; CHECK-NEXT: .long 0x7f7fffff @ float 3.40282347E+38 %r = call nnan ninf float @llvm.minimum.f32(float %x, float 0x47efffffe0000000) ret float %r } @@ -621,15 +480,7 @@ define float @test_minnum_const_neg_max_nnan_ninf(float %x) { ; CHECK-LABEL: test_minnum_const_neg_max_nnan_ninf: ; CHECK: @ %bb.0: -; CHECK-NEXT: vldr s0, .LCPI40_0 -; CHECK-NEXT: vmov s2, r0 -; CHECK-NEXT: vminnm.f32 s0, s2, s0 -; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: bx lr -; CHECK-NEXT: .p2align 2 -; CHECK-NEXT: @ %bb.1: -; CHECK-NEXT: .LCPI40_0: -; CHECK-NEXT: .long 0xff7fffff @ float -3.40282347E+38 %r = call nnan ninf float @llvm.minnum.f32(float %x, float 0xc7efffffe0000000) ret float %r } @@ -637,15 +488,8 @@ define float @test_maxnum_const_neg_max_nnan_ninf(float %x) { ; CHECK-LABEL: test_maxnum_const_neg_max_nnan_ninf: ; CHECK: @ %bb.0: -; CHECK-NEXT: vldr s0, .LCPI41_0 -; CHECK-NEXT: vmov s2, r0 -; CHECK-NEXT: vmaxnm.f32 s0, s2, s0 -; CHECK-NEXT: vmov r0, s0 +; CHECK-NEXT: mvn r0, #8388608 ; CHECK-NEXT: bx lr -; CHECK-NEXT: .p2align 2 -; CHECK-NEXT: @ %bb.1: -; CHECK-NEXT: .LCPI41_0: -; CHECK-NEXT: .long 0xff7fffff @ float -3.40282347E+38 %r = call nnan ninf float @llvm.maxnum.f32(float %x, float 0xc7efffffe0000000) ret float %r } @@ -653,15 +497,8 @@ define float @test_maximum_const_neg_max_nnan_ninf(float %x) { ; CHECK-LABEL: test_maximum_const_neg_max_nnan_ninf: ; CHECK: @ %bb.0: -; CHECK-NEXT: vldr s0, .LCPI42_0 -; CHECK-NEXT: vmov s2, r0 -; CHECK-NEXT: vmax.f32 d0, d1, d0 -; CHECK-NEXT: vmov r0, s0 +; CHECK-NEXT: mvn r0, #8388608 ; CHECK-NEXT: bx lr -; CHECK-NEXT: .p2align 2 -; CHECK-NEXT: @ %bb.1: -; CHECK-NEXT: .LCPI42_0: -; CHECK-NEXT: .long 0xff7fffff @ float -3.40282347E+38 %r = call nnan ninf float @llvm.maximum.f32(float %x, float 0xc7efffffe0000000) ret float %r } @@ -669,15 +506,7 @@ define float @test_minimum_const_neg_max_nnan_ninf(float %x) { ; CHECK-LABEL: test_minimum_const_neg_max_nnan_ninf: ; CHECK: @ %bb.0: -; CHECK-NEXT: vldr s0, .LCPI43_0 -; CHECK-NEXT: vmov s2, r0 -; CHECK-NEXT: vmin.f32 d0, d1, d0 -; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: bx lr -; CHECK-NEXT: .p2align 2 -; CHECK-NEXT: @ %bb.1: -; CHECK-NEXT: .LCPI43_0: -; CHECK-NEXT: .long 0xff7fffff @ float -3.40282347E+38 %r = call nnan ninf float @llvm.minimum.f32(float %x, float 0xc7efffffe0000000) ret float %r }