diff --git a/clang/test/CodeGen/builtins-wasm.c b/clang/test/CodeGen/builtins-wasm.c --- a/clang/test/CodeGen/builtins-wasm.c +++ b/clang/test/CodeGen/builtins-wasm.c @@ -384,26 +384,20 @@ i8x16 abs_i8x16(i8x16 v) { return __builtin_wasm_abs_i8x16(v); - // WEBASSEMBLY: %neg = sub <16 x i8> zeroinitializer, %v - // WEBASSEMBLY: %abscond = icmp slt <16 x i8> %v, zeroinitializer - // WEBASSEMBLY: %abs = select <16 x i1> %abscond, <16 x i8> %neg, <16 x i8> %v - // WEBASSEMBLY: ret <16 x i8> %abs + // WEBASSEMBLY: call <16 x i8> @llvm.abs.v16i8(<16 x i8> %v, i1 false) + // WEBASSEMBLY-NEXT: ret } i16x8 abs_i16x8(i16x8 v) { return __builtin_wasm_abs_i16x8(v); - // WEBASSEMBLY: %neg = sub <8 x i16> zeroinitializer, %v - // WEBASSEMBLY: %abscond = icmp slt <8 x i16> %v, zeroinitializer - // WEBASSEMBLY: %abs = select <8 x i1> %abscond, <8 x i16> %neg, <8 x i16> %v - // WEBASSEMBLY: ret <8 x i16> %abs + // WEBASSEMBLY: call <8 x i16> @llvm.abs.v8i16(<8 x i16> %v, i1 false) + // WEBASSEMBLY-NEXT: ret } i32x4 abs_i32x4(i32x4 v) { return __builtin_wasm_abs_i32x4(v); - // WEBASSEMBLY: %neg = sub <4 x i32> zeroinitializer, %v - // WEBASSEMBLY: %abscond = icmp slt <4 x i32> %v, zeroinitializer - // WEBASSEMBLY: %abs = select <4 x i1> %abscond, <4 x i32> %neg, <4 x i32> %v - // WEBASSEMBLY: ret <4 x i32> %abs + // WEBASSEMBLY: call <4 x i32> @llvm.abs.v4i32(<4 x i32> %v, i1 false) + // WEBASSEMBLY-NEXT: ret } i8x16 min_s_i8x16(i8x16 x, i8x16 y) { diff --git a/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp b/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp --- a/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp +++ b/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp @@ -1047,89 +1047,28 @@ return &Sel; } -/// There are many select variants for each of ABS/NABS. -/// In matchSelectPattern(), there are different compare constants, compare -/// predicates/operands and select operands. -/// In isKnownNegation(), there are different formats of negated operands. -/// Canonicalize all these variants to 1 pattern. -/// This makes CSE more likely. static Instruction *canonicalizeAbsNabs(SelectInst &Sel, ICmpInst &Cmp, InstCombinerImpl &IC) { if (!Cmp.hasOneUse() || !isa(Cmp.getOperand(1))) return nullptr; - // Choose a sign-bit check for the compare (likely simpler for codegen). - // ABS: (X hasOneUse() || (RHS->hasNUses(2) && CmpUsesNegatedOp))) - return nullptr; + bool IntMinIsPoison = match(RHS, m_NSWNeg(m_Specific(LHS))); + Constant *IntMinIsPoisonC = + ConstantInt::get(Type::getInt1Ty(Sel.getContext()), IntMinIsPoison); + Instruction *Abs = + IC.Builder.CreateBinaryIntrinsic(Intrinsic::abs, LHS, IntMinIsPoisonC); - // Create the canonical compare: icmp slt LHS 0. - if (!CmpCanonicalized) { - Cmp.setPredicate(ICmpInst::ICMP_SLT); - Cmp.setOperand(1, ConstantInt::getNullValue(Cmp.getOperand(0)->getType())); - if (CmpUsesNegatedOp) - Cmp.setOperand(0, LHS); - } - - // Create the canonical RHS: RHS = sub (0, LHS). - if (!RHSCanonicalized) { - assert(RHS->hasOneUse() && "RHS use number is not right"); - RHS = IC.Builder.CreateNeg(LHS); - if (TVal == LHS) { - // Replace false value. - IC.replaceOperand(Sel, 2, RHS); - FVal = RHS; - } else { - // Replace true value. - IC.replaceOperand(Sel, 1, RHS); - TVal = RHS; - } - } + if (SPF == SelectPatternFlavor::SPF_NABS) + return IntMinIsPoison ? BinaryOperator::CreateNSWNeg(Abs) + : BinaryOperator::CreateNeg(Abs); - // If the select operands do not change, we're done. - if (SPF == SelectPatternFlavor::SPF_NABS) { - if (TVal == LHS) - return &Sel; - assert(FVal == LHS && "Unexpected results from matchSelectPattern"); - } else { - if (FVal == LHS) - return &Sel; - assert(TVal == LHS && "Unexpected results from matchSelectPattern"); - } - - // We are swapping the select operands, so swap the metadata too. - Sel.swapValues(); - Sel.swapProfMetadata(); - return &Sel; + return IC.replaceInstUsesWith(Sel, Abs); } /// If we have a select with an equality comparison, then we know the value in diff --git a/llvm/test/Transforms/InstCombine/abs-1.ll b/llvm/test/Transforms/InstCombine/abs-1.ll --- a/llvm/test/Transforms/InstCombine/abs-1.ll +++ b/llvm/test/Transforms/InstCombine/abs-1.ll @@ -12,10 +12,8 @@ define i32 @test_abs(i32 %x) { ; CHECK-LABEL: @test_abs( -; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[NEG:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[NEG]], i32 [[X]] -; CHECK-NEXT: ret i32 [[TMP2]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: ret i32 [[TMP1]] ; %ret = call i32 @abs(i32 %x) ret i32 %ret @@ -23,10 +21,8 @@ define i64 @test_labs(i64 %x) { ; CHECK-LABEL: @test_labs( -; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i64 [[X:%.*]], 0 -; CHECK-NEXT: [[NEG:%.*]] = sub nsw i64 0, [[X]] -; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i64 [[NEG]], i64 [[X]] -; CHECK-NEXT: ret i64 [[TMP2]] +; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.abs.i64(i64 [[X:%.*]], i1 true) +; CHECK-NEXT: ret i64 [[TMP1]] ; %ret = call i64 @labs(i64 %x) ret i64 %ret @@ -34,10 +30,8 @@ define i64 @test_llabs(i64 %x) { ; CHECK-LABEL: @test_llabs( -; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i64 [[X:%.*]], 0 -; CHECK-NEXT: [[NEG:%.*]] = sub nsw i64 0, [[X]] -; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i64 [[NEG]], i64 [[X]] -; CHECK-NEXT: ret i64 [[TMP2]] +; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.abs.i64(i64 [[X:%.*]], i1 true) +; CHECK-NEXT: ret i64 [[TMP1]] ; %ret = call i64 @llabs(i64 %x) ret i64 %ret @@ -47,10 +41,8 @@ define i8 @abs_canonical_1(i8 %x) { ; CHECK-LABEL: @abs_canonical_1( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[X:%.*]], 0 -; CHECK-NEXT: [[NEG:%.*]] = sub i8 0, [[X]] -; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP]], i8 [[NEG]], i8 [[X]] -; CHECK-NEXT: ret i8 [[ABS]] +; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[X:%.*]], i1 false) +; CHECK-NEXT: ret i8 [[TMP1]] ; %cmp = icmp sgt i8 %x, 0 %neg = sub i8 0, %x @@ -62,10 +54,8 @@ define <2 x i8> @abs_canonical_2(<2 x i8> %x) { ; CHECK-LABEL: @abs_canonical_2( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i8> [[X:%.*]], zeroinitializer -; CHECK-NEXT: [[NEG:%.*]] = sub <2 x i8> zeroinitializer, [[X]] -; CHECK-NEXT: [[ABS:%.*]] = select <2 x i1> [[CMP]], <2 x i8> [[NEG]], <2 x i8> [[X]] -; CHECK-NEXT: ret <2 x i8> [[ABS]] +; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i8> @llvm.abs.v2i8(<2 x i8> [[X:%.*]], i1 false) +; CHECK-NEXT: ret <2 x i8> [[TMP1]] ; %cmp = icmp sgt <2 x i8> %x, %neg = sub <2 x i8> zeroinitializer, %x @@ -77,10 +67,8 @@ define <2 x i8> @abs_canonical_2_vec_undef_elts(<2 x i8> %x) { ; CHECK-LABEL: @abs_canonical_2_vec_undef_elts( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i8> [[X:%.*]], zeroinitializer -; CHECK-NEXT: [[NEG:%.*]] = sub <2 x i8> zeroinitializer, [[X]] -; CHECK-NEXT: [[ABS:%.*]] = select <2 x i1> [[CMP]], <2 x i8> [[NEG]], <2 x i8> [[X]] -; CHECK-NEXT: ret <2 x i8> [[ABS]] +; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i8> @llvm.abs.v2i8(<2 x i8> [[X:%.*]], i1 false) +; CHECK-NEXT: ret <2 x i8> [[TMP1]] ; %cmp = icmp sgt <2 x i8> %x, %neg = sub <2 x i8> zeroinitializer, %x @@ -92,10 +80,8 @@ define i8 @abs_canonical_3(i8 %x) { ; CHECK-LABEL: @abs_canonical_3( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[X:%.*]], 0 -; CHECK-NEXT: [[NEG:%.*]] = sub nsw i8 0, [[X]] -; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP]], i8 [[NEG]], i8 [[X]] -; CHECK-NEXT: ret i8 [[ABS]] +; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[X:%.*]], i1 true) +; CHECK-NEXT: ret i8 [[TMP1]] ; %cmp = icmp slt i8 %x, 0 %neg = sub nsw i8 0, %x @@ -105,10 +91,8 @@ define i8 @abs_canonical_4(i8 %x) { ; CHECK-LABEL: @abs_canonical_4( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[X:%.*]], 0 -; CHECK-NEXT: [[NEG:%.*]] = sub i8 0, [[X]] -; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP]], i8 [[NEG]], i8 [[X]] -; CHECK-NEXT: ret i8 [[ABS]] +; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[X:%.*]], i1 false) +; CHECK-NEXT: ret i8 [[TMP1]] ; %cmp = icmp slt i8 %x, 1 %neg = sub i8 0, %x @@ -118,11 +102,9 @@ define i32 @abs_canonical_5(i8 %x) { ; CHECK-LABEL: @abs_canonical_5( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[X:%.*]], 0 -; CHECK-NEXT: [[CONV:%.*]] = sext i8 [[X]] to i32 -; CHECK-NEXT: [[NEG:%.*]] = sub nsw i32 0, [[CONV]] -; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP]], i32 [[NEG]], i32 [[CONV]] -; CHECK-NEXT: ret i32 [[ABS]] +; CHECK-NEXT: [[CONV:%.*]] = sext i8 [[X:%.*]] to i32 +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[CONV]], i1 true) +; CHECK-NEXT: ret i32 [[TMP1]] ; %cmp = icmp sgt i8 %x, 0 %conv = sext i8 %x to i32 @@ -134,10 +116,8 @@ define i32 @abs_canonical_6(i32 %a, i32 %b) { ; CHECK-LABEL: @abs_canonical_6( ; CHECK-NEXT: [[T1:%.*]] = sub i32 [[A:%.*]], [[B:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[T1]], 0 -; CHECK-NEXT: [[TMP1:%.*]] = sub i32 0, [[T1]] -; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP]], i32 [[TMP1]], i32 [[T1]] -; CHECK-NEXT: ret i32 [[ABS]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[T1]], i1 false) +; CHECK-NEXT: ret i32 [[TMP1]] ; %t1 = sub i32 %a, %b %cmp = icmp sgt i32 %t1, -1 @@ -149,10 +129,8 @@ define <2 x i8> @abs_canonical_7(<2 x i8> %a, <2 x i8 > %b) { ; CHECK-LABEL: @abs_canonical_7( ; CHECK-NEXT: [[T1:%.*]] = sub <2 x i8> [[A:%.*]], [[B:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i8> [[T1]], zeroinitializer -; CHECK-NEXT: [[TMP1:%.*]] = sub <2 x i8> zeroinitializer, [[T1]] -; CHECK-NEXT: [[ABS:%.*]] = select <2 x i1> [[CMP]], <2 x i8> [[TMP1]], <2 x i8> [[T1]] -; CHECK-NEXT: ret <2 x i8> [[ABS]] +; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i8> @llvm.abs.v2i8(<2 x i8> [[T1]], i1 false) +; CHECK-NEXT: ret <2 x i8> [[TMP1]] ; %t1 = sub <2 x i8> %a, %b @@ -164,10 +142,8 @@ define i32 @abs_canonical_8(i32 %a) { ; CHECK-LABEL: @abs_canonical_8( -; CHECK-NEXT: [[T:%.*]] = sub i32 0, [[A:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[A]], 0 -; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP]], i32 [[T]], i32 [[A]] -; CHECK-NEXT: ret i32 [[ABS]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[A:%.*]], i1 false) +; CHECK-NEXT: ret i32 [[TMP1]] ; %t = sub i32 0, %a %cmp = icmp slt i32 %t, 0 @@ -178,10 +154,9 @@ define i32 @abs_canonical_9(i32 %a, i32 %b) { ; CHECK-LABEL: @abs_canonical_9( ; CHECK-NEXT: [[T1:%.*]] = sub i32 [[A:%.*]], [[B:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[T1]], -1 ; CHECK-NEXT: [[T2:%.*]] = sub i32 [[B]], [[A]] -; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP]], i32 [[T1]], i32 [[T2]] -; CHECK-NEXT: [[ADD:%.*]] = add i32 [[ABS]], [[T2]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[T1]], i1 false) +; CHECK-NEXT: [[ADD:%.*]] = add i32 [[TMP1]], [[T2]] ; CHECK-NEXT: ret i32 [[ADD]] ; %t1 = sub i32 %a, %b @@ -195,10 +170,8 @@ define i32 @abs_canonical_10(i32 %a, i32 %b) { ; CHECK-LABEL: @abs_canonical_10( ; CHECK-NEXT: [[T1:%.*]] = sub i32 [[A:%.*]], [[B:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[T1]], 0 -; CHECK-NEXT: [[TMP1:%.*]] = sub i32 0, [[T1]] -; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP]], i32 [[TMP1]], i32 [[T1]] -; CHECK-NEXT: ret i32 [[ABS]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[T1]], i1 false) +; CHECK-NEXT: ret i32 [[TMP1]] ; %t2 = sub i32 %b, %a %t1 = sub i32 %a, %b @@ -211,9 +184,8 @@ define i8 @nabs_canonical_1(i8 %x) { ; CHECK-LABEL: @nabs_canonical_1( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[X:%.*]], 0 -; CHECK-NEXT: [[NEG:%.*]] = sub i8 0, [[X]] -; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP]], i8 [[X]], i8 [[NEG]] +; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[X:%.*]], i1 false) +; CHECK-NEXT: [[ABS:%.*]] = sub i8 0, [[TMP1]] ; CHECK-NEXT: ret i8 [[ABS]] ; %cmp = icmp sgt i8 %x, 0 @@ -226,9 +198,8 @@ define <2 x i8> @nabs_canonical_2(<2 x i8> %x) { ; CHECK-LABEL: @nabs_canonical_2( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i8> [[X:%.*]], zeroinitializer -; CHECK-NEXT: [[NEG:%.*]] = sub <2 x i8> zeroinitializer, [[X]] -; CHECK-NEXT: [[ABS:%.*]] = select <2 x i1> [[CMP]], <2 x i8> [[X]], <2 x i8> [[NEG]] +; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i8> @llvm.abs.v2i8(<2 x i8> [[X:%.*]], i1 false) +; CHECK-NEXT: [[ABS:%.*]] = sub <2 x i8> zeroinitializer, [[TMP1]] ; CHECK-NEXT: ret <2 x i8> [[ABS]] ; %cmp = icmp sgt <2 x i8> %x, @@ -241,9 +212,8 @@ define <2 x i8> @nabs_canonical_2_vec_undef_elts(<2 x i8> %x) { ; CHECK-LABEL: @nabs_canonical_2_vec_undef_elts( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i8> [[X:%.*]], zeroinitializer -; CHECK-NEXT: [[NEG:%.*]] = sub <2 x i8> zeroinitializer, [[X]] -; CHECK-NEXT: [[ABS:%.*]] = select <2 x i1> [[CMP]], <2 x i8> [[X]], <2 x i8> [[NEG]] +; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i8> @llvm.abs.v2i8(<2 x i8> [[X:%.*]], i1 false) +; CHECK-NEXT: [[ABS:%.*]] = sub <2 x i8> zeroinitializer, [[TMP1]] ; CHECK-NEXT: ret <2 x i8> [[ABS]] ; %cmp = icmp sgt <2 x i8> %x, @@ -256,9 +226,8 @@ define i8 @nabs_canonical_3(i8 %x) { ; CHECK-LABEL: @nabs_canonical_3( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[X:%.*]], 0 -; CHECK-NEXT: [[NEG:%.*]] = sub nsw i8 0, [[X]] -; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP]], i8 [[X]], i8 [[NEG]] +; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[X:%.*]], i1 true) +; CHECK-NEXT: [[ABS:%.*]] = sub nsw i8 0, [[TMP1]] ; CHECK-NEXT: ret i8 [[ABS]] ; %cmp = icmp slt i8 %x, 0 @@ -269,9 +238,8 @@ define i8 @nabs_canonical_4(i8 %x) { ; CHECK-LABEL: @nabs_canonical_4( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[X:%.*]], 0 -; CHECK-NEXT: [[NEG:%.*]] = sub i8 0, [[X]] -; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP]], i8 [[X]], i8 [[NEG]] +; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[X:%.*]], i1 false) +; CHECK-NEXT: [[ABS:%.*]] = sub i8 0, [[TMP1]] ; CHECK-NEXT: ret i8 [[ABS]] ; %cmp = icmp slt i8 %x, 1 @@ -282,10 +250,9 @@ define i32 @nabs_canonical_5(i8 %x) { ; CHECK-LABEL: @nabs_canonical_5( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[X:%.*]], 0 -; CHECK-NEXT: [[CONV:%.*]] = sext i8 [[X]] to i32 -; CHECK-NEXT: [[NEG:%.*]] = sub nsw i32 0, [[CONV]] -; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP]], i32 [[CONV]], i32 [[NEG]] +; CHECK-NEXT: [[CONV:%.*]] = sext i8 [[X:%.*]] to i32 +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[CONV]], i1 true) +; CHECK-NEXT: [[ABS:%.*]] = sub nsw i32 0, [[TMP1]] ; CHECK-NEXT: ret i32 [[ABS]] ; %cmp = icmp sgt i8 %x, 0 @@ -298,9 +265,8 @@ define i32 @nabs_canonical_6(i32 %a, i32 %b) { ; CHECK-LABEL: @nabs_canonical_6( ; CHECK-NEXT: [[T1:%.*]] = sub i32 [[A:%.*]], [[B:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[T1]], 0 -; CHECK-NEXT: [[TMP1:%.*]] = sub i32 0, [[T1]] -; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP]], i32 [[T1]], i32 [[TMP1]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[T1]], i1 false) +; CHECK-NEXT: [[ABS:%.*]] = sub i32 0, [[TMP1]] ; CHECK-NEXT: ret i32 [[ABS]] ; %t1 = sub i32 %a, %b @@ -313,9 +279,8 @@ define <2 x i8> @nabs_canonical_7(<2 x i8> %a, <2 x i8 > %b) { ; CHECK-LABEL: @nabs_canonical_7( ; CHECK-NEXT: [[T1:%.*]] = sub <2 x i8> [[A:%.*]], [[B:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i8> [[T1]], zeroinitializer -; CHECK-NEXT: [[TMP1:%.*]] = sub <2 x i8> zeroinitializer, [[T1]] -; CHECK-NEXT: [[ABS:%.*]] = select <2 x i1> [[CMP]], <2 x i8> [[T1]], <2 x i8> [[TMP1]] +; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i8> @llvm.abs.v2i8(<2 x i8> [[T1]], i1 false) +; CHECK-NEXT: [[ABS:%.*]] = sub <2 x i8> zeroinitializer, [[TMP1]] ; CHECK-NEXT: ret <2 x i8> [[ABS]] ; %t1 = sub <2 x i8> %a, %b @@ -327,9 +292,8 @@ define i32 @nabs_canonical_8(i32 %a) { ; CHECK-LABEL: @nabs_canonical_8( -; CHECK-NEXT: [[T:%.*]] = sub i32 0, [[A:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[A]], 0 -; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP]], i32 [[A]], i32 [[T]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[A:%.*]], i1 false) +; CHECK-NEXT: [[ABS:%.*]] = sub i32 0, [[TMP1]] ; CHECK-NEXT: ret i32 [[ABS]] ; %t = sub i32 0, %a @@ -341,10 +305,9 @@ define i32 @nabs_canonical_9(i32 %a, i32 %b) { ; CHECK-LABEL: @nabs_canonical_9( ; CHECK-NEXT: [[T1:%.*]] = sub i32 [[A:%.*]], [[B:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[T1]], -1 ; CHECK-NEXT: [[T2:%.*]] = sub i32 [[B]], [[A]] -; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP]], i32 [[T2]], i32 [[T1]] -; CHECK-NEXT: [[ADD:%.*]] = add i32 [[T2]], [[ABS]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[T1]], i1 false) +; CHECK-NEXT: [[ADD:%.*]] = sub i32 [[T2]], [[TMP1]] ; CHECK-NEXT: ret i32 [[ADD]] ; %t1 = sub i32 %a, %b @@ -358,9 +321,8 @@ define i32 @nabs_canonical_10(i32 %a, i32 %b) { ; CHECK-LABEL: @nabs_canonical_10( ; CHECK-NEXT: [[T1:%.*]] = sub i32 [[A:%.*]], [[B:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[T1]], 0 -; CHECK-NEXT: [[TMP1:%.*]] = sub i32 0, [[T1]] -; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP]], i32 [[T1]], i32 [[TMP1]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[T1]], i1 false) +; CHECK-NEXT: [[ABS:%.*]] = sub i32 0, [[TMP1]] ; CHECK-NEXT: ret i32 [[ABS]] ; %t2 = sub i32 %b, %a @@ -376,10 +338,8 @@ define i8 @shifty_abs_commute0(i8 %x) { ; CHECK-LABEL: @shifty_abs_commute0( -; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i8 [[X:%.*]], 0 -; CHECK-NEXT: [[TMP2:%.*]] = sub i8 0, [[X]] -; CHECK-NEXT: [[ABS:%.*]] = select i1 [[TMP1]], i8 [[TMP2]], i8 [[X]] -; CHECK-NEXT: ret i8 [[ABS]] +; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[X:%.*]], i1 false) +; CHECK-NEXT: ret i8 [[TMP1]] ; %signbit = ashr i8 %x, 7 %add = add i8 %signbit, %x @@ -389,10 +349,8 @@ define i8 @shifty_abs_commute0_nsw(i8 %x) { ; CHECK-LABEL: @shifty_abs_commute0_nsw( -; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i8 [[X:%.*]], 0 -; CHECK-NEXT: [[TMP2:%.*]] = sub nsw i8 0, [[X]] -; CHECK-NEXT: [[ABS:%.*]] = select i1 [[TMP1]], i8 [[TMP2]], i8 [[X]] -; CHECK-NEXT: ret i8 [[ABS]] +; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[X:%.*]], i1 true) +; CHECK-NEXT: ret i8 [[TMP1]] ; %signbit = ashr i8 %x, 7 %add = add nsw i8 %signbit, %x @@ -417,10 +375,8 @@ define <2 x i8> @shifty_abs_commute1(<2 x i8> %x) { ; CHECK-LABEL: @shifty_abs_commute1( -; CHECK-NEXT: [[TMP1:%.*]] = icmp slt <2 x i8> [[X:%.*]], zeroinitializer -; CHECK-NEXT: [[TMP2:%.*]] = sub <2 x i8> zeroinitializer, [[X]] -; CHECK-NEXT: [[ABS:%.*]] = select <2 x i1> [[TMP1]], <2 x i8> [[TMP2]], <2 x i8> [[X]] -; CHECK-NEXT: ret <2 x i8> [[ABS]] +; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i8> @llvm.abs.v2i8(<2 x i8> [[X:%.*]], i1 false) +; CHECK-NEXT: ret <2 x i8> [[TMP1]] ; %signbit = ashr <2 x i8> %x, %add = add <2 x i8> %signbit, %x @@ -431,10 +387,8 @@ define <2 x i8> @shifty_abs_commute2(<2 x i8> %x) { ; CHECK-LABEL: @shifty_abs_commute2( ; CHECK-NEXT: [[Y:%.*]] = mul <2 x i8> [[X:%.*]], -; CHECK-NEXT: [[TMP1:%.*]] = icmp slt <2 x i8> [[Y]], zeroinitializer -; CHECK-NEXT: [[TMP2:%.*]] = sub <2 x i8> zeroinitializer, [[Y]] -; CHECK-NEXT: [[ABS:%.*]] = select <2 x i1> [[TMP1]], <2 x i8> [[TMP2]], <2 x i8> [[Y]] -; CHECK-NEXT: ret <2 x i8> [[ABS]] +; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i8> @llvm.abs.v2i8(<2 x i8> [[Y]], i1 false) +; CHECK-NEXT: ret <2 x i8> [[TMP1]] ; %y = mul <2 x i8> %x, ; extra op to thwart complexity-based canonicalization %signbit = ashr <2 x i8> %y, @@ -446,10 +400,8 @@ define i8 @shifty_abs_commute3(i8 %x) { ; CHECK-LABEL: @shifty_abs_commute3( ; CHECK-NEXT: [[Y:%.*]] = mul i8 [[X:%.*]], 3 -; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i8 [[Y]], 0 -; CHECK-NEXT: [[TMP2:%.*]] = sub i8 0, [[Y]] -; CHECK-NEXT: [[ABS:%.*]] = select i1 [[TMP1]], i8 [[TMP2]], i8 [[Y]] -; CHECK-NEXT: ret i8 [[ABS]] +; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[Y]], i1 false) +; CHECK-NEXT: ret i8 [[TMP1]] ; %y = mul i8 %x, 3 ; extra op to thwart complexity-based canonicalization %signbit = ashr i8 %y, 7 @@ -483,10 +435,8 @@ define i8 @shifty_sub(i8 %x) { ; CHECK-LABEL: @shifty_sub( -; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i8 [[X:%.*]], 0 -; CHECK-NEXT: [[TMP2:%.*]] = sub i8 0, [[X]] -; CHECK-NEXT: [[R:%.*]] = select i1 [[TMP1]], i8 [[TMP2]], i8 [[X]] -; CHECK-NEXT: ret i8 [[R]] +; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[X:%.*]], i1 false) +; CHECK-NEXT: ret i8 [[TMP1]] ; %sh = ashr i8 %x, 7 %xor = xor i8 %x, %sh @@ -496,10 +446,8 @@ define i8 @shifty_sub_nsw_commute(i8 %x) { ; CHECK-LABEL: @shifty_sub_nsw_commute( -; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i8 [[X:%.*]], 0 -; CHECK-NEXT: [[TMP2:%.*]] = sub nsw i8 0, [[X]] -; CHECK-NEXT: [[R:%.*]] = select i1 [[TMP1]], i8 [[TMP2]], i8 [[X]] -; CHECK-NEXT: ret i8 [[R]] +; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[X:%.*]], i1 true) +; CHECK-NEXT: ret i8 [[TMP1]] ; %sh = ashr i8 %x, 7 %xor = xor i8 %sh, %x @@ -533,10 +481,9 @@ define i8 @negate_abs(i8 %x) { ; CHECK-LABEL: @negate_abs( -; CHECK-NEXT: [[N:%.*]] = sub i8 0, [[X:%.*]] -; CHECK-NEXT: [[C:%.*]] = icmp slt i8 [[X]], 0 -; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[C]], i8 [[X]], i8 [[N]] -; CHECK-NEXT: ret i8 [[TMP1]] +; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[X:%.*]], i1 false) +; CHECK-NEXT: [[R:%.*]] = sub i8 0, [[TMP1]] +; CHECK-NEXT: ret i8 [[R]] ; %n = sub i8 0, %x %c = icmp slt i8 %x, 0 @@ -547,9 +494,7 @@ define <2 x i8> @negate_nabs(<2 x i8> %x) { ; CHECK-LABEL: @negate_nabs( -; CHECK-NEXT: [[N:%.*]] = sub <2 x i8> zeroinitializer, [[X:%.*]] -; CHECK-NEXT: [[C:%.*]] = icmp slt <2 x i8> [[X]], zeroinitializer -; CHECK-NEXT: [[TMP1:%.*]] = select <2 x i1> [[C]], <2 x i8> [[N]], <2 x i8> [[X]] +; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i8> @llvm.abs.v2i8(<2 x i8> [[X:%.*]], i1 false) ; CHECK-NEXT: ret <2 x i8> [[TMP1]] ; %n = sub <2 x i8> zeroinitializer, %x @@ -574,9 +519,8 @@ ; CHECK-LABEL: @abs_swapped( ; CHECK-NEXT: [[NEG:%.*]] = sub i8 0, [[A:%.*]] ; CHECK-NEXT: call void @extra_use(i8 [[NEG]]) -; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i8 [[A]], 0 -; CHECK-NEXT: [[M1:%.*]] = select i1 [[CMP1]], i8 [[NEG]], i8 [[A]] -; CHECK-NEXT: ret i8 [[M1]] +; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[A]], i1 false) +; CHECK-NEXT: ret i8 [[TMP1]] ; %neg = sub i8 0, %a call void @extra_use(i8 %neg) @@ -589,8 +533,8 @@ ; CHECK-LABEL: @nabs_swapped( ; CHECK-NEXT: [[NEG:%.*]] = sub i8 0, [[A:%.*]] ; CHECK-NEXT: call void @extra_use(i8 [[NEG]]) -; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i8 [[A]], 0 -; CHECK-NEXT: [[M2:%.*]] = select i1 [[CMP2]], i8 [[A]], i8 [[NEG]] +; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[A]], i1 false) +; CHECK-NEXT: [[M2:%.*]] = sub i8 0, [[TMP1]] ; CHECK-NEXT: ret i8 [[M2]] ; %neg = sub i8 0, %a @@ -604,9 +548,8 @@ ; CHECK-LABEL: @abs_different_constants( ; CHECK-NEXT: [[NEG:%.*]] = sub i8 0, [[A:%.*]] ; CHECK-NEXT: call void @extra_use(i8 [[NEG]]) -; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i8 [[A]], 0 -; CHECK-NEXT: [[M1:%.*]] = select i1 [[CMP1]], i8 [[NEG]], i8 [[A]] -; CHECK-NEXT: ret i8 [[M1]] +; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[A]], i1 false) +; CHECK-NEXT: ret i8 [[TMP1]] ; %neg = sub i8 0, %a call void @extra_use(i8 %neg) @@ -619,8 +562,8 @@ ; CHECK-LABEL: @nabs_different_constants( ; CHECK-NEXT: [[NEG:%.*]] = sub i8 0, [[A:%.*]] ; CHECK-NEXT: call void @extra_use(i8 [[NEG]]) -; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i8 [[A]], 0 -; CHECK-NEXT: [[M2:%.*]] = select i1 [[CMP2]], i8 [[A]], i8 [[NEG]] +; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[A]], i1 false) +; CHECK-NEXT: [[M2:%.*]] = sub i8 0, [[TMP1]] ; CHECK-NEXT: ret i8 [[M2]] ; %neg = sub i8 0, %a @@ -637,10 +580,8 @@ define i64 @infinite_loop_constant_expression_abs(i64 %arg) { ; CHECK-LABEL: @infinite_loop_constant_expression_abs( ; CHECK-NEXT: [[T:%.*]] = sub i64 ptrtoint (i64* @g to i64), [[ARG:%.*]] -; CHECK-NEXT: [[T1:%.*]] = icmp slt i64 [[T]], 0 -; CHECK-NEXT: [[T2:%.*]] = sub nsw i64 0, [[T]] -; CHECK-NEXT: [[T3:%.*]] = select i1 [[T1]], i64 [[T2]], i64 [[T]] -; CHECK-NEXT: ret i64 [[T3]] +; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.abs.i64(i64 [[T]], i1 true) +; CHECK-NEXT: ret i64 [[TMP1]] ; %t = sub i64 ptrtoint (i64* @g to i64), %arg %t1 = icmp slt i64 %t, 0 @@ -666,11 +607,10 @@ define i8 @abs_extra_use_sub(i8 %x) { ; CHECK-LABEL: @abs_extra_use_sub( -; CHECK-NEXT: [[C:%.*]] = icmp slt i8 [[X:%.*]], 0 -; CHECK-NEXT: [[N:%.*]] = sub i8 0, [[X]] +; CHECK-NEXT: [[N:%.*]] = sub i8 0, [[X:%.*]] ; CHECK-NEXT: call void @extra_use(i8 [[N]]) -; CHECK-NEXT: [[S:%.*]] = select i1 [[C]], i8 [[N]], i8 [[X]] -; CHECK-NEXT: ret i8 [[S]] +; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[X]], i1 false) +; CHECK-NEXT: ret i8 [[TMP1]] ; %c = icmp slt i8 %x, 0 %n = sub i8 0, %x @@ -713,10 +653,10 @@ define i8 @nabs_extra_use_sub(i8 %x) { ; CHECK-LABEL: @nabs_extra_use_sub( -; CHECK-NEXT: [[C:%.*]] = icmp slt i8 [[X:%.*]], 0 -; CHECK-NEXT: [[N:%.*]] = sub i8 0, [[X]] +; CHECK-NEXT: [[N:%.*]] = sub i8 0, [[X:%.*]] ; CHECK-NEXT: call void @extra_use(i8 [[N]]) -; CHECK-NEXT: [[S:%.*]] = select i1 [[C]], i8 [[X]], i8 [[N]] +; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[X]], i1 false) +; CHECK-NEXT: [[S:%.*]] = sub i8 0, [[TMP1]] ; CHECK-NEXT: ret i8 [[S]] ; %c = icmp slt i8 %x, 0 diff --git a/llvm/test/Transforms/InstCombine/abs_abs.ll b/llvm/test/Transforms/InstCombine/abs_abs.ll --- a/llvm/test/Transforms/InstCombine/abs_abs.ll +++ b/llvm/test/Transforms/InstCombine/abs_abs.ll @@ -3,10 +3,8 @@ define i32 @abs_abs_x01(i32 %x) { ; CHECK-LABEL: @abs_abs_x01( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]] -; CHECK-NEXT: ret i32 [[COND]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: ret i32 [[TMP1]] ; %cmp = icmp sgt i32 %x, -1 %sub = sub nsw i32 0, %x @@ -19,10 +17,8 @@ define <2 x i32> @abs_abs_x01_vec(<2 x i32> %x) { ; CHECK-LABEL: @abs_abs_x01_vec( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[X:%.*]], zeroinitializer -; CHECK-NEXT: [[SUB:%.*]] = sub nsw <2 x i32> zeroinitializer, [[X]] -; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[SUB]], <2 x i32> [[X]] -; CHECK-NEXT: ret <2 x i32> [[COND]] +; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.abs.v2i32(<2 x i32> [[X:%.*]], i1 true) +; CHECK-NEXT: ret <2 x i32> [[TMP1]] ; %cmp = icmp sgt <2 x i32> %x, %sub = sub nsw <2 x i32> zeroinitializer, %x @@ -35,10 +31,8 @@ define i32 @abs_abs_x02(i32 %x) { ; CHECK-LABEL: @abs_abs_x02( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]] -; CHECK-NEXT: ret i32 [[COND]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: ret i32 [[TMP1]] ; %cmp = icmp sgt i32 %x, 0 %sub = sub nsw i32 0, %x @@ -51,10 +45,8 @@ define i32 @abs_abs_x03(i32 %x) { ; CHECK-LABEL: @abs_abs_x03( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]] -; CHECK-NEXT: ret i32 [[COND]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: ret i32 [[TMP1]] ; %cmp = icmp slt i32 %x, 0 %sub = sub nsw i32 0, %x @@ -67,10 +59,8 @@ define i32 @abs_abs_x04(i32 %x) { ; CHECK-LABEL: @abs_abs_x04( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]] -; CHECK-NEXT: ret i32 [[COND]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: ret i32 [[TMP1]] ; %cmp = icmp slt i32 %x, 1 %sub = sub nsw i32 0, %x @@ -83,10 +73,8 @@ define <2 x i32> @abs_abs_x04_vec(<2 x i32> %x) { ; CHECK-LABEL: @abs_abs_x04_vec( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[X:%.*]], zeroinitializer -; CHECK-NEXT: [[SUB:%.*]] = sub nsw <2 x i32> zeroinitializer, [[X]] -; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[SUB]], <2 x i32> [[X]] -; CHECK-NEXT: ret <2 x i32> [[COND]] +; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.abs.v2i32(<2 x i32> [[X:%.*]], i1 true) +; CHECK-NEXT: ret <2 x i32> [[TMP1]] ; %cmp = icmp slt <2 x i32> %x, %sub = sub nsw <2 x i32> zeroinitializer, %x @@ -99,10 +87,8 @@ define i32 @abs_abs_x05(i32 %x) { ; CHECK-LABEL: @abs_abs_x05( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]] -; CHECK-NEXT: ret i32 [[COND]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: ret i32 [[TMP1]] ; %cmp = icmp sgt i32 %x, -1 %sub = sub nsw i32 0, %x @@ -115,10 +101,8 @@ define i32 @abs_abs_x06(i32 %x) { ; CHECK-LABEL: @abs_abs_x06( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]] -; CHECK-NEXT: ret i32 [[COND]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: ret i32 [[TMP1]] ; %cmp = icmp sgt i32 %x, 0 %sub = sub nsw i32 0, %x @@ -131,10 +115,8 @@ define i32 @abs_abs_x07(i32 %x) { ; CHECK-LABEL: @abs_abs_x07( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]] -; CHECK-NEXT: ret i32 [[COND]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: ret i32 [[TMP1]] ; %cmp = icmp slt i32 %x, 0 %sub = sub nsw i32 0, %x @@ -147,10 +129,8 @@ define i32 @abs_abs_x08(i32 %x) { ; CHECK-LABEL: @abs_abs_x08( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]] -; CHECK-NEXT: ret i32 [[COND]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: ret i32 [[TMP1]] ; %cmp = icmp slt i32 %x, 1 %sub = sub nsw i32 0, %x @@ -163,10 +143,8 @@ define i32 @abs_abs_x09(i32 %x) { ; CHECK-LABEL: @abs_abs_x09( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]] -; CHECK-NEXT: ret i32 [[COND]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: ret i32 [[TMP1]] ; %cmp = icmp sgt i32 %x, -1 %sub = sub nsw i32 0, %x @@ -179,10 +157,8 @@ define i32 @abs_abs_x10(i32 %x) { ; CHECK-LABEL: @abs_abs_x10( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]] -; CHECK-NEXT: ret i32 [[COND]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: ret i32 [[TMP1]] ; %cmp = icmp sgt i32 %x, 0 %sub = sub nsw i32 0, %x @@ -195,10 +171,8 @@ define i32 @abs_abs_x11(i32 %x) { ; CHECK-LABEL: @abs_abs_x11( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]] -; CHECK-NEXT: ret i32 [[COND]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: ret i32 [[TMP1]] ; %cmp = icmp slt i32 %x, 0 %sub = sub nsw i32 0, %x @@ -211,10 +185,8 @@ define i32 @abs_abs_x12(i32 %x) { ; CHECK-LABEL: @abs_abs_x12( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]] -; CHECK-NEXT: ret i32 [[COND]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: ret i32 [[TMP1]] ; %cmp = icmp slt i32 %x, 1 %sub = sub nsw i32 0, %x @@ -227,10 +199,8 @@ define i32 @abs_abs_x13(i32 %x) { ; CHECK-LABEL: @abs_abs_x13( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]] -; CHECK-NEXT: ret i32 [[COND]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: ret i32 [[TMP1]] ; %cmp = icmp sgt i32 %x, -1 %sub = sub nsw i32 0, %x @@ -243,10 +213,8 @@ define i32 @abs_abs_x14(i32 %x) { ; CHECK-LABEL: @abs_abs_x14( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]] -; CHECK-NEXT: ret i32 [[COND]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: ret i32 [[TMP1]] ; %cmp = icmp sgt i32 %x, 0 %sub = sub nsw i32 0, %x @@ -259,10 +227,8 @@ define i32 @abs_abs_x15(i32 %x) { ; CHECK-LABEL: @abs_abs_x15( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]] -; CHECK-NEXT: ret i32 [[COND]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: ret i32 [[TMP1]] ; %cmp = icmp slt i32 %x, 0 %sub = sub nsw i32 0, %x @@ -275,10 +241,8 @@ define i32 @abs_abs_x16(i32 %x) { ; CHECK-LABEL: @abs_abs_x16( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]] -; CHECK-NEXT: ret i32 [[COND]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: ret i32 [[TMP1]] ; %cmp = icmp slt i32 %x, 1 %sub = sub nsw i32 0, %x @@ -292,10 +256,8 @@ ; abs(abs(-x)) -> abs(-x) -> abs(x) define i32 @abs_abs_x17(i32 %x) { ; CHECK-LABEL: @abs_abs_x17( -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X]], 0 -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]] -; CHECK-NEXT: ret i32 [[COND]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: ret i32 [[TMP1]] ; %sub = sub nsw i32 0, %x %cmp = icmp sgt i32 %sub, -1 @@ -310,10 +272,8 @@ define i32 @abs_abs_x18(i32 %x, i32 %y) { ; CHECK-LABEL: @abs_abs_x18( ; CHECK-NEXT: [[A:%.*]] = sub nsw i32 [[X:%.*]], [[Y:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[A]], 0 -; CHECK-NEXT: [[NEGA:%.*]] = sub i32 0, [[A]] -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[NEGA]], i32 [[A]] -; CHECK-NEXT: ret i32 [[COND]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[A]], i1 false) +; CHECK-NEXT: ret i32 [[TMP1]] ; %a = sub nsw i32 %x, %y %b = sub nsw i32 %y, %x @@ -328,10 +288,8 @@ ; abs(abs(-x)) -> abs(-x) -> abs(x) define <2 x i32> @abs_abs_x02_vec(<2 x i32> %x) { ; CHECK-LABEL: @abs_abs_x02_vec( -; CHECK-NEXT: [[SUB:%.*]] = sub nsw <2 x i32> zeroinitializer, [[X:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[X]], zeroinitializer -; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[SUB]], <2 x i32> [[X]] -; CHECK-NEXT: ret <2 x i32> [[COND]] +; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.abs.v2i32(<2 x i32> [[X:%.*]], i1 true) +; CHECK-NEXT: ret <2 x i32> [[TMP1]] ; %sub = sub nsw <2 x i32> zeroinitializer, %x %cmp = icmp sgt <2 x i32> %sub, @@ -346,10 +304,8 @@ define <2 x i32> @abs_abs_x03_vec(<2 x i32> %x, <2 x i32> %y) { ; CHECK-LABEL: @abs_abs_x03_vec( ; CHECK-NEXT: [[A:%.*]] = sub nsw <2 x i32> [[X:%.*]], [[Y:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[A]], zeroinitializer -; CHECK-NEXT: [[NEGA:%.*]] = sub <2 x i32> zeroinitializer, [[A]] -; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[NEGA]], <2 x i32> [[A]] -; CHECK-NEXT: ret <2 x i32> [[COND]] +; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.abs.v2i32(<2 x i32> [[A]], i1 false) +; CHECK-NEXT: ret <2 x i32> [[TMP1]] ; %a = sub nsw <2 x i32> %x, %y %b = sub nsw <2 x i32> %y, %x @@ -363,9 +319,8 @@ define i32 @nabs_nabs_x01(i32 %x) { ; CHECK-LABEL: @nabs_nabs_x01( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: [[COND:%.*]] = sub nsw i32 0, [[TMP1]] ; CHECK-NEXT: ret i32 [[COND]] ; %cmp = icmp sgt i32 %x, -1 @@ -379,9 +334,8 @@ define i32 @nabs_nabs_x02(i32 %x) { ; CHECK-LABEL: @nabs_nabs_x02( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: [[COND:%.*]] = sub nsw i32 0, [[TMP1]] ; CHECK-NEXT: ret i32 [[COND]] ; %cmp = icmp sgt i32 %x, 0 @@ -395,9 +349,8 @@ define i32 @nabs_nabs_x03(i32 %x) { ; CHECK-LABEL: @nabs_nabs_x03( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: [[COND:%.*]] = sub nsw i32 0, [[TMP1]] ; CHECK-NEXT: ret i32 [[COND]] ; %cmp = icmp slt i32 %x, 0 @@ -411,9 +364,8 @@ define i32 @nabs_nabs_x04(i32 %x) { ; CHECK-LABEL: @nabs_nabs_x04( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: [[COND:%.*]] = sub nsw i32 0, [[TMP1]] ; CHECK-NEXT: ret i32 [[COND]] ; %cmp = icmp slt i32 %x, 1 @@ -427,9 +379,8 @@ define i32 @nabs_nabs_x05(i32 %x) { ; CHECK-LABEL: @nabs_nabs_x05( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: [[COND:%.*]] = sub nsw i32 0, [[TMP1]] ; CHECK-NEXT: ret i32 [[COND]] ; %cmp = icmp sgt i32 %x, -1 @@ -443,9 +394,8 @@ define i32 @nabs_nabs_x06(i32 %x) { ; CHECK-LABEL: @nabs_nabs_x06( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: [[COND:%.*]] = sub nsw i32 0, [[TMP1]] ; CHECK-NEXT: ret i32 [[COND]] ; %cmp = icmp sgt i32 %x, 0 @@ -459,9 +409,8 @@ define i32 @nabs_nabs_x07(i32 %x) { ; CHECK-LABEL: @nabs_nabs_x07( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: [[COND:%.*]] = sub nsw i32 0, [[TMP1]] ; CHECK-NEXT: ret i32 [[COND]] ; %cmp = icmp slt i32 %x, 0 @@ -475,9 +424,8 @@ define i32 @nabs_nabs_x08(i32 %x) { ; CHECK-LABEL: @nabs_nabs_x08( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: [[COND:%.*]] = sub nsw i32 0, [[TMP1]] ; CHECK-NEXT: ret i32 [[COND]] ; %cmp = icmp slt i32 %x, 1 @@ -491,9 +439,8 @@ define i32 @nabs_nabs_x09(i32 %x) { ; CHECK-LABEL: @nabs_nabs_x09( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: [[COND:%.*]] = sub nsw i32 0, [[TMP1]] ; CHECK-NEXT: ret i32 [[COND]] ; %cmp = icmp sgt i32 %x, -1 @@ -507,9 +454,8 @@ define i32 @nabs_nabs_x10(i32 %x) { ; CHECK-LABEL: @nabs_nabs_x10( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: [[COND:%.*]] = sub nsw i32 0, [[TMP1]] ; CHECK-NEXT: ret i32 [[COND]] ; %cmp = icmp sgt i32 %x, 0 @@ -523,9 +469,8 @@ define i32 @nabs_nabs_x11(i32 %x) { ; CHECK-LABEL: @nabs_nabs_x11( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: [[COND:%.*]] = sub nsw i32 0, [[TMP1]] ; CHECK-NEXT: ret i32 [[COND]] ; %cmp = icmp slt i32 %x, 0 @@ -539,9 +484,8 @@ define i32 @nabs_nabs_x12(i32 %x) { ; CHECK-LABEL: @nabs_nabs_x12( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: [[COND:%.*]] = sub nsw i32 0, [[TMP1]] ; CHECK-NEXT: ret i32 [[COND]] ; %cmp = icmp slt i32 %x, 1 @@ -555,9 +499,8 @@ define i32 @nabs_nabs_x13(i32 %x) { ; CHECK-LABEL: @nabs_nabs_x13( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: [[COND:%.*]] = sub nsw i32 0, [[TMP1]] ; CHECK-NEXT: ret i32 [[COND]] ; %cmp = icmp sgt i32 %x, -1 @@ -571,9 +514,8 @@ define i32 @nabs_nabs_x14(i32 %x) { ; CHECK-LABEL: @nabs_nabs_x14( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: [[COND:%.*]] = sub nsw i32 0, [[TMP1]] ; CHECK-NEXT: ret i32 [[COND]] ; %cmp = icmp sgt i32 %x, 0 @@ -587,9 +529,8 @@ define i32 @nabs_nabs_x15(i32 %x) { ; CHECK-LABEL: @nabs_nabs_x15( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: [[COND:%.*]] = sub nsw i32 0, [[TMP1]] ; CHECK-NEXT: ret i32 [[COND]] ; %cmp = icmp slt i32 %x, 0 @@ -603,9 +544,8 @@ define i32 @nabs_nabs_x16(i32 %x) { ; CHECK-LABEL: @nabs_nabs_x16( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: [[COND:%.*]] = sub nsw i32 0, [[TMP1]] ; CHECK-NEXT: ret i32 [[COND]] ; %cmp = icmp slt i32 %x, 1 @@ -620,9 +560,8 @@ ; nabs(nabs(-x)) -> nabs(-x) -> nabs(x) define i32 @nabs_nabs_x17(i32 %x) { ; CHECK-LABEL: @nabs_nabs_x17( -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X]], 0 -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: [[COND:%.*]] = sub nsw i32 0, [[TMP1]] ; CHECK-NEXT: ret i32 [[COND]] ; %sub = sub nsw i32 0, %x @@ -638,10 +577,9 @@ define i32 @nabs_nabs_x18(i32 %x, i32 %y) { ; CHECK-LABEL: @nabs_nabs_x18( ; CHECK-NEXT: [[A:%.*]] = sub nsw i32 [[X:%.*]], [[Y:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[A]], 0 -; CHECK-NEXT: [[NEGA:%.*]] = sub i32 0, [[A]] -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[A]], i32 [[NEGA]] -; CHECK-NEXT: ret i32 [[COND]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[A]], i1 false) +; CHECK-NEXT: [[COND18:%.*]] = sub i32 0, [[TMP1]] +; CHECK-NEXT: ret i32 [[COND18]] ; %a = sub nsw i32 %x, %y %b = sub nsw i32 %y, %x @@ -656,9 +594,8 @@ ; nabs(nabs(-x)) -> nabs(-x) -> nabs(x) define <2 x i32> @nabs_nabs_x01_vec(<2 x i32> %x) { ; CHECK-LABEL: @nabs_nabs_x01_vec( -; CHECK-NEXT: [[SUB:%.*]] = sub nsw <2 x i32> zeroinitializer, [[X:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[X]], zeroinitializer -; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[X]], <2 x i32> [[SUB]] +; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.abs.v2i32(<2 x i32> [[X:%.*]], i1 true) +; CHECK-NEXT: [[COND:%.*]] = sub nsw <2 x i32> zeroinitializer, [[TMP1]] ; CHECK-NEXT: ret <2 x i32> [[COND]] ; %sub = sub nsw <2 x i32> zeroinitializer, %x @@ -674,10 +611,9 @@ define <2 x i32> @nabs_nabs_x02_vec(<2 x i32> %x, <2 x i32> %y) { ; CHECK-LABEL: @nabs_nabs_x02_vec( ; CHECK-NEXT: [[A:%.*]] = sub nsw <2 x i32> [[X:%.*]], [[Y:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[A]], zeroinitializer -; CHECK-NEXT: [[NEGA:%.*]] = sub <2 x i32> zeroinitializer, [[A]] -; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[A]], <2 x i32> [[NEGA]] -; CHECK-NEXT: ret <2 x i32> [[COND]] +; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.abs.v2i32(<2 x i32> [[A]], i1 false) +; CHECK-NEXT: [[COND18:%.*]] = sub <2 x i32> zeroinitializer, [[TMP1]] +; CHECK-NEXT: ret <2 x i32> [[COND18]] ; %a = sub nsw <2 x i32> %x, %y %b = sub nsw <2 x i32> %y, %x @@ -691,10 +627,8 @@ define i32 @abs_nabs_x01(i32 %x) { ; CHECK-LABEL: @abs_nabs_x01( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]] -; CHECK-NEXT: ret i32 [[COND1]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: ret i32 [[TMP1]] ; %cmp = icmp sgt i32 %x, -1 %sub = sub nsw i32 0, %x @@ -707,10 +641,8 @@ define i32 @abs_nabs_x02(i32 %x) { ; CHECK-LABEL: @abs_nabs_x02( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]] -; CHECK-NEXT: ret i32 [[COND1]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: ret i32 [[TMP1]] ; %cmp = icmp sgt i32 %x, 0 %sub = sub nsw i32 0, %x @@ -723,10 +655,8 @@ define i32 @abs_nabs_x03(i32 %x) { ; CHECK-LABEL: @abs_nabs_x03( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]] -; CHECK-NEXT: ret i32 [[COND1]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: ret i32 [[TMP1]] ; %cmp = icmp slt i32 %x, 0 %sub = sub nsw i32 0, %x @@ -739,10 +669,8 @@ define i32 @abs_nabs_x04(i32 %x) { ; CHECK-LABEL: @abs_nabs_x04( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]] -; CHECK-NEXT: ret i32 [[COND1]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: ret i32 [[TMP1]] ; %cmp = icmp slt i32 %x, 1 %sub = sub nsw i32 0, %x @@ -755,10 +683,8 @@ define i32 @abs_nabs_x05(i32 %x) { ; CHECK-LABEL: @abs_nabs_x05( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]] -; CHECK-NEXT: ret i32 [[COND1]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: ret i32 [[TMP1]] ; %cmp = icmp sgt i32 %x, -1 %sub = sub nsw i32 0, %x @@ -771,10 +697,8 @@ define i32 @abs_nabs_x06(i32 %x) { ; CHECK-LABEL: @abs_nabs_x06( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]] -; CHECK-NEXT: ret i32 [[COND1]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: ret i32 [[TMP1]] ; %cmp = icmp sgt i32 %x, 0 %sub = sub nsw i32 0, %x @@ -787,10 +711,8 @@ define i32 @abs_nabs_x07(i32 %x) { ; CHECK-LABEL: @abs_nabs_x07( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]] -; CHECK-NEXT: ret i32 [[COND1]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: ret i32 [[TMP1]] ; %cmp = icmp slt i32 %x, 0 %sub = sub nsw i32 0, %x @@ -803,10 +725,8 @@ define i32 @abs_nabs_x08(i32 %x) { ; CHECK-LABEL: @abs_nabs_x08( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]] -; CHECK-NEXT: ret i32 [[COND1]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: ret i32 [[TMP1]] ; %cmp = icmp slt i32 %x, 1 %sub = sub nsw i32 0, %x @@ -819,10 +739,8 @@ define i32 @abs_nabs_x09(i32 %x) { ; CHECK-LABEL: @abs_nabs_x09( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]] -; CHECK-NEXT: ret i32 [[COND1]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: ret i32 [[TMP1]] ; %cmp = icmp sgt i32 %x, -1 %sub = sub nsw i32 0, %x @@ -835,10 +753,8 @@ define i32 @abs_nabs_x10(i32 %x) { ; CHECK-LABEL: @abs_nabs_x10( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]] -; CHECK-NEXT: ret i32 [[COND1]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: ret i32 [[TMP1]] ; %cmp = icmp sgt i32 %x, 0 %sub = sub nsw i32 0, %x @@ -851,10 +767,8 @@ define i32 @abs_nabs_x11(i32 %x) { ; CHECK-LABEL: @abs_nabs_x11( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]] -; CHECK-NEXT: ret i32 [[COND1]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: ret i32 [[TMP1]] ; %cmp = icmp slt i32 %x, 0 %sub = sub nsw i32 0, %x @@ -867,10 +781,8 @@ define i32 @abs_nabs_x12(i32 %x) { ; CHECK-LABEL: @abs_nabs_x12( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]] -; CHECK-NEXT: ret i32 [[COND1]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: ret i32 [[TMP1]] ; %cmp = icmp slt i32 %x, 1 %sub = sub nsw i32 0, %x @@ -883,10 +795,8 @@ define i32 @abs_nabs_x13(i32 %x) { ; CHECK-LABEL: @abs_nabs_x13( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]] -; CHECK-NEXT: ret i32 [[COND1]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: ret i32 [[TMP1]] ; %cmp = icmp sgt i32 %x, -1 %sub = sub nsw i32 0, %x @@ -899,10 +809,8 @@ define i32 @abs_nabs_x14(i32 %x) { ; CHECK-LABEL: @abs_nabs_x14( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]] -; CHECK-NEXT: ret i32 [[COND1]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: ret i32 [[TMP1]] ; %cmp = icmp sgt i32 %x, 0 %sub = sub nsw i32 0, %x @@ -915,10 +823,8 @@ define i32 @abs_nabs_x15(i32 %x) { ; CHECK-LABEL: @abs_nabs_x15( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]] -; CHECK-NEXT: ret i32 [[COND1]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: ret i32 [[TMP1]] ; %cmp = icmp slt i32 %x, 0 %sub = sub nsw i32 0, %x @@ -931,10 +837,8 @@ define i32 @abs_nabs_x16(i32 %x) { ; CHECK-LABEL: @abs_nabs_x16( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]] -; CHECK-NEXT: ret i32 [[COND1]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: ret i32 [[TMP1]] ; %cmp = icmp slt i32 %x, 1 %sub = sub nsw i32 0, %x @@ -948,10 +852,8 @@ ; abs(nabs(-x)) -> abs(-x) -> abs(x) define i32 @abs_nabs_x17(i32 %x) { ; CHECK-LABEL: @abs_nabs_x17( -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X]], 0 -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]] -; CHECK-NEXT: ret i32 [[COND]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: ret i32 [[TMP1]] ; %sub = sub nsw i32 0, %x %cmp = icmp sgt i32 %sub, -1 @@ -966,10 +868,8 @@ define i32 @abs_nabs_x18(i32 %x, i32 %y) { ; CHECK-LABEL: @abs_nabs_x18( ; CHECK-NEXT: [[A:%.*]] = sub nsw i32 [[X:%.*]], [[Y:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[A]], 0 -; CHECK-NEXT: [[NEGA:%.*]] = sub i32 0, [[A]] -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[NEGA]], i32 [[A]] -; CHECK-NEXT: ret i32 [[COND]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[A]], i1 false) +; CHECK-NEXT: ret i32 [[TMP1]] ; %a = sub nsw i32 %x, %y %b = sub nsw i32 %y, %x @@ -984,10 +884,8 @@ ; abs(nabs(-x)) -> abs(-x) -> abs(x) define <2 x i32> @abs_nabs_x01_vec(<2 x i32> %x) { ; CHECK-LABEL: @abs_nabs_x01_vec( -; CHECK-NEXT: [[SUB:%.*]] = sub nsw <2 x i32> zeroinitializer, [[X:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[X]], zeroinitializer -; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[SUB]], <2 x i32> [[X]] -; CHECK-NEXT: ret <2 x i32> [[COND]] +; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.abs.v2i32(<2 x i32> [[X:%.*]], i1 true) +; CHECK-NEXT: ret <2 x i32> [[TMP1]] ; %sub = sub nsw <2 x i32> zeroinitializer, %x %cmp = icmp sgt <2 x i32> %sub, @@ -1002,10 +900,8 @@ define <2 x i32> @abs_nabs_x02_vec(<2 x i32> %x, <2 x i32> %y) { ; CHECK-LABEL: @abs_nabs_x02_vec( ; CHECK-NEXT: [[A:%.*]] = sub nsw <2 x i32> [[X:%.*]], [[Y:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[A]], zeroinitializer -; CHECK-NEXT: [[NEGA:%.*]] = sub <2 x i32> zeroinitializer, [[A]] -; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[NEGA]], <2 x i32> [[A]] -; CHECK-NEXT: ret <2 x i32> [[COND]] +; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.abs.v2i32(<2 x i32> [[A]], i1 false) +; CHECK-NEXT: ret <2 x i32> [[TMP1]] ; %a = sub nsw <2 x i32> %x, %y %b = sub nsw <2 x i32> %y, %x @@ -1019,10 +915,9 @@ define i32 @nabs_abs_x01(i32 %x) { ; CHECK-LABEL: @nabs_abs_x01( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]] -; CHECK-NEXT: ret i32 [[COND1]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: [[SUB9:%.*]] = sub nsw i32 0, [[TMP1]] +; CHECK-NEXT: ret i32 [[SUB9]] ; %cmp = icmp sgt i32 %x, -1 %sub = sub nsw i32 0, %x @@ -1035,10 +930,9 @@ define i32 @nabs_abs_x02(i32 %x) { ; CHECK-LABEL: @nabs_abs_x02( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]] -; CHECK-NEXT: ret i32 [[COND1]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: [[SUB9:%.*]] = sub nsw i32 0, [[TMP1]] +; CHECK-NEXT: ret i32 [[SUB9]] ; %cmp = icmp sgt i32 %x, 0 %sub = sub nsw i32 0, %x @@ -1051,10 +945,9 @@ define i32 @nabs_abs_x03(i32 %x) { ; CHECK-LABEL: @nabs_abs_x03( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]] -; CHECK-NEXT: ret i32 [[COND1]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: [[SUB9:%.*]] = sub nsw i32 0, [[TMP1]] +; CHECK-NEXT: ret i32 [[SUB9]] ; %cmp = icmp slt i32 %x, 0 %sub = sub nsw i32 0, %x @@ -1067,10 +960,9 @@ define i32 @nabs_abs_x04(i32 %x) { ; CHECK-LABEL: @nabs_abs_x04( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]] -; CHECK-NEXT: ret i32 [[COND1]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: [[SUB9:%.*]] = sub nsw i32 0, [[TMP1]] +; CHECK-NEXT: ret i32 [[SUB9]] ; %cmp = icmp slt i32 %x, 1 %sub = sub nsw i32 0, %x @@ -1083,10 +975,9 @@ define i32 @nabs_abs_x05(i32 %x) { ; CHECK-LABEL: @nabs_abs_x05( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]] -; CHECK-NEXT: ret i32 [[COND1]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: [[SUB9:%.*]] = sub nsw i32 0, [[TMP1]] +; CHECK-NEXT: ret i32 [[SUB9]] ; %cmp = icmp sgt i32 %x, -1 %sub = sub nsw i32 0, %x @@ -1099,10 +990,9 @@ define i32 @nabs_abs_x06(i32 %x) { ; CHECK-LABEL: @nabs_abs_x06( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]] -; CHECK-NEXT: ret i32 [[COND1]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: [[SUB9:%.*]] = sub nsw i32 0, [[TMP1]] +; CHECK-NEXT: ret i32 [[SUB9]] ; %cmp = icmp sgt i32 %x, 0 %sub = sub nsw i32 0, %x @@ -1115,10 +1005,9 @@ define i32 @nabs_abs_x07(i32 %x) { ; CHECK-LABEL: @nabs_abs_x07( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]] -; CHECK-NEXT: ret i32 [[COND1]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: [[SUB9:%.*]] = sub nsw i32 0, [[TMP1]] +; CHECK-NEXT: ret i32 [[SUB9]] ; %cmp = icmp slt i32 %x, 0 %sub = sub nsw i32 0, %x @@ -1131,10 +1020,9 @@ define i32 @nabs_abs_x08(i32 %x) { ; CHECK-LABEL: @nabs_abs_x08( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]] -; CHECK-NEXT: ret i32 [[COND1]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: [[SUB9:%.*]] = sub nsw i32 0, [[TMP1]] +; CHECK-NEXT: ret i32 [[SUB9]] ; %cmp = icmp slt i32 %x, 1 %sub = sub nsw i32 0, %x @@ -1147,10 +1035,9 @@ define i32 @nabs_abs_x09(i32 %x) { ; CHECK-LABEL: @nabs_abs_x09( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]] -; CHECK-NEXT: ret i32 [[COND]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: [[SUB16:%.*]] = sub nsw i32 0, [[TMP1]] +; CHECK-NEXT: ret i32 [[SUB16]] ; %cmp = icmp sgt i32 %x, -1 %sub = sub nsw i32 0, %x @@ -1163,10 +1050,9 @@ define i32 @nabs_abs_x10(i32 %x) { ; CHECK-LABEL: @nabs_abs_x10( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]] -; CHECK-NEXT: ret i32 [[COND]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: [[SUB16:%.*]] = sub nsw i32 0, [[TMP1]] +; CHECK-NEXT: ret i32 [[SUB16]] ; %cmp = icmp sgt i32 %x, 0 %sub = sub nsw i32 0, %x @@ -1179,10 +1065,9 @@ define i32 @nabs_abs_x11(i32 %x) { ; CHECK-LABEL: @nabs_abs_x11( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]] -; CHECK-NEXT: ret i32 [[COND]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: [[SUB16:%.*]] = sub nsw i32 0, [[TMP1]] +; CHECK-NEXT: ret i32 [[SUB16]] ; %cmp = icmp slt i32 %x, 0 %sub = sub nsw i32 0, %x @@ -1195,10 +1080,9 @@ define i32 @nabs_abs_x12(i32 %x) { ; CHECK-LABEL: @nabs_abs_x12( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]] -; CHECK-NEXT: ret i32 [[COND]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: [[SUB16:%.*]] = sub nsw i32 0, [[TMP1]] +; CHECK-NEXT: ret i32 [[SUB16]] ; %cmp = icmp slt i32 %x, 1 %sub = sub nsw i32 0, %x @@ -1211,10 +1095,9 @@ define i32 @nabs_abs_x13(i32 %x) { ; CHECK-LABEL: @nabs_abs_x13( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]] -; CHECK-NEXT: ret i32 [[COND1]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: [[SUB16:%.*]] = sub nsw i32 0, [[TMP1]] +; CHECK-NEXT: ret i32 [[SUB16]] ; %cmp = icmp sgt i32 %x, -1 %sub = sub nsw i32 0, %x @@ -1227,10 +1110,9 @@ define i32 @nabs_abs_x14(i32 %x) { ; CHECK-LABEL: @nabs_abs_x14( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]] -; CHECK-NEXT: ret i32 [[COND1]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: [[SUB16:%.*]] = sub nsw i32 0, [[TMP1]] +; CHECK-NEXT: ret i32 [[SUB16]] ; %cmp = icmp sgt i32 %x, 0 %sub = sub nsw i32 0, %x @@ -1243,10 +1125,9 @@ define i32 @nabs_abs_x15(i32 %x) { ; CHECK-LABEL: @nabs_abs_x15( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]] -; CHECK-NEXT: ret i32 [[COND1]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: [[SUB16:%.*]] = sub nsw i32 0, [[TMP1]] +; CHECK-NEXT: ret i32 [[SUB16]] ; %cmp = icmp slt i32 %x, 0 %sub = sub nsw i32 0, %x @@ -1259,10 +1140,9 @@ define i32 @nabs_abs_x16(i32 %x) { ; CHECK-LABEL: @nabs_abs_x16( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]] -; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]] -; CHECK-NEXT: ret i32 [[COND1]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: [[SUB16:%.*]] = sub nsw i32 0, [[TMP1]] +; CHECK-NEXT: ret i32 [[SUB16]] ; %cmp = icmp slt i32 %x, 1 %sub = sub nsw i32 0, %x @@ -1276,10 +1156,9 @@ ; nabs(abs(-x)) -> nabs(-x) -> nabs(x) define i32 @nabs_abs_x17(i32 %x) { ; CHECK-LABEL: @nabs_abs_x17( -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X]], 0 -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]] -; CHECK-NEXT: ret i32 [[COND]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: [[SUB16:%.*]] = sub nsw i32 0, [[TMP1]] +; CHECK-NEXT: ret i32 [[SUB16]] ; %sub = sub nsw i32 0, %x %cmp = icmp sgt i32 %sub, -1 @@ -1294,10 +1173,9 @@ define i32 @nabs_abs_x18(i32 %x, i32 %y) { ; CHECK-LABEL: @nabs_abs_x18( ; CHECK-NEXT: [[A:%.*]] = sub nsw i32 [[X:%.*]], [[Y:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[A]], 0 -; CHECK-NEXT: [[NEGA:%.*]] = sub i32 0, [[A]] -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[A]], i32 [[NEGA]] -; CHECK-NEXT: ret i32 [[COND]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[A]], i1 false) +; CHECK-NEXT: [[COND18:%.*]] = sub nsw i32 0, [[TMP1]] +; CHECK-NEXT: ret i32 [[COND18]] ; %a = sub nsw i32 %x, %y %b = sub nsw i32 %y, %x @@ -1312,10 +1190,9 @@ ; nabs(abs(-x)) -> nabs(-x) -> nabs(x) define <2 x i32> @nabs_abs_x01_vec(<2 x i32> %x) { ; CHECK-LABEL: @nabs_abs_x01_vec( -; CHECK-NEXT: [[SUB:%.*]] = sub nsw <2 x i32> zeroinitializer, [[X:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[X]], zeroinitializer -; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[X]], <2 x i32> [[SUB]] -; CHECK-NEXT: ret <2 x i32> [[COND]] +; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.abs.v2i32(<2 x i32> [[X:%.*]], i1 true) +; CHECK-NEXT: [[SUB16:%.*]] = sub nsw <2 x i32> zeroinitializer, [[TMP1]] +; CHECK-NEXT: ret <2 x i32> [[SUB16]] ; %sub = sub nsw <2 x i32> zeroinitializer, %x %cmp = icmp sgt <2 x i32> %sub, @@ -1330,10 +1207,9 @@ define <2 x i32> @nabs_abs_x02_vec(<2 x i32> %x, <2 x i32> %y) { ; CHECK-LABEL: @nabs_abs_x02_vec( ; CHECK-NEXT: [[A:%.*]] = sub nsw <2 x i32> [[X:%.*]], [[Y:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[A]], zeroinitializer -; CHECK-NEXT: [[NEGA:%.*]] = sub <2 x i32> zeroinitializer, [[A]] -; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[A]], <2 x i32> [[NEGA]] -; CHECK-NEXT: ret <2 x i32> [[COND]] +; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.abs.v2i32(<2 x i32> [[A]], i1 false) +; CHECK-NEXT: [[COND18:%.*]] = sub nsw <2 x i32> zeroinitializer, [[TMP1]] +; CHECK-NEXT: ret <2 x i32> [[COND18]] ; %a = sub nsw <2 x i32> %x, %y %b = sub nsw <2 x i32> %y, %x diff --git a/llvm/test/Transforms/InstCombine/call-callconv.ll b/llvm/test/Transforms/InstCombine/call-callconv.ll --- a/llvm/test/Transforms/InstCombine/call-callconv.ll +++ b/llvm/test/Transforms/InstCombine/call-callconv.ll @@ -6,10 +6,8 @@ define arm_aapcscc i32 @_abs(i32 %i) nounwind readnone { ; CHECK-LABEL: @_abs( -; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[I:%.*]], 0 -; CHECK-NEXT: [[NEG:%.*]] = sub nsw i32 0, [[I]] -; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[NEG]], i32 [[I]] -; CHECK-NEXT: ret i32 [[TMP2]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[I:%.*]], i1 true) +; CHECK-NEXT: ret i32 [[TMP1]] ; %call = tail call arm_aapcscc i32 @abs(i32 %i) nounwind readnone ret i32 %call @@ -19,10 +17,8 @@ define arm_aapcscc i32 @_labs(i32 %i) nounwind readnone { ; CHECK-LABEL: @_labs( -; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[I:%.*]], 0 -; CHECK-NEXT: [[NEG:%.*]] = sub nsw i32 0, [[I]] -; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[NEG]], i32 [[I]] -; CHECK-NEXT: ret i32 [[TMP2]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[I:%.*]], i1 true) +; CHECK-NEXT: ret i32 [[TMP1]] ; %call = tail call arm_aapcscc i32 @labs(i32 %i) nounwind readnone ret i32 %call diff --git a/llvm/test/Transforms/InstCombine/cttz-abs.ll b/llvm/test/Transforms/InstCombine/cttz-abs.ll --- a/llvm/test/Transforms/InstCombine/cttz-abs.ll +++ b/llvm/test/Transforms/InstCombine/cttz-abs.ll @@ -105,10 +105,8 @@ define i32 @cttz_abs_multiuse(i32 %x) { ; CHECK-LABEL: @cttz_abs_multiuse( -; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[S:%.*]] = sub i32 0, [[X]] -; CHECK-NEXT: [[D:%.*]] = select i1 [[C]], i32 [[S]], i32 [[X]] -; CHECK-NEXT: call void @use_abs(i32 [[D]]) +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false) +; CHECK-NEXT: call void @use_abs(i32 [[TMP1]]) ; CHECK-NEXT: [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[X]], i1 true), [[RNG0]] ; CHECK-NEXT: ret i32 [[R]] ; @@ -122,9 +120,8 @@ define i32 @cttz_nabs_multiuse(i32 %x) { ; CHECK-LABEL: @cttz_nabs_multiuse( -; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[S:%.*]] = sub i32 0, [[X]] -; CHECK-NEXT: [[D:%.*]] = select i1 [[C]], i32 [[X]], i32 [[S]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false) +; CHECK-NEXT: [[D:%.*]] = sub i32 0, [[TMP1]] ; CHECK-NEXT: call void @use_abs(i32 [[D]]) ; CHECK-NEXT: [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[X]], i1 true), [[RNG0]] ; CHECK-NEXT: ret i32 [[R]] diff --git a/llvm/test/Transforms/InstCombine/icmp.ll b/llvm/test/Transforms/InstCombine/icmp.ll --- a/llvm/test/Transforms/InstCombine/icmp.ll +++ b/llvm/test/Transforms/InstCombine/icmp.ll @@ -3056,10 +3056,8 @@ ; CHECK-NEXT: [[CONV:%.*]] = zext i8 [[A:%.*]] to i32 ; CHECK-NEXT: [[CONV3:%.*]] = zext i8 [[B:%.*]] to i32 ; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[CONV]], [[CONV3]] -; CHECK-NEXT: [[CMP4:%.*]] = icmp slt i32 [[SUB]], 0 -; CHECK-NEXT: [[SUB7:%.*]] = sub nsw i32 0, [[SUB]] -; CHECK-NEXT: [[SUB7_SUB:%.*]] = select i1 [[CMP4]], i32 [[SUB7]], i32 [[SUB]] -; CHECK-NEXT: ret i32 [[SUB7_SUB]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[SUB]], i1 true) +; CHECK-NEXT: ret i32 [[TMP1]] ; %conv = zext i8 %a to i32 %conv3 = zext i8 %b to i32 @@ -3653,10 +3651,8 @@ define i32 @abs_preserve(i32 %x) { ; CHECK-LABEL: @abs_preserve( ; CHECK-NEXT: [[A:%.*]] = shl nsw i32 [[X:%.*]], 1 -; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[A]], 0 -; CHECK-NEXT: [[NEGA:%.*]] = sub i32 0, [[A]] -; CHECK-NEXT: [[ABS:%.*]] = select i1 [[C]], i32 [[NEGA]], i32 [[A]] -; CHECK-NEXT: ret i32 [[ABS]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[A]], i1 false) +; CHECK-NEXT: ret i32 [[TMP1]] ; %a = mul nsw i32 %x, 2 %c = icmp sge i32 %a, 0 @@ -3694,10 +3690,8 @@ ; fold (icmp pred (sub (0, X)) C1) for vec type define <2 x i32> @Op1Negated_Vec(<2 x i32> %x) { ; CHECK-LABEL: @Op1Negated_Vec( -; CHECK-NEXT: [[SUB:%.*]] = sub nsw <2 x i32> zeroinitializer, [[X:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[X]], zeroinitializer -; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[SUB]], <2 x i32> [[X]] -; CHECK-NEXT: ret <2 x i32> [[COND]] +; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.abs.v2i32(<2 x i32> [[X:%.*]], i1 true) +; CHECK-NEXT: ret <2 x i32> [[TMP1]] ; %sub = sub nsw <2 x i32> zeroinitializer, %x %cmp = icmp sgt <2 x i32> %sub, diff --git a/llvm/test/Transforms/InstCombine/max-of-nots.ll b/llvm/test/Transforms/InstCombine/max-of-nots.ll --- a/llvm/test/Transforms/InstCombine/max-of-nots.ll +++ b/llvm/test/Transforms/InstCombine/max-of-nots.ll @@ -240,12 +240,10 @@ ; CHECK-LABEL: @abs_of_min_of_not( ; CHECK-NEXT: [[XORD:%.*]] = xor i32 [[X:%.*]], -1 ; CHECK-NEXT: [[YADD:%.*]] = add i32 [[Y:%.*]], 2 -; CHECK-NEXT: [[COND_I:%.*]] = icmp slt i32 [[YADD]], [[XORD]] -; CHECK-NEXT: [[MIN:%.*]] = select i1 [[COND_I]], i32 [[YADD]], i32 [[XORD]] -; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[MIN]], 0 -; CHECK-NEXT: [[SUB:%.*]] = sub i32 0, [[MIN]] -; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP2]], i32 [[SUB]], i32 [[MIN]] -; CHECK-NEXT: ret i32 [[ABS]] +; CHECK-NEXT: [[COND_I_NOT:%.*]] = icmp slt i32 [[YADD]], [[XORD]] +; CHECK-NEXT: [[MIN:%.*]] = select i1 [[COND_I_NOT]], i32 [[YADD]], i32 [[XORD]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[MIN]], i1 false) +; CHECK-NEXT: ret i32 [[TMP1]] ; %xord = xor i32 %x, -1 diff --git a/llvm/test/Transforms/InstCombine/select_meta.ll b/llvm/test/Transforms/InstCombine/select_meta.ll --- a/llvm/test/Transforms/InstCombine/select_meta.ll +++ b/llvm/test/Transforms/InstCombine/select_meta.ll @@ -5,9 +5,9 @@ define i32 @foo(i32) local_unnamed_addr #0 { ; CHECK-LABEL: @foo( -; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i32 %0, 2 -; CHECK-NEXT: [[DOTV:%.*]] = select i1 [[TMP2]], i32 20, i32 -20, !prof ![[$MD1:[0-9]+]] -; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[DOTV]], %0 +; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i32 [[TMP0:%.*]], 2 +; CHECK-NEXT: [[DOTV:%.*]] = select i1 [[TMP2]], i32 20, i32 -20, !prof !0 +; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[DOTV]], [[TMP0]] ; CHECK-NEXT: ret i32 [[TMP3]] ; %2 = icmp sgt i32 %0, 2 @@ -19,8 +19,8 @@ define i8 @shrink_select(i1 %cond, i32 %x) { ; CHECK-LABEL: @shrink_select( -; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %x to i8 -; CHECK-NEXT: [[TRUNC:%.*]] = select i1 %cond, i8 [[TMP1]], i8 42, !prof ![[$MD1]] +; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[X:%.*]] to i8 +; CHECK-NEXT: [[TRUNC:%.*]] = select i1 [[COND:%.*]], i8 [[TMP1]], i8 42, !prof !0 ; CHECK-NEXT: ret i8 [[TRUNC]] ; %sel = select i1 %cond, i32 %x, i32 42, !prof !1 @@ -30,12 +30,12 @@ define void @min_max_bitcast(<4 x float> %a, <4 x float> %b, <4 x i32>* %ptr1, <4 x i32>* %ptr2) { ; CHECK-LABEL: @min_max_bitcast( -; CHECK-NEXT: [[CMP:%.*]] = fcmp olt <4 x float> %a, %b -; CHECK-NEXT: [[SEL1_V:%.*]] = select <4 x i1> [[CMP]], <4 x float> %a, <4 x float> %b, !prof ![[$MD1]] -; CHECK-NEXT: [[SEL2_V:%.*]] = select <4 x i1> [[CMP]], <4 x float> %b, <4 x float> %a, !prof ![[$MD1]] -; CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32>* %ptr1 to <4 x float>* +; CHECK-NEXT: [[CMP:%.*]] = fcmp olt <4 x float> [[A:%.*]], [[B:%.*]] +; CHECK-NEXT: [[SEL1_V:%.*]] = select <4 x i1> [[CMP]], <4 x float> [[A]], <4 x float> [[B]], !prof !0 +; CHECK-NEXT: [[SEL2_V:%.*]] = select <4 x i1> [[CMP]], <4 x float> [[B]], <4 x float> [[A]], !prof !0 +; CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32>* [[PTR1:%.*]] to <4 x float>* ; CHECK-NEXT: store <4 x float> [[SEL1_V]], <4 x float>* [[TMP1]], align 16 -; CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i32>* %ptr2 to <4 x float>* +; CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i32>* [[PTR2:%.*]] to <4 x float>* ; CHECK-NEXT: store <4 x float> [[SEL2_V]], <4 x float>* [[TMP2]], align 16 ; CHECK-NEXT: ret void ; @@ -51,10 +51,10 @@ define i32 @foo2(i32, i32) local_unnamed_addr #0 { ; CHECK-LABEL: @foo2( -; CHECK-NEXT: [[TMP3:%.*]] = icmp sgt i32 %0, 2 -; CHECK-NEXT: [[TMP4:%.*]] = sub i32 0, %1 -; CHECK-NEXT: [[DOTP:%.*]] = select i1 [[TMP3]], i32 %1, i32 [[TMP4]], !prof ![[$MD1]] -; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[DOTP]], %0 +; CHECK-NEXT: [[TMP3:%.*]] = icmp sgt i32 [[TMP0:%.*]], 2 +; CHECK-NEXT: [[TMP4:%.*]] = sub i32 0, [[TMP1:%.*]] +; CHECK-NEXT: [[DOTP:%.*]] = select i1 [[TMP3]], i32 [[TMP1]], i32 [[TMP4]], !prof !0 +; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[DOTP]], [[TMP0]] ; CHECK-NEXT: ret i32 [[TMP5]] ; %3 = icmp sgt i32 %0, 2 @@ -66,9 +66,9 @@ define i64 @test43(i32 %a) nounwind { ; CHECK-LABEL: @test43( -; CHECK-NEXT: [[A_EXT:%.*]] = sext i32 %a to i64 +; CHECK-NEXT: [[A_EXT:%.*]] = sext i32 [[A:%.*]] to i64 ; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i64 [[A_EXT]], 0 -; CHECK-NEXT: [[MAX:%.*]] = select i1 [[TMP1]], i64 [[A_EXT]], i64 0, !prof ![[$MD1]] +; CHECK-NEXT: [[MAX:%.*]] = select i1 [[TMP1]], i64 [[A_EXT]], i64 0, !prof !0 ; CHECK-NEXT: ret i64 [[MAX]] ; %a_ext = sext i32 %a to i64 @@ -79,7 +79,7 @@ define <2 x i32> @scalar_select_of_vectors_sext(<2 x i1> %cca, i1 %ccb) { ; CHECK-LABEL: @scalar_select_of_vectors_sext( -; CHECK-NEXT: [[NARROW:%.*]] = select i1 %ccb, <2 x i1> %cca, <2 x i1> zeroinitializer, !prof ![[$MD1]] +; CHECK-NEXT: [[NARROW:%.*]] = select i1 [[CCB:%.*]], <2 x i1> [[CCA:%.*]], <2 x i1> zeroinitializer, !prof !0 ; CHECK-NEXT: [[R:%.*]] = sext <2 x i1> [[NARROW]] to <2 x i32> ; CHECK-NEXT: ret <2 x i32> [[R]] ; @@ -91,8 +91,8 @@ define i16 @t7(i32 %a) { ; CHECK-LABEL: @t7( -; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 %a, -32768 -; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 %a, i32 -32768, !prof ![[$MD1]] +; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[A:%.*]], -32768 +; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[A]], i32 -32768, !prof !0 ; CHECK-NEXT: [[TMP3:%.*]] = trunc i32 [[TMP2]] to i16 ; CHECK-NEXT: ret i16 [[TMP3]] ; @@ -104,10 +104,8 @@ define i32 @abs_nabs_x01(i32 %x) { ; CHECK-LABEL: @abs_nabs_x01( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 %x, 0 -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, %x -; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 %x, !prof ![[$MD3:[0-9]+]] -; CHECK-NEXT: ret i32 [[COND1]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true) +; CHECK-NEXT: ret i32 [[TMP1]] ; %cmp = icmp sgt i32 %x, -1 %sub = sub nsw i32 0, %x @@ -122,10 +120,8 @@ define <2 x i32> @abs_nabs_x01_vec(<2 x i32> %x) { ; CHECK-LABEL: @abs_nabs_x01_vec( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> %x, zeroinitializer -; CHECK-NEXT: [[SUB:%.*]] = sub nsw <2 x i32> zeroinitializer, %x -; CHECK-NEXT: [[COND1:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[SUB]], <2 x i32> %x, !prof ![[$MD3]] -; CHECK-NEXT: ret <2 x i32> [[COND1]] +; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.abs.v2i32(<2 x i32> [[X:%.*]], i1 true) +; CHECK-NEXT: ret <2 x i32> [[TMP1]] ; %cmp = icmp sgt <2 x i32> %x, %sub = sub nsw <2 x i32> zeroinitializer, %x @@ -139,8 +135,8 @@ ; SMAX(SMAX(x, y), x) -> SMAX(x, y) define i32 @test30(i32 %x, i32 %y) { ; CHECK-LABEL: @test30( -; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 %x, %y -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 %x, i32 %y, !prof ![[$MD1]] +; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X:%.*]], [[Y:%.*]] +; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[Y]], !prof !0 ; CHECK-NEXT: ret i32 [[COND]] ; %cmp = icmp sgt i32 %x, %y @@ -153,8 +149,8 @@ ; SMAX(SMAX(75, X), 36) -> SMAX(X, 75) define i32 @test70(i32 %x) { ; CHECK-LABEL: @test70( -; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 %x, 75 -; CHECK-NEXT: [[COND:%.*]] = select i1 [[TMP1]], i32 %x, i32 75, !prof ![[$MD3]] +; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[X:%.*]], 75 +; CHECK-NEXT: [[COND:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 75, !prof !1 ; CHECK-NEXT: ret i32 [[COND]] ; %cmp = icmp slt i32 %x, 75 @@ -168,8 +164,8 @@ ; SMIN(SMIN(X, 92), 11) -> SMIN(X, 11) define i32 @test72(i32 %x) { ; CHECK-LABEL: @test72( -; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 %x, 11 -; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[TMP1]], i32 %x, i32 11, !prof ![[$MD4:[0-9]+]] +; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[X:%.*]], 11 +; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 11, !prof !2 ; CHECK-NEXT: ret i32 [[RETVAL]] ; %cmp = icmp sgt i32 %x, 92 @@ -183,8 +179,8 @@ ; SMAX(SMAX(X, 36), 75) -> SMAX(X, 75) define i32 @test74(i32 %x) { ; CHECK-LABEL: @test74( -; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 %x, 75 -; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[TMP1]], i32 %x, i32 75, !prof ![[$MD4]] +; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[X:%.*]], 75 +; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 75, !prof !2 ; CHECK-NEXT: ret i32 [[RETVAL]] ; %cmp = icmp slt i32 %x, 36 @@ -198,7 +194,7 @@ define i32 @smin1(i32 %x) { ; CHECK-LABEL: @smin1( ; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 0, !prof ![[$MD1]] +; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 0, !prof !0 ; CHECK-NEXT: [[SEL:%.*]] = xor i32 [[TMP2]], -1 ; CHECK-NEXT: ret i32 [[SEL]] ; @@ -212,7 +208,7 @@ define i32 @smin2(i32 %x) { ; CHECK-LABEL: @smin2( ; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 0, !prof ![[$MD3]] +; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 0, !prof !1 ; CHECK-NEXT: [[SEL:%.*]] = xor i32 [[TMP2]], -1 ; CHECK-NEXT: ret i32 [[SEL]] ; @@ -226,7 +222,7 @@ define i32 @smax1(i32 %x) { ; CHECK-LABEL: @smax1( ; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 0, !prof ![[$MD1]] +; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 0, !prof !0 ; CHECK-NEXT: [[SEL:%.*]] = xor i32 [[TMP2]], -1 ; CHECK-NEXT: ret i32 [[SEL]] ; @@ -240,7 +236,7 @@ define i32 @smax2(i32 %x) { ; CHECK-LABEL: @smax2( ; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[X:%.*]], 0 -; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 0, !prof ![[$MD3]] +; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 0, !prof !1 ; CHECK-NEXT: [[SEL:%.*]] = xor i32 [[TMP2]], -1 ; CHECK-NEXT: ret i32 [[SEL]] ; @@ -253,8 +249,8 @@ ; The compare should change, but the metadata remains the same because the select operands are not swapped. define i32 @umin1(i32 %x) { ; CHECK-LABEL: @umin1( -; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 %x, -2147483648 -; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 %x, i32 -2147483648, !prof ![[$MD1]] +; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[X:%.*]], -2147483648 +; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 -2147483648, !prof !0 ; CHECK-NEXT: ret i32 [[SEL]] ; %cmp = icmp sgt i32 %x, -1 @@ -265,8 +261,8 @@ ; The compare should change, and the metadata is swapped because the select operands are swapped. define i32 @umin2(i32 %x) { ; CHECK-LABEL: @umin2( -; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 %x, 2147483647 -; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 %x, i32 2147483647, !prof ![[$MD3]] +; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[X:%.*]], 2147483647 +; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 2147483647, !prof !1 ; CHECK-NEXT: ret i32 [[SEL]] ; %cmp = icmp slt i32 %x, 0 @@ -277,8 +273,8 @@ ; The compare should change, but the metadata remains the same because the select operands are not swapped. define i32 @umax1(i32 %x) { ; CHECK-LABEL: @umax1( -; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 %x, 2147483647 -; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 %x, i32 2147483647, !prof ![[$MD1]] +; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[X:%.*]], 2147483647 +; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 2147483647, !prof !0 ; CHECK-NEXT: ret i32 [[SEL]] ; %cmp = icmp slt i32 %x, 0 @@ -289,8 +285,8 @@ ; The compare should change, and the metadata is swapped because the select operands are swapped. define i32 @umax2(i32 %x) { ; CHECK-LABEL: @umax2( -; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 %x, -2147483648 -; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 %x, i32 -2147483648, !prof ![[$MD3]] +; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[X:%.*]], -2147483648 +; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 -2147483648, !prof !1 ; CHECK-NEXT: ret i32 [[SEL]] ; %cmp = icmp sgt i32 %x, -1 @@ -302,7 +298,7 @@ define i32 @not_cond(i1 %c, i32 %tv, i32 %fv) { ; CHECK-LABEL: @not_cond( -; CHECK-NEXT: [[R:%.*]] = select i1 [[C:%.*]], i32 [[FV:%.*]], i32 [[TV:%.*]], !prof ![[$MD3]] +; CHECK-NEXT: [[R:%.*]] = select i1 [[C:%.*]], i32 [[FV:%.*]], i32 [[TV:%.*]], !prof !1 ; CHECK-NEXT: ret i32 [[R]] ; %notc = xor i1 %c, true @@ -314,7 +310,7 @@ define <2 x i32> @not_cond_vec(<2 x i1> %c, <2 x i32> %tv, <2 x i32> %fv) { ; CHECK-LABEL: @not_cond_vec( -; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[C:%.*]], <2 x i32> [[FV:%.*]], <2 x i32> [[TV:%.*]], !prof ![[$MD3]] +; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[C:%.*]], <2 x i32> [[FV:%.*]], <2 x i32> [[TV:%.*]], !prof !1 ; CHECK-NEXT: ret <2 x i32> [[R]] ; %notc = xor <2 x i1> %c, @@ -327,7 +323,7 @@ define <2 x i32> @not_cond_vec_undef(<2 x i1> %c, <2 x i32> %tv, <2 x i32> %fv) { ; CHECK-LABEL: @not_cond_vec_undef( -; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[C:%.*]], <2 x i32> [[FV:%.*]], <2 x i32> [[TV:%.*]], !prof ![[$MD3]] +; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[C:%.*]], <2 x i32> [[FV:%.*]], <2 x i32> [[TV:%.*]], !prof !1 ; CHECK-NEXT: ret <2 x i32> [[R]] ; %notc = xor <2 x i1> %c, diff --git a/llvm/test/Transforms/InstCombine/sub-of-negatible.ll b/llvm/test/Transforms/InstCombine/sub-of-negatible.ll --- a/llvm/test/Transforms/InstCombine/sub-of-negatible.ll +++ b/llvm/test/Transforms/InstCombine/sub-of-negatible.ll @@ -1296,9 +1296,8 @@ ; CHECK-LABEL: @negate_abs( ; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X:%.*]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) -; CHECK-NEXT: [[T1:%.*]] = icmp slt i8 [[X]], 0 -; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[T1]], i8 [[X]], i8 [[T0]], !prof !0 -; CHECK-NEXT: [[T3:%.*]] = add i8 [[TMP1]], [[Y:%.*]] +; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[X]], i1 false) +; CHECK-NEXT: [[T3:%.*]] = sub i8 [[Y:%.*]], [[TMP1]] ; CHECK-NEXT: ret i8 [[T3]] ; %t0 = sub i8 0, %x @@ -1312,8 +1311,7 @@ ; CHECK-LABEL: @negate_nabs( ; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X:%.*]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) -; CHECK-NEXT: [[T1:%.*]] = icmp slt i8 [[X]], 0 -; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[T1]], i8 [[T0]], i8 [[X]], !prof !0 +; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[X]], i1 false) ; CHECK-NEXT: [[T3:%.*]] = add i8 [[TMP1]], [[Y:%.*]] ; CHECK-NEXT: ret i8 [[T3]] ; diff --git a/llvm/test/Transforms/PhaseOrdering/X86/vector-reductions.ll b/llvm/test/Transforms/PhaseOrdering/X86/vector-reductions.ll --- a/llvm/test/Transforms/PhaseOrdering/X86/vector-reductions.ll +++ b/llvm/test/Transforms/PhaseOrdering/X86/vector-reductions.ll @@ -71,11 +71,9 @@ ; CHECK-NEXT: [[TMP2:%.*]] = bitcast i32* [[VEC1:%.*]] to <4 x i32>* ; CHECK-NEXT: [[TMP3:%.*]] = load <4 x i32>, <4 x i32>* [[TMP2]], align 4 ; CHECK-NEXT: [[TMP4:%.*]] = sub nsw <4 x i32> [[TMP1]], [[TMP3]] -; CHECK-NEXT: [[TMP5:%.*]] = icmp slt <4 x i32> [[TMP4]], zeroinitializer -; CHECK-NEXT: [[TMP6:%.*]] = sub nsw <4 x i32> zeroinitializer, [[TMP4]] -; CHECK-NEXT: [[TMP7:%.*]] = select <4 x i1> [[TMP5]], <4 x i32> [[TMP6]], <4 x i32> [[TMP4]] -; CHECK-NEXT: [[TMP8:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP7]]) -; CHECK-NEXT: [[CMP5_NOT:%.*]] = icmp sle i32 [[TMP8]], [[TOLERANCE:%.*]] +; CHECK-NEXT: [[TMP5:%.*]] = call <4 x i32> @llvm.abs.v4i32(<4 x i32> [[TMP4]], i1 true) +; CHECK-NEXT: [[TMP6:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP5]]) +; CHECK-NEXT: [[CMP5_NOT:%.*]] = icmp sle i32 [[TMP6]], [[TOLERANCE:%.*]] ; CHECK-NEXT: [[COND6:%.*]] = zext i1 [[CMP5_NOT]] to i32 ; CHECK-NEXT: ret i32 [[COND6]] ; diff --git a/llvm/test/Transforms/PhaseOrdering/min-max-abs-cse.ll b/llvm/test/Transforms/PhaseOrdering/min-max-abs-cse.ll --- a/llvm/test/Transforms/PhaseOrdering/min-max-abs-cse.ll +++ b/llvm/test/Transforms/PhaseOrdering/min-max-abs-cse.ll @@ -33,10 +33,8 @@ define i8 @abs_swapped(i8 %a) { ; CHECK-LABEL: @abs_swapped( -; CHECK-NEXT: [[NEG:%.*]] = sub i8 0, [[A:%.*]] -; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i8 [[A]], 0 -; CHECK-NEXT: [[M1:%.*]] = select i1 [[CMP1]], i8 [[NEG]], i8 [[A]] -; CHECK-NEXT: ret i8 [[M1]] +; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[A:%.*]], i1 false) +; CHECK-NEXT: ret i8 [[TMP1]] ; %neg = sub i8 0, %a %cmp1 = icmp sgt i8 %a, 0 @@ -81,9 +79,8 @@ define i8 @nabs_different_constants(i8 %a) { ; CHECK-LABEL: @nabs_different_constants( -; CHECK-NEXT: [[NEG:%.*]] = sub i8 0, [[A:%.*]] -; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i8 [[A]], 0 -; CHECK-NEXT: [[M1:%.*]] = select i1 [[CMP1]], i8 [[A]], i8 [[NEG]] +; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[A:%.*]], i1 false) +; CHECK-NEXT: [[M1:%.*]] = sub i8 0, [[TMP1]] ; CHECK-NEXT: ret i8 [[M1]] ; %neg = sub i8 0, %a