diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -16209,10 +16209,10 @@ SDValue N0 = N->getOperand(0); ConstantSDNode *CN1 = dyn_cast(N->getOperand(1)); - if (!Subtarget.isISA3_0() || + if (!Subtarget.isISA3_0() || !Subtarget.isPPC64() || N0.getOpcode() != ISD::SIGN_EXTEND || - N0.getOperand(0).getValueType() != MVT::i32 || - CN1 == nullptr || N->getValueType(0) != MVT::i64) + N0.getOperand(0).getValueType() != MVT::i32 || CN1 == nullptr || + N->getValueType(0) != MVT::i64) return SDValue(); // We can't save an operation here if the value is already extended, and diff --git a/llvm/test/CodeGen/PowerPC/ppc-32bit-shift.ll b/llvm/test/CodeGen/PowerPC/ppc-32bit-shift.ll new file mode 100644 --- /dev/null +++ b/llvm/test/CodeGen/PowerPC/ppc-32bit-shift.ll @@ -0,0 +1,22 @@ +; RUN: llc -verify-machineinstrs -mtriple=powerpc \ +; RUN: -mcpu=pwr9 < %s | FileCheck %s --check-prefix=32BIT + +; RUN: llc -verify-machineinstrs -mtriple=powerpc64 \ +; RUN: -mcpu=pwr9 < %s | FileCheck %s --check-prefix=64BIT + +define dso_local void @foo(i32 %inta, i64* %long_intb) { + entry: + %conv = sext i32 %inta to i64 + %shl = shl nsw i64 %conv, 8 + store i64 %shl, i64* %long_intb, align 8 + ret void +} + +; CHECK-LABEL: foo + +; 32BIT: srawi [[REG1:[0-9]+]], [[REG2:[0-9]+]], 31 +; 32BIT-NEXT: rotlwi [[REG3:[0-9]+]], [[REG2]], 8 +; 32BIT-NEXT: slwi [[REG2]], [[REG2]], 8 +; 32BIT-NEXT: rlwimi [[REG3]], [[REG1]], 8, 0, 23 + +; 64BIT: extswsli {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}