diff --git a/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp b/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
--- a/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
+++ b/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
@@ -1569,6 +1569,14 @@
               !UsedRegUnits.available(getLdStRegOp(MI).getReg())) &&
             !mayAlias(MI, MemInsns, AA)) {
 
+          // If the BaseReg has been modified, then cannot do the optimization.
+          // for example, in the following pattern
+          //   ldr x1 [x2]
+          //   ldr x2 [x3]
+          //   ldr x4 [x2, #8],
+          // the first and third ldr cannot be converted to ldp x1, x4, [x2]
+	  if (!ModifiedRegUnits.available(BaseReg))
+            return E;
           Flags.setMergeForward(false);
           Flags.clearRenameReg();
           return MBBI;
@@ -1583,6 +1591,8 @@
             !mayAlias(FirstMI, MemInsns, AA)) {
 
           if (ModifiedRegUnits.available(getLdStRegOp(FirstMI).getReg())) {
+	    if (!ModifiedRegUnits.available(BaseReg))
+              return E;
             Flags.setMergeForward(true);
             Flags.clearRenameReg();
             return MBBI;