Index: llvm/lib/Target/AArch64/AArch64ISelLowering.h =================================================================== --- llvm/lib/Target/AArch64/AArch64ISelLowering.h +++ llvm/lib/Target/AArch64/AArch64ISelLowering.h @@ -96,7 +96,13 @@ // Predicated instructions with the result of inactive lanes provided by the // last operand. FCEIL_MERGE_PASSTHRU, + FFLOOR_MERGE_PASSTHRU, + FNEARBYINT_MERGE_PASSTHRU, FNEG_MERGE_PASSTHRU, + FRINT_MERGE_PASSTHRU, + FROUND_MERGE_PASSTHRU, + FROUNDEVEN_MERGE_PASSTHRU, + FTRUNC_MERGE_PASSTHRU, SIGN_EXTEND_INREG_MERGE_PASSTHRU, ZERO_EXTEND_INREG_MERGE_PASSTHRU, Index: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp =================================================================== --- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp +++ llvm/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -139,6 +139,12 @@ case AArch64ISD::SIGN_EXTEND_INREG_MERGE_PASSTHRU: case AArch64ISD::ZERO_EXTEND_INREG_MERGE_PASSTHRU: case AArch64ISD::FCEIL_MERGE_PASSTHRU: + case AArch64ISD::FFLOOR_MERGE_PASSTHRU: + case AArch64ISD::FNEARBYINT_MERGE_PASSTHRU: + case AArch64ISD::FRINT_MERGE_PASSTHRU: + case AArch64ISD::FROUND_MERGE_PASSTHRU: + case AArch64ISD::FROUNDEVEN_MERGE_PASSTHRU: + case AArch64ISD::FTRUNC_MERGE_PASSTHRU: return true; } } @@ -976,6 +982,12 @@ setOperationAction(ISD::FNEG, VT, Custom); setOperationAction(ISD::FSUB, VT, Custom); setOperationAction(ISD::FCEIL, VT, Custom); + setOperationAction(ISD::FFLOOR, VT, Custom); + setOperationAction(ISD::FNEARBYINT, VT, Custom); + setOperationAction(ISD::FRINT, VT, Custom); + setOperationAction(ISD::FROUND, VT, Custom); + setOperationAction(ISD::FROUNDEVEN, VT, Custom); + setOperationAction(ISD::FTRUNC, VT, Custom); } } @@ -1482,6 +1494,12 @@ MAKE_CASE(AArch64ISD::SIGN_EXTEND_INREG_MERGE_PASSTHRU) MAKE_CASE(AArch64ISD::ZERO_EXTEND_INREG_MERGE_PASSTHRU) MAKE_CASE(AArch64ISD::FCEIL_MERGE_PASSTHRU) + MAKE_CASE(AArch64ISD::FFLOOR_MERGE_PASSTHRU) + MAKE_CASE(AArch64ISD::FNEARBYINT_MERGE_PASSTHRU) + MAKE_CASE(AArch64ISD::FRINT_MERGE_PASSTHRU) + MAKE_CASE(AArch64ISD::FROUND_MERGE_PASSTHRU) + MAKE_CASE(AArch64ISD::FROUNDEVEN_MERGE_PASSTHRU) + MAKE_CASE(AArch64ISD::FTRUNC_MERGE_PASSTHRU) MAKE_CASE(AArch64ISD::SETCC_MERGE_ZERO) MAKE_CASE(AArch64ISD::ADC) MAKE_CASE(AArch64ISD::SBC) @@ -3346,6 +3364,24 @@ case Intrinsic::aarch64_sve_frintp: return DAG.getNode(AArch64ISD::FCEIL_MERGE_PASSTHRU, dl, Op.getValueType(), Op.getOperand(2), Op.getOperand(3), Op.getOperand(1)); + case Intrinsic::aarch64_sve_frintm: + return DAG.getNode(AArch64ISD::FFLOOR_MERGE_PASSTHRU, dl, Op.getValueType(), + Op.getOperand(2), Op.getOperand(3), Op.getOperand(1)); + case Intrinsic::aarch64_sve_frinti: + return DAG.getNode(AArch64ISD::FNEARBYINT_MERGE_PASSTHRU, dl, Op.getValueType(), + Op.getOperand(2), Op.getOperand(3), Op.getOperand(1)); + case Intrinsic::aarch64_sve_frintx: + return DAG.getNode(AArch64ISD::FRINT_MERGE_PASSTHRU, dl, Op.getValueType(), + Op.getOperand(2), Op.getOperand(3), Op.getOperand(1)); + case Intrinsic::aarch64_sve_frinta: + return DAG.getNode(AArch64ISD::FROUND_MERGE_PASSTHRU, dl, Op.getValueType(), + Op.getOperand(2), Op.getOperand(3), Op.getOperand(1)); + case Intrinsic::aarch64_sve_frintn: + return DAG.getNode(AArch64ISD::FROUNDEVEN_MERGE_PASSTHRU, dl, Op.getValueType(), + Op.getOperand(2), Op.getOperand(3), Op.getOperand(1)); + case Intrinsic::aarch64_sve_frintz: + return DAG.getNode(AArch64ISD::FTRUNC_MERGE_PASSTHRU, dl, Op.getValueType(), + Op.getOperand(2), Op.getOperand(3), Op.getOperand(1)); case Intrinsic::aarch64_sve_convert_to_svbool: { EVT OutVT = Op.getValueType(); EVT InVT = Op.getOperand(1).getValueType(); @@ -3645,6 +3681,18 @@ return LowerToPredicatedOp(Op, DAG, AArch64ISD::FNEG_MERGE_PASSTHRU); case ISD::FCEIL: return LowerToPredicatedOp(Op, DAG, AArch64ISD::FCEIL_MERGE_PASSTHRU); + case ISD::FFLOOR: + return LowerToPredicatedOp(Op, DAG, AArch64ISD::FFLOOR_MERGE_PASSTHRU); + case ISD::FNEARBYINT: + return LowerToPredicatedOp(Op, DAG, AArch64ISD::FNEARBYINT_MERGE_PASSTHRU); + case ISD::FRINT: + return LowerToPredicatedOp(Op, DAG, AArch64ISD::FRINT_MERGE_PASSTHRU); + case ISD::FROUND: + return LowerToPredicatedOp(Op, DAG, AArch64ISD::FROUND_MERGE_PASSTHRU); + case ISD::FROUNDEVEN: + return LowerToPredicatedOp(Op, DAG, AArch64ISD::FROUNDEVEN_MERGE_PASSTHRU); + case ISD::FTRUNC: + return LowerToPredicatedOp(Op, DAG, AArch64ISD::FTRUNC_MERGE_PASSTHRU); case ISD::FP_ROUND: case ISD::STRICT_FP_ROUND: return LowerFP_ROUND(Op, DAG); Index: llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td =================================================================== --- llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td +++ llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td @@ -203,6 +203,12 @@ def AArch64sxt_mt : SDNode<"AArch64ISD::SIGN_EXTEND_INREG_MERGE_PASSTHRU", SDT_AArch64IntExtend>; def AArch64uxt_mt : SDNode<"AArch64ISD::ZERO_EXTEND_INREG_MERGE_PASSTHRU", SDT_AArch64IntExtend>; def AArch64frintp_mt : SDNode<"AArch64ISD::FCEIL_MERGE_PASSTHRU", SDT_AArch64Arith>; +def AArch64frintm_mt : SDNode<"AArch64ISD::FFLOOR_MERGE_PASSTHRU", SDT_AArch64Arith>; +def AArch64frinti_mt : SDNode<"AArch64ISD::FNEARBYINT_MERGE_PASSTHRU", SDT_AArch64Arith>; +def AArch64frintx_mt : SDNode<"AArch64ISD::FRINT_MERGE_PASSTHRU", SDT_AArch64Arith>; +def AArch64frinta_mt : SDNode<"AArch64ISD::FROUND_MERGE_PASSTHRU", SDT_AArch64Arith>; +def AArch64frintn_mt : SDNode<"AArch64ISD::FROUNDEVEN_MERGE_PASSTHRU", SDT_AArch64Arith>; +def AArch64frintz_mt : SDNode<"AArch64ISD::FTRUNC_MERGE_PASSTHRU", SDT_AArch64Arith>; def SDT_AArch64ReduceWithInit : SDTypeProfile<1, 3, [SDTCisVec<1>, SDTCisVec<3>]>; def AArch64clasta_n : SDNode<"AArch64ISD::CLASTA_N", SDT_AArch64ReduceWithInit>; @@ -1416,13 +1422,13 @@ defm FCVTZS_ZPmZ_DtoD : sve_fp_2op_p_zd<0b1111110, "fcvtzs", ZPR64, ZPR64, int_aarch64_sve_fcvtzs, nxv2i64, nxv2i1, nxv2f64, ElementSizeD>; defm FCVTZU_ZPmZ_DtoD : sve_fp_2op_p_zd<0b1111111, "fcvtzu", ZPR64, ZPR64, int_aarch64_sve_fcvtzu, nxv2i64, nxv2i1, nxv2f64, ElementSizeD>; - defm FRINTN_ZPmZ : sve_fp_2op_p_zd_HSD<0b00000, "frintn", int_aarch64_sve_frintn>; + defm FRINTN_ZPmZ : sve_fp_2op_p_zd_HSD<0b00000, "frintn", int_aarch64_sve_frintn, AArch64frintn_mt>; defm FRINTP_ZPmZ : sve_fp_2op_p_zd_HSD<0b00001, "frintp", int_aarch64_sve_frintp, AArch64frintp_mt>; - defm FRINTM_ZPmZ : sve_fp_2op_p_zd_HSD<0b00010, "frintm", int_aarch64_sve_frintm>; - defm FRINTZ_ZPmZ : sve_fp_2op_p_zd_HSD<0b00011, "frintz", int_aarch64_sve_frintz>; - defm FRINTA_ZPmZ : sve_fp_2op_p_zd_HSD<0b00100, "frinta", int_aarch64_sve_frinta>; - defm FRINTX_ZPmZ : sve_fp_2op_p_zd_HSD<0b00110, "frintx", int_aarch64_sve_frintx>; - defm FRINTI_ZPmZ : sve_fp_2op_p_zd_HSD<0b00111, "frinti", int_aarch64_sve_frinti>; + defm FRINTM_ZPmZ : sve_fp_2op_p_zd_HSD<0b00010, "frintm", int_aarch64_sve_frintm, AArch64frintm_mt>; + defm FRINTZ_ZPmZ : sve_fp_2op_p_zd_HSD<0b00011, "frintz", int_aarch64_sve_frintz, AArch64frintz_mt>; + defm FRINTA_ZPmZ : sve_fp_2op_p_zd_HSD<0b00100, "frinta", int_aarch64_sve_frinta, AArch64frinta_mt>; + defm FRINTX_ZPmZ : sve_fp_2op_p_zd_HSD<0b00110, "frintx", int_aarch64_sve_frintx, AArch64frintx_mt>; + defm FRINTI_ZPmZ : sve_fp_2op_p_zd_HSD<0b00111, "frinti", int_aarch64_sve_frinti, AArch64frinti_mt>; defm FRECPX_ZPmZ : sve_fp_2op_p_zd_HSD<0b01100, "frecpx", int_aarch64_sve_frecpx>; defm FSQRT_ZPmZ : sve_fp_2op_p_zd_HSD<0b01101, "fsqrt", int_aarch64_sve_fsqrt>; Index: llvm/test/CodeGen/AArch64/sve-fp-rounding.ll =================================================================== --- /dev/null +++ llvm/test/CodeGen/AArch64/sve-fp-rounding.ll @@ -0,0 +1,433 @@ +; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s + +; FCEIL + +define @frintp_nxv8f16( %a) { +; CHECK-LABEL: frintp_nxv8f16: +; CHECK: ptrue p0.h +; CHECK-NEXT: frintp z0.h, p0/m, z0.h +; CHECK-NEXT: ret + %res = call @llvm.ceil.nxv8f16( %a) + ret %res +} + +define @frintp_nxv4f16( %a) { +; CHECK-LABEL: frintp_nxv4f16: +; CHECK: ptrue p0.s +; CHECK-NEXT: frintp z0.h, p0/m, z0.h +; CHECK-NEXT: ret + %res = call @llvm.ceil.nxv4f16( %a) + ret %res +} + +define @frintp_nxv2f16( %a) { +; CHECK-LABEL: frintp_nxv2f16: +; CHECK: ptrue p0.d +; CHECK-NEXT: frintp z0.h, p0/m, z0.h +; CHECK-NEXT: ret + %res = call @llvm.ceil.nxv2f16( %a) + ret %res +} + +define @frintp_nxv4f32( %a) { +; CHECK-LABEL: frintp_nxv4f32: +; CHECK: ptrue p0.s +; CHECK-NEXT: frintp z0.s, p0/m, z0.s +; CHECK-NEXT: ret + %res = call @llvm.ceil.nxv4f32( %a) + ret %res +} + +define @frintp_nxv2f32( %a) { +; CHECK-LABEL: frintp_nxv2f32: +; CHECK: ptrue p0.d +; CHECK-NEXT: frintp z0.s, p0/m, z0.s +; CHECK-NEXT: ret + %res = call @llvm.ceil.nxv2f32( %a) + ret %res +} + +define @frintp_nxv2f64( %a) { +; CHECK-LABEL: frintp_nxv2f64: +; CHECK: ptrue p0.d +; CHECK-NEXT: frintp z0.d, p0/m, z0.d +; CHECK-NEXT: ret + %res = call @llvm.ceil.nxv2f64( %a) + ret %res +} + +; FFLOOR + +define @frintm_nxv8f16( %a) { +; CHECK-LABEL: frintm_nxv8f16: +; CHECK: ptrue p0.h +; CHECK-NEXT: frintm z0.h, p0/m, z0.h +; CHECK-NEXT: ret + %res = call @llvm.floor.nxv8f16( %a) + ret %res +} + +define @frintm_nxv4f16( %a) { +; CHECK-LABEL: frintm_nxv4f16: +; CHECK: ptrue p0.s +; CHECK-NEXT: frintm z0.h, p0/m, z0.h +; CHECK-NEXT: ret + %res = call @llvm.floor.nxv4f16( %a) + ret %res +} + +define @frintm_nxv2f16( %a) { +; CHECK-LABEL: frintm_nxv2f16: +; CHECK: ptrue p0.d +; CHECK-NEXT: frintm z0.h, p0/m, z0.h +; CHECK-NEXT: ret + %res = call @llvm.floor.nxv2f16( %a) + ret %res +} + +define @frintm_nxv4f32( %a) { +; CHECK-LABEL: frintm_nxv4f32: +; CHECK: ptrue p0.s +; CHECK-NEXT: frintm z0.s, p0/m, z0.s +; CHECK-NEXT: ret + %res = call @llvm.floor.nxv4f32( %a) + ret %res +} + +define @frintm_nxv2f32( %a) { +; CHECK-LABEL: frintm_nxv2f32: +; CHECK: ptrue p0.d +; CHECK-NEXT: frintm z0.s, p0/m, z0.s +; CHECK-NEXT: ret + %res = call @llvm.floor.nxv2f32( %a) + ret %res +} + +; FNEARBYINT + +define @frinti_nxv8f16( %a) { +; CHECK-LABEL: frinti_nxv8f16: +; CHECK: ptrue p0.h +; CHECK-NEXT: frinti z0.h, p0/m, z0.h +; CHECK-NEXT: ret + %res = call @llvm.nearbyint.nxv8f16( %a) + ret %res +} + +define @frinti_nxv4f16( %a) { +; CHECK-LABEL: frinti_nxv4f16: +; CHECK: ptrue p0.s +; CHECK-NEXT: frinti z0.h, p0/m, z0.h +; CHECK-NEXT: ret + %res = call @llvm.nearbyint.nxv4f16( %a) + ret %res +} + +define @frinti_nxv2f16( %a) { +; CHECK-LABEL: frinti_nxv2f16: +; CHECK: ptrue p0.d +; CHECK-NEXT: frinti z0.h, p0/m, z0.h +; CHECK-NEXT: ret + %res = call @llvm.nearbyint.nxv2f16( %a) + ret %res +} + +define @frinti_nxv4f32( %a) { +; CHECK-LABEL: frinti_nxv4f32: +; CHECK: ptrue p0.s +; CHECK-NEXT: frinti z0.s, p0/m, z0.s +; CHECK-NEXT: ret + %res = call @llvm.nearbyint.nxv4f32( %a) + ret %res +} + +define @frinti_nxv2f32( %a) { +; CHECK-LABEL: frinti_nxv2f32: +; CHECK: ptrue p0.d +; CHECK-NEXT: frinti z0.s, p0/m, z0.s +; CHECK-NEXT: ret + %res = call @llvm.nearbyint.nxv2f32( %a) + ret %res +} + +define @frinti_nxv2f64( %a) { +; CHECK-LABEL: frinti_nxv2f64: +; CHECK: ptrue p0.d +; CHECK-NEXT: frinti z0.d, p0/m, z0.d +; CHECK-NEXT: ret + %res = call @llvm.nearbyint.nxv2f64( %a) + ret %res +} + +; FRINT + +define @frintx_nxv8f16( %a) { +; CHECK-LABEL: frintx_nxv8f16: +; CHECK: ptrue p0.h +; CHECK-NEXT: frintx z0.h, p0/m, z0.h +; CHECK-NEXT: ret + %res = call @llvm.rint.nxv8f16( %a) + ret %res +} + +define @frintx_nxv4f16( %a) { +; CHECK-LABEL: frintx_nxv4f16: +; CHECK: ptrue p0.s +; CHECK-NEXT: frintx z0.h, p0/m, z0.h +; CHECK-NEXT: ret + %res = call @llvm.rint.nxv4f16( %a) + ret %res +} + +define @frintx_nxv2f16( %a) { +; CHECK-LABEL: frintx_nxv2f16: +; CHECK: ptrue p0.d +; CHECK-NEXT: frintx z0.h, p0/m, z0.h +; CHECK-NEXT: ret + %res = call @llvm.rint.nxv2f16( %a) + ret %res +} + +define @frintx_nxv4f32( %a) { +; CHECK-LABEL: frintx_nxv4f32: +; CHECK: ptrue p0.s +; CHECK-NEXT: frintx z0.s, p0/m, z0.s +; CHECK-NEXT: ret + %res = call @llvm.rint.nxv4f32( %a) + ret %res +} + +define @frintx_nxv2f32( %a) { +; CHECK-LABEL: frintx_nxv2f32: +; CHECK: ptrue p0.d +; CHECK-NEXT: frintx z0.s, p0/m, z0.s +; CHECK-NEXT: ret + %res = call @llvm.rint.nxv2f32( %a) + ret %res +} + +define @frintx_nxv2f64( %a) { +; CHECK-LABEL: frintx_nxv2f64: +; CHECK: ptrue p0.d +; CHECK-NEXT: frintx z0.d, p0/m, z0.d +; CHECK-NEXT: ret + %res = call @llvm.rint.nxv2f64( %a) + ret %res +} + +; ROUND + +define @frinta_nxv8f16( %a) { +; CHECK-LABEL: frinta_nxv8f16: +; CHECK: ptrue p0.h +; CHECK-NEXT: frinta z0.h, p0/m, z0.h +; CHECK-NEXT: ret + %res = call @llvm.round.nxv8f16( %a) + ret %res +} + +define @frinta_nxv4f16( %a) { +; CHECK-LABEL: frinta_nxv4f16: +; CHECK: ptrue p0.s +; CHECK-NEXT: frinta z0.h, p0/m, z0.h +; CHECK-NEXT: ret + %res = call @llvm.round.nxv4f16( %a) + ret %res +} + +define @frinta_nxv2f16( %a) { +; CHECK-LABEL: frinta_nxv2f16: +; CHECK: ptrue p0.d +; CHECK-NEXT: frinta z0.h, p0/m, z0.h +; CHECK-NEXT: ret + %res = call @llvm.round.nxv2f16( %a) + ret %res +} + +define @frinta_nxv4f32( %a) { +; CHECK-LABEL: frinta_nxv4f32: +; CHECK: ptrue p0.s +; CHECK-NEXT: frinta z0.s, p0/m, z0.s +; CHECK-NEXT: ret + %res = call @llvm.round.nxv4f32( %a) + ret %res +} + +define @frinta_nxv2f32( %a) { +; CHECK-LABEL: frinta_nxv2f32: +; CHECK: ptrue p0.d +; CHECK-NEXT: frinta z0.s, p0/m, z0.s +; CHECK-NEXT: ret + %res = call @llvm.round.nxv2f32( %a) + ret %res +} + +define @frinta_nxv2f64( %a) { +; CHECK-LABEL: frinta_nxv2f64: +; CHECK: ptrue p0.d +; CHECK-NEXT: frinta z0.d, p0/m, z0.d +; CHECK-NEXT: ret + %res = call @llvm.round.nxv2f64( %a) + ret %res +} + +; ROUNDEVEN + +define @frintn_nxv8f16( %a) { +; CHECK-LABEL: frintn_nxv8f16: +; CHECK: ptrue p0.h +; CHECK-NEXT: frintn z0.h, p0/m, z0.h +; CHECK-NEXT: ret + %res = call @llvm.roundeven.nxv8f16( %a) + ret %res +} + +define @frintn_nxv4f16( %a) { +; CHECK-LABEL: frintn_nxv4f16: +; CHECK: ptrue p0.s +; CHECK-NEXT: frintn z0.h, p0/m, z0.h +; CHECK-NEXT: ret + %res = call @llvm.roundeven.nxv4f16( %a) + ret %res +} + +define @frintn_nxv2f16( %a) { +; CHECK-LABEL: frintn_nxv2f16: +; CHECK: ptrue p0.d +; CHECK-NEXT: frintn z0.h, p0/m, z0.h +; CHECK-NEXT: ret + %res = call @llvm.roundeven.nxv2f16( %a) + ret %res +} + +define @frintn_nxv4f32( %a) { +; CHECK-LABEL: frintn_nxv4f32: +; CHECK: ptrue p0.s +; CHECK-NEXT: frintn z0.s, p0/m, z0.s +; CHECK-NEXT: ret + %res = call @llvm.roundeven.nxv4f32( %a) + ret %res +} + +define @frintn_nxv2f32( %a) { +; CHECK-LABEL: frintn_nxv2f32: +; CHECK: ptrue p0.d +; CHECK-NEXT: frintn z0.s, p0/m, z0.s +; CHECK-NEXT: ret + %res = call @llvm.roundeven.nxv2f32( %a) + ret %res +} + +define @frintn_nxv2f64( %a) { +; CHECK-LABEL: frintn_nxv2f64: +; CHECK: ptrue p0.d +; CHECK-NEXT: frintn z0.d, p0/m, z0.d +; CHECK-NEXT: ret + %res = call @llvm.roundeven.nxv2f64( %a) + ret %res +} + +; FTRUNC + +define @frintz_nxv8f16( %a) { +; CHECK-LABEL: frintz_nxv8f16: +; CHECK: ptrue p0.h +; CHECK-NEXT: frintz z0.h, p0/m, z0.h +; CHECK-NEXT: ret + %res = call @llvm.trunc.nxv8f16( %a) + ret %res +} + +define @frintz_nxv4f16( %a) { +; CHECK-LABEL: frintz_nxv4f16: +; CHECK: ptrue p0.s +; CHECK-NEXT: frintz z0.h, p0/m, z0.h +; CHECK-NEXT: ret + %res = call @llvm.trunc.nxv4f16( %a) + ret %res +} + +define @frintz_nxv2f16( %a) { +; CHECK-LABEL: frintz_nxv2f16: +; CHECK: ptrue p0.d +; CHECK-NEXT: frintz z0.h, p0/m, z0.h +; CHECK-NEXT: ret + %res = call @llvm.trunc.nxv2f16( %a) + ret %res +} + +define @frintz_nxv4f32( %a) { +; CHECK-LABEL: frintz_nxv4f32: +; CHECK: ptrue p0.s +; CHECK-NEXT: frintz z0.s, p0/m, z0.s +; CHECK-NEXT: ret + %res = call @llvm.trunc.nxv4f32( %a) + ret %res +} + +define @frintz_nxv2f32( %a) { +; CHECK-LABEL: frintz_nxv2f32: +; CHECK: ptrue p0.d +; CHECK-NEXT: frintz z0.s, p0/m, z0.s +; CHECK-NEXT: ret + %res = call @llvm.trunc.nxv2f32( %a) + ret %res +} + +define @frintz_nxv2f64( %a) { +; CHECK-LABEL: frintz_nxv2f64: +; CHECK: ptrue p0.d +; CHECK-NEXT: frintz z0.d, p0/m, z0.d +; CHECK-NEXT: ret + %res = call @llvm.trunc.nxv2f64( %a) + ret %res +} + +declare @llvm.ceil.nxv8f16( ) +declare @llvm.ceil.nxv4f16( ) +declare @llvm.ceil.nxv2f16( ) +declare @llvm.ceil.nxv4f32() +declare @llvm.ceil.nxv2f32() +declare @llvm.ceil.nxv2f64() + +declare @llvm.floor.nxv8f16( ) +declare @llvm.floor.nxv4f16( ) +declare @llvm.floor.nxv2f16( ) +declare @llvm.floor.nxv4f32() +declare @llvm.floor.nxv2f32() +declare @llvm.floor.nxv2f64() + +declare @llvm.nearbyint.nxv8f16( ) +declare @llvm.nearbyint.nxv4f16( ) +declare @llvm.nearbyint.nxv2f16( ) +declare @llvm.nearbyint.nxv4f32() +declare @llvm.nearbyint.nxv2f32() +declare @llvm.nearbyint.nxv2f64() + +declare @llvm.rint.nxv8f16( ) +declare @llvm.rint.nxv4f16( ) +declare @llvm.rint.nxv2f16( ) +declare @llvm.rint.nxv4f32() +declare @llvm.rint.nxv2f32() +declare @llvm.rint.nxv2f64() + +declare @llvm.round.nxv8f16( ) +declare @llvm.round.nxv4f16( ) +declare @llvm.round.nxv2f16( ) +declare @llvm.round.nxv4f32() +declare @llvm.round.nxv2f32() +declare @llvm.round.nxv2f64() + +declare @llvm.roundeven.nxv8f16( ) +declare @llvm.roundeven.nxv4f16( ) +declare @llvm.roundeven.nxv2f16( ) +declare @llvm.roundeven.nxv4f32() +declare @llvm.roundeven.nxv2f32() +declare @llvm.roundeven.nxv2f64() + +declare @llvm.trunc.nxv8f16( ) +declare @llvm.trunc.nxv4f16( ) +declare @llvm.trunc.nxv2f16( ) +declare @llvm.trunc.nxv4f32() +declare @llvm.trunc.nxv2f32() +declare @llvm.trunc.nxv2f64() Index: llvm/test/CodeGen/AArch64/sve-fp.ll =================================================================== --- llvm/test/CodeGen/AArch64/sve-fp.ll +++ llvm/test/CodeGen/AArch64/sve-fp.ll @@ -480,62 +480,6 @@ ret void } -; FCEIL - -define @frintp_nxv8f16( %a) { -; CHECK-LABEL: frintp_nxv8f16: -; CHECK: ptrue p0.h -; CHECK-NEXT: frintp z0.h, p0/m, z0.h -; CHECK-NEXT: ret - %res = call @llvm.ceil.nxv8f16( %a) - ret %res -} - -define @frintp_nxv4f16( %a) { -; CHECK-LABEL: frintp_nxv4f16: -; CHECK: ptrue p0.s -; CHECK-NEXT: frintp z0.h, p0/m, z0.h -; CHECK-NEXT: ret - %res = call @llvm.ceil.nxv4f16( %a) - ret %res -} - -define @frintp_nxv2f16( %a) { -; CHECK-LABEL: frintp_nxv2f16: -; CHECK: ptrue p0.d -; CHECK-NEXT: frintp z0.h, p0/m, z0.h -; CHECK-NEXT: ret - %res = call @llvm.ceil.nxv2f16( %a) - ret %res -} - -define @frintp_nxv4f32( %a) { -; CHECK-LABEL: frintp_nxv4f32: -; CHECK: ptrue p0.s -; CHECK-NEXT: frintp z0.s, p0/m, z0.s -; CHECK-NEXT: ret - %res = call @llvm.ceil.nxv4f32( %a) - ret %res -} - -define @frintp_nxv2f32( %a) { -; CHECK-LABEL: frintp_nxv2f32: -; CHECK: ptrue p0.d -; CHECK-NEXT: frintp z0.s, p0/m, z0.s -; CHECK-NEXT: ret - %res = call @llvm.ceil.nxv2f32( %a) - ret %res -} - -define @frintp_nxv2f64( %a) { -; CHECK-LABEL: frintp_nxv2f64: -; CHECK: ptrue p0.d -; CHECK-NEXT: frintp z0.d, p0/m, z0.d -; CHECK-NEXT: ret - %res = call @llvm.ceil.nxv2f64( %a) - ret %res -} - declare @llvm.aarch64.sve.frecps.x.nxv8f16(, ) declare @llvm.aarch64.sve.frecps.x.nxv4f32( , ) declare @llvm.aarch64.sve.frecps.x.nxv2f64(, ) @@ -551,12 +495,5 @@ declare @llvm.fma.nxv4f16(, , ) declare @llvm.fma.nxv2f16(, , ) -declare @llvm.ceil.nxv8f16( ) -declare @llvm.ceil.nxv4f16( ) -declare @llvm.ceil.nxv2f16( ) -declare @llvm.ceil.nxv4f32() -declare @llvm.ceil.nxv2f32() -declare @llvm.ceil.nxv2f64() - ; Function Attrs: nounwind readnone declare double @llvm.aarch64.sve.faddv.nxv2f64(, ) #2